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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2017-10-09 07:38:15 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2017-10-09 07:38:15 +0200 |
commit | 80933ab316dcaf09ff682681668acacd91241526 (patch) | |
tree | 21e52b663da61edce6a44a3be9205f9db761d2e0 /c/src/lib/libcpu | |
parent | psxtests/psx05: Fix timeout calculation (diff) | |
download | rtems-80933ab316dcaf09ff682681668acacd91241526.tar.bz2 |
bsps/powerpc: Fix robust thread dispatch again
Use the saved MSR to account for FPU and AltiVec settings.
Update #2811.
Diffstat (limited to 'c/src/lib/libcpu')
-rw-r--r-- | c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c index 5c6754d00f..ce1f326438 100644 --- a/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c +++ b/c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_hdl.c @@ -102,13 +102,11 @@ void ppc_exc_wrapup(BSP_Exception_frame *frame) } while (cpu_self->dispatch_necessary) { - uint32_t msr; rtems_interrupt_level level; cpu_self->isr_dispatch_disable = 1; cpu_self->thread_dispatch_disable_level = 1; - msr = ppc_machine_state_register(); - _Thread_Do_dispatch(cpu_self, msr | MSR_EE); + _Thread_Do_dispatch(cpu_self, frame->EXC_SRR1); rtems_interrupt_local_disable(level); (void) level; cpu_self = _Per_CPU_Get(); |