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* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-031-6/+24
| | | | | | | * new_exception_processing/cpu.h, old_exception_processing/cpu.c: old_exception_processing/cpu.h, Added _CPU_Initialize_vectors(). In particular, spurious vector initialization had to be moved on old exception processing model.
* 2000-10-18 Sergei Organov <osv@javad.ru>Joel Sherrill2000-10-181-161/+1
| | | | | | | | | | | | | | | * Added full support for MPC505. * mpc505/ictrl: New directory. * configure.in, mpc505/Makefile.am: Modified to reflect ictrl addition. * mpc505/ictrl/.cvsignore, mpc505/ictrl/Makefile.am, mpc505/ictrl/ictrl.c, mpc505/ictrl/ictrl.h: New files. * mpc505/timer/timer.c: Use <rtems.h>, not "rtems.h". * mpc505/vectors/Makefile.am: alignment exception handler now included. * mpc505/vectors/vectors.S: Now use constants for exception numbers. * old_exception_processing/ppc_offs.h: New file. * old_exception_processing/Makefile.am: Account for ppc_offs.h. * old_exception_processing/cpu.h: Make Nest and Disable levels volatile. * old_exception_processing/cpu_asm.S: Offsets moved to ppc_offs.h.
* Patch from John Cotton <john.cotton@nrc.ca>, Charles-Antoine GauthierJoel Sherrill2000-06-121-1/+6
| | | | | | | | | | | | | | | <charles.gauthier@iit.nrc.ca>, and Darlene A. Stewart <Darlene.Stewart@nrc.ca> to add support for a number of very significant things: + BSPs for many variations on the Motorola MBX8xx board series + Cache Manager including initial support for m68040 and PowerPC + Rework of mpc8xx libcpu code so all mpc8xx CPUs now use same code base. + Rework of eth_comm BSP to utiltize above. John reports this works on the 821 and 860
* Merged from 4.5.0-beta3aJoel Sherrill2000-06-121-0/+2
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* Merged of mcp750 and mvme2307 BSP by Eric Valette <valette@crf.canon.fr>.Joel Sherrill1999-12-026-0/+2079
As part of this effort, the mpc750 libcpu code is now shared with the ppc6xx.