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* bsps: Fix integer to/from pointer warningsSebastian Huber2017-09-282-4/+4
| | | | Update #3082.
* bsps/powerpc: Fix print format warningsSebastian Huber2017-09-281-1/+1
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* bsps/powerpc: Fix robust thread dispatchSebastian Huber2017-09-211-6/+21
| | | | | | | Implement thread dispatch code in ppc_exc_wrapup() similar to ppc_exc_interrupt(). Update #2811.
* bsps/powerpc: Fix PPC_EXC_CONFIG_USE_FIXED_HANDLERSebastian Huber2017-09-202-4/+6
| | | | | | Fix link-time error on BSPs not using PPC_EXC_CONFIG_USE_FIXED_HANDLER. Update #3085.
* bsps/powerpc: PPC_EXC_CONFIG_USE_FIXED_HANDLERSebastian Huber2017-09-192-149/+105
| | | | | | | | | Make PPC_EXC_CONFIG_USE_FIXED_HANDLER mandatory for BSPs using ppc_exc_interrupt(). Pass exception number to bsp_interrupt_dispatch() to allow processing of decrementer and doorbell exceptions as hypervisor guest. Update #3085.
* powerpc: PPC64_NOP_FOR_LINKER_TOC_POINTER_RESTORESebastian Huber2017-08-222-0/+4
| | | | | | | In 64-bit mode, the linker must have the ability to restore the TOC pointer after an external function call. Update #3082.
* bsps/powerpc: Rename ppc_exc_wrap_async_normal_endSebastian Huber2017-08-221-1/+1
| | | | | | | Rename ppc_exc_wrap_async_normal_end to ppc_exc_interrupt_end to avoid a bit of obfuscation. Update #3082.
* powerpc: Add 64-bit context/interrupt supportSebastian Huber2017-08-226-151/+142
| | | | Update #3082.
* powerpc: 64-bit _CPU_Context_Initialize() supportSebastian Huber2017-08-221-7/+9
| | | | Update #3082.
* bsps/powerpc: Add PPC_EXC_INTERRUPT_FRAME_SIZESebastian Huber2017-08-012-2/+4
| | | | | | Use a specific define for the interrupt exception frame size. Update #3082.
* bsps/powerpc: Rename ppc_exc_wrap_async_normalSebastian Huber2017-08-011-3/+3
| | | | | | | Rename ppc_exc_wrap_async_normal to ppc_exc_interrupt to avoid a bit of obfuscation. Update #3082.
* bsp/qoriq: Simplify fatal exceptionsSebastian Huber2017-07-311-0/+228
| | | | | | | Avoid use of small-data area, since it is not supported in the ELFv2 ABI by GCC. Update #3082.
* bsps/powerpc: Fix format specifiersSebastian Huber2017-07-311-39/+39
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* Simplify TLS support in context switchSebastian Huber2017-06-091-1/+0
| | | | | | There is no need to save the thread pointer in _CPU_Context_switch() since it is a thread invariant. It is initialized once in _CPU_Context_Initialize().
* Add support for IBM PowerPC 750 chip.Phong Pham2017-05-291-0/+2
| | | | Closes #3015.
* powerpc/new-exceptions/bspsupport/ppc_exc_print.c: Fix printf() format warningsJoel Sherrill2017-04-241-2/+2
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* powerpc: Optimize AltiVec context switchSebastian Huber2017-03-071-2/+0
| | | | | | Use r8 instead of r5 to slightly optimize _CPU_Context_switch(). It is not a big deal, however, we already assume r12 is used by _CPU_Context_switch(). Treat r5 the in same way.
* powerpc: Fix warningsSebastian Huber2017-03-021-1/+1
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* powerpc: Fix interrupt thread dispatchSebastian Huber2017-03-021-2/+1
| | | | Update #2751.
* bsps/powerpc: Fix warningsSebastian Huber2017-02-151-45/+47
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* score: Fix ARM and PowerPC context initializationSebastian Huber2016-12-021-0/+1
| | | | Update #2751.
* score: Fix interrupt profilingSebastian Huber2016-11-241-20/+13
| | | | | | | | | | Callers of _Thread_Do_dispatch() must have a valid Per_CPU_Control::Stats::thread_dispatch_disabled_instant. Call _Profiling_Outer_most_interrupt_entry_and_exit() with the interrupt stack to not exceed Per_CPU_Control::Interrupt_frame. Update #2751.
* powerpc: Fix interrupt profiling for e6500Sebastian Huber2016-11-241-1/+3
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* powerpc: Use Per_CPU_Control::isr_dispatch_disableSebastian Huber2016-11-182-20/+66
| | | | Update #2751.
* score: Allow interrupts during thread dispatchSebastian Huber2016-11-181-12/+17
| | | | | | | | | Use a processor-specific interrupt frame during context switches in case the executing thread is longer executes on the processor and the heir thread is about to start execution. During this period we must not use a thread stack for interrupt processing. Update #2809.
* powerpc: Add up to date CPU_Interrupt_frameSebastian Huber2016-11-183-379/+4
| | | | | | | Rename ppc_exc_min_frame to CPU_Interrupt_frame. Move it and the corresponding defines to <rtems/score/cpuimpl.h>. Update #2809.
* powerpc: Fix SMP context switchSebastian Huber2016-09-081-61/+62
| | | | | | We need the unmodified r4 for get_potential_new_heir. This partially reverts commit 8d785f72d9610fb80a65d7848404f0f7507e026c.
* bsps/powerpc: Fix AtliVec context switchSebastian Huber2016-07-191-62/+62
| | | | | | | Properly pass the stack aligned context to _CPU_Context_switch_altivec() since _CPU_altivec_ctxt_off defined via ppc_context. Close #2761.
* Delete unused API extensionsSebastian Huber2016-02-032-2/+0
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* Fix interrupt epilogue for ARMv7-AR and PowerPCSebastian Huber2015-11-121-13/+38
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* SMP: Fix and optimize thread dispatchingSebastian Huber2015-09-281-14/+11
| | | | | | | | According to the C11 and C++11 memory models only a read-modify-write operation guarantees that we read the last value written in modification order. Avoid the sequential consistent thread fence and instead use the inter-processor interrupt to set the thread dispatch necessary indicator.
* bsps/powerpc: Provide debug and trace symbolsSebastian Huber2015-07-081-0/+3
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* score: Add Thread_Control::is_fpSebastian Huber2015-06-091-17/+1
| | | | | | | | Store the floating-point unit property in the thread control block regardless of the CPU_HARDWARE_FP and CPU_SOFTWARE_FP settings. Make sure the floating-point unit is only enabled for the corresponding multilibs. This helps targets which have a volatile only floating point context like SPARC for example.
* powerpc: Fix AltiVec VSCR save/restoreSebastian Huber2015-01-201-4/+6
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* powerpc: AltiVec and FPU context supportSebastian Huber2015-01-137-12/+821
| | | | | | | | | | | Add AltiVec and FPU support to the Context_Control in case we use the e6500 multilib. Add PPC_MULTILIB_ALTIVEC and PPC_MULTILIB_FPU multilib defines. Add non-volatile AltiVec and FPU context to Context_Control. Add save/restore of non-volatile AltiVec and FPU to _CPU_Context_switch(). Add save/restore of volatile AltiVec and FPU context to the exception code. Adjust data cache optimizations for the new context and cache line size.
* bsps/powerpc: Use e500 exc categories for e6500Sebastian Huber2015-01-131-0/+1
| | | | This is not correct, but works for now.
* powerpc: Use PPC_HAS_FPUSebastian Huber2015-01-091-6/+6
| | | | Provide floating point context support only if PPC_HAS_FPU == 1.
* powerpc: Set PPC_DEFAULT_CACHE_LINE_SIZE for e6500Sebastian Huber2015-01-091-15/+11
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* bsps/powerpc: ppc_exc_initialize_interrupt_stack()Sebastian Huber2015-01-092-11/+20
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* bsps/powerpc: Fix the warning fixSebastian Huber2014-10-141-3/+3
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* bsps/powerpc: Fix warningSebastian Huber2014-10-101-3/+3
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* Eliminate use of /*PAGE and clean up formattingJoel Sherrill2014-10-091-9/+5
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* score: Rename _BSP_Exception_frame_print()Sebastian Huber2014-09-111-1/+1
| | | | | Rename _BSP_Exception_frame_print() to _CPU_Exception_frame_print() to be in line with other CPU port functions.
* score: PR2183: Fix context switch on SMPSebastian Huber2014-07-041-50/+90
| | | | | | | | Fix context switch on SMP for ARM, PowerPC and SPARC. Atomically test and set the is executing indicator of the heir context to ensure that at most one processor uses the heir context. Break the busy wait loop also due to heir updates.
* Revert "bsps/powerpc: Fix potential relocation truncation"Sebastian Huber2014-06-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit d9ff8b3e687a0ec56cac6463ba01ba7775eccd41. It is not that simple: https://sourceware.org/ml/binutils/2014-06/msg00062.html On Fri, Jun 06, 2014 at 01:31:48PM +0200, Sebastian Huber wrote: > On 2014-06-06 13:23, Sebastian Huber wrote: > >Ok, so this "cmplwi cr0, rX, ppc_exc_lock_std@sdarel" is illegal, > >since > >ppc_exc_lock_std@sdarel is signed and the immediate is unsigned > >16-bit? The > >assembler doesn't issue a warning about this. > > > >Exists there a way to rescue this cmplwi hack without relaxing the > >overflow > >checks? > > Hm, sorry, it was surprisingly simple. This works: > > "cmplwi cr0, rX, ppc_exc_lock_std@sdarel@l" > > I was not aware that you can add several @ in a row. That is the wrong thing to use here. sdarel@l translates to a VLE reloc which applies to a split 16-bit field in VLE insns. You want cmpwi cr0, rX, ppc_exc_lock_std@sdarel to properly compare a 16-bit signed number from sym@sdarel. Note that the assembler does error if you write something like cmplwi 3,-30000 or cmpwi 3,40000 so what the linker is now doing is extending this behaviour to link time.
* bsps/powerpc: Fix potential relocation truncationSebastian Huber2014-06-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | See also https://sourceware.org/ml/binutils/2014-06/msg00059.html On Fri, Jun 06, 2014 at 11:01:10AM +0200, Sebastian Huber wrote: > I performed a git bisect and found this: > > 93d1b056cb396d6468781fe0e40dd769891bed32 is the first bad commit > commit 93d1b056cb396d6468781fe0e40dd769891bed32 > Author: Alan Modra <amodra@gmail.com> > Date: Tue May 20 11:42:42 2014 +0930 > > Rewrite ppc32 backend .sdata and .sdata2 handling Hmm, I'm surprised that your git bisect found this patch. Was _SDA_BASE_ set differently before this? > 0x00000000000dfc00 _SDA_BASE_ > 0x00000000000d7f78 ppc_exc_lock_std > 4b8: 28 05 00 00 cmplwi r5,0 > 4ba: R_PPC_SDAREL16 ppc_exc_lock_std ppc_exc_lock_std@sdarel will be calculating 0xd7f78 - 0xdfc00 which is 0xf...fff8378, and that falls foul of commit 86c9573369616e7437481b6e5533aef3a435cdcf Author: Alan Modra <amodra@gmail.com> Date: Sat Mar 8 13:05:06 2014 +1030 Better overflow checking for powerpc32 relocations cmplwi has an *unsigned* 16-bit field, and we now check the overflow properly. I wonder how many more of these we'll hit, and whether the uproar will be enough that I'll be forced to relax the checks?
* score: Fix CPU context usage on SMPSebastian Huber2014-05-082-14/+6
| | | | | | | | | | We must not alter the is executing indicator in _CPU_Context_Initialize() since this would cause an invalid state during a self restart. The is executing indicator must be valid at creation time since otherwise _Thread_Kill_zombies() uses an undefined value for not started threads. This could result in a system life lock.
* score: Implement forced thread migrationSebastian Huber2014-05-072-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation of task migration in RTEMS has some implications with respect to the interrupt latency. It is crucial to preserve the system invariant that a task can execute on at most one processor in the system at a time. This is accomplished with a boolean indicator in the task context. The processor architecture specific low-level task context switch code will mark that a task context is no longer executing and waits that the heir context stopped execution before it restores the heir context and resumes execution of the heir task. So there is one point in time in which a processor is without a task. This is essential to avoid cyclic dependencies in case multiple tasks migrate at once. Otherwise some supervising entity is necessary to prevent life-locks. Such a global supervisor would lead to scalability problems so this approach is not used. Currently the thread dispatch is performed with interrupts disabled. So in case the heir task is currently executing on another processor then this prolongs the time of disabled interrupts since one processor has to wait for another processor to make progress. It is difficult to avoid this issue with the interrupt latency since interrupts normally store the context of the interrupted task on its stack. In case a task is marked as not executing we must not use its task stack to store such an interrupt context. We cannot use the heir stack before it stopped execution on another processor. So if we enable interrupts during this transition we have to provide an alternative task independent stack for this time frame. This issue needs further investigation.
* score: Clarify TLS supportSebastian Huber2014-04-171-1/+1
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* Change all references of rtems.com to rtems.org.Chris Johns2014-03-2118-19/+19
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