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2009-09-092009-09-09 Till Straumann <strauman@slac.stanford.edu>Till Straumann1-0/+40
2009-07-30Try enabling the data cache.Eric Norum1-5/+4
2009-07-28PR 1420/bspsEric Norum1-1/+6
2009-06-02As per Freescale chip errata, disable buffered writes.Eric Norum1-3/+15
2008-05-19Back out changes from 2008-05-16 -- they don't seem to work.Eric Norum1-4/+24
2008-05-16Use shared version of bootstrap to set up workspace.Eric Norum1-24/+4
2008-05-122008-05-12 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill1-1/+0
2008-04-24More clean up of FPGA interrupts.Eric Norum1-2/+1
2008-04-08startup/bspstart.c: Clean up non-FPGA use of EPORT interrupts.Eric Norum1-11/+3
2007-12-112007-12-11 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill1-9/+1
2007-12-042007-12-04 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill1-6/+0
2007-12-032007-12-03 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill1-6/+0
2007-11-262007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill1-199/+202
2007-03-122007-03-12 Joel Sherrill <joel@OARcorp.com>Joel Sherrill1-1/+1
2007-03-112007-03-11 Joel Sherrill <joel@OARcorp.com>Joel Sherrill1-3/+2
2006-12-15 * startup/bspstart.c: Changed BSP_installVME_isr() so thatTill Straumann1-69/+138
2006-08-01Add bsp_setbenv system call.Eric Norum1-1/+2
2006-05-15Allow single spurious FPGA interrupt.Eric Norum1-3/+8
2006-05-15Improve handling of unexpected FPGA interrupt conditions.Eric Norum1-3/+19
2006-04-11Add default exception handler.Eric Norum1-0/+52
2006-03-24Add missing reset cause bit.Eric Norum1-0/+1
2006-02-06Avoid possible division by zero.Eric Norum1-1/+1
2006-01-29Add code to maintain CPU load average.Eric Norum1-1/+4
2005-12-19Add another 'extended BSP' routine which returns reboot status register infor...Eric Norum1-0/+37
2005-11-07Assign copyright to OAR since all files descend from OAR's source.Eric Norum1-6/+2
2005-09-16Add bsp_reset bootrom call.Eric Norum1-0/+1
2005-07-06Enable CS1* and CS2* now that Arcturus bootstrap PROMs no longer take care of...Eric Norum1-0/+1
2005-05-24Try to maintain compatability with everyone else's VBR changes.Eric Norum1-5/+0
2005-05-11Followup fix to Joel's earlier _VBR changes.Eric Norum1-0/+5
2005-04-21Try insructioin-only cache.Eric Norum1-7/+19
2005-04-19Expose some read/write copies of configuration registers.Eric Norum1-22/+25
2005-04-10Set up IRQ1* handling properly.Eric Norum1-10/+11
2005-04-09FPGA interrupt status register is now 16-bit.Eric Norum1-3/+56
2005-03-10Add NOP after writing the CACR is there to address the issueEric Norum1-1/+24
2005-02-14Remove some now-unused declarations.Eric Norum1-1/+0
2005-02-14Don't cache flash.Eric Norum1-5/+1
2005-02-12Rearrange devLib address spaces.Eric Norum1-2/+2
2005-02-12Add some more system calls.Eric Norum1-9/+30
2005-02-10Name changes.Eric Norum1-3/+20
2005-02-08Intra-level priorities range from 0 to 7.Eric Norum1-1/+1
2005-02-08Ensure consistency of 'installed' bitmap.Eric Norum1-1/+5
2005-02-07Set INTC0_ICRx registers properly.Eric Norum1-1/+1
2005-02-05Clean up the RAM/FLASH sizes/locations are specified.Eric Norum1-17/+9
2005-02-04Fix flash base address.Eric Norum1-1/+1
2005-02-04Clean up INTC0 initialization. EPORT1-7 sources are fixed level/priority.Eric Norum1-14/+25
2005-02-042005-02-04 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius1-4/+4
2005-02-042005-02-04 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius1-1/+1
2005-02-03Add 'extended' BSP support (pseudo-VME)Eric Norum1-6/+109
2005-02-03Add support for interrupt controller allocation. This will provides aEric Norum1-1/+21
2005-02-02Clean up bootloader syscall handling.Eric Norum1-25/+25
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