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path: root/c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c (follow)
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* 2009-09-09 Till Straumann <strauman@slac.stanford.edu>Till Straumann2009-09-091-0/+40
* Try enabling the data cache.Eric Norum2009-07-301-5/+4
* PR 1420/bspsEric Norum2009-07-281-1/+6
* As per Freescale chip errata, disable buffered writes.Eric Norum2009-06-021-3/+15
* Back out changes from 2008-05-16 -- they don't seem to work.Eric Norum2008-05-191-4/+24
* Use shared version of bootstrap to set up workspace.Eric Norum2008-05-161-24/+4
* 2008-05-12 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2008-05-121-1/+0
* More clean up of FPGA interrupts.Eric Norum2008-04-241-2/+1
* startup/bspstart.c: Clean up non-FPGA use of EPORT interrupts.Eric Norum2008-04-081-11/+3
* 2007-12-11 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-111-9/+1
* 2007-12-04 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-041-6/+0
* 2007-12-03 Joel Sherrill <joel.sherrill@OARcorp.com>Joel Sherrill2007-12-031-6/+0
* 2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>Joel Sherrill2007-11-261-199/+202
* 2007-03-12 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2007-03-121-1/+1
* 2007-03-11 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2007-03-111-3/+2
* * startup/bspstart.c: Changed BSP_installVME_isr() so thatTill Straumann2006-12-151-69/+138
* Add bsp_setbenv system call.Eric Norum2006-08-011-1/+2
* Allow single spurious FPGA interrupt.Eric Norum2006-05-151-3/+8
* Improve handling of unexpected FPGA interrupt conditions.Eric Norum2006-05-151-3/+19
* Add default exception handler.Eric Norum2006-04-111-0/+52
* Add missing reset cause bit.Eric Norum2006-03-241-0/+1
* Avoid possible division by zero.Eric Norum2006-02-061-1/+1
* Add code to maintain CPU load average.Eric Norum2006-01-291-1/+4
* Add another 'extended BSP' routine which returns reboot status register infor...Eric Norum2005-12-191-0/+37
* Assign copyright to OAR since all files descend from OAR's source.Eric Norum2005-11-071-6/+2
* Add bsp_reset bootrom call.Eric Norum2005-09-161-0/+1
* Enable CS1* and CS2* now that Arcturus bootstrap PROMs no longer take care of...Eric Norum2005-07-061-0/+1
* Try to maintain compatability with everyone else's VBR changes.Eric Norum2005-05-241-5/+0
* Followup fix to Joel's earlier _VBR changes.Eric Norum2005-05-111-0/+5
* Try insructioin-only cache.Eric Norum2005-04-211-7/+19
* Expose some read/write copies of configuration registers.Eric Norum2005-04-191-22/+25
* Set up IRQ1* handling properly.Eric Norum2005-04-101-10/+11
* FPGA interrupt status register is now 16-bit.Eric Norum2005-04-091-3/+56
* Add NOP after writing the CACR is there to address the issueEric Norum2005-03-101-1/+24
* Remove some now-unused declarations.Eric Norum2005-02-141-1/+0
* Don't cache flash.Eric Norum2005-02-141-5/+1
* Rearrange devLib address spaces.Eric Norum2005-02-121-2/+2
* Add some more system calls.Eric Norum2005-02-121-9/+30
* Name changes.Eric Norum2005-02-101-3/+20
* Intra-level priorities range from 0 to 7.Eric Norum2005-02-081-1/+1
* Ensure consistency of 'installed' bitmap.Eric Norum2005-02-081-1/+5
* Set INTC0_ICRx registers properly.Eric Norum2005-02-071-1/+1
* Clean up the RAM/FLASH sizes/locations are specified.Eric Norum2005-02-051-17/+9
* Fix flash base address.Eric Norum2005-02-041-1/+1
* Clean up INTC0 initialization. EPORT1-7 sources are fixed level/priority.Eric Norum2005-02-041-14/+25
* 2005-02-04 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius2005-02-041-4/+4
* 2005-02-04 Ralf Corsepius <ralf.corsepius@rtems.org>Ralf Corsepius2005-02-041-1/+1
* Add 'extended' BSP support (pseudo-VME)Eric Norum2005-02-031-6/+109
* Add support for interrupt controller allocation. This will provides aEric Norum2005-02-031-1/+21
* Clean up bootloader syscall handling.Eric Norum2005-02-021-25/+25
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