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* bsps: Include missing header fileSebastian Huber2017-07-121-0/+1
* Add interrupt vector set/get affinitySebastian Huber2017-07-121-2/+7
* bsps/arm: Fix bit field offset in GIC supportSebastian Huber2017-05-111-1/+1
* libbsp/arm: Add the TTB table to the default MMU set up as read/write.Chris Johns2016-08-151-0/+4
* arm/bsps: CP15 and basic cache support entire cache clean for more architectu...Pavel Pisa2016-07-201-1/+5
* bsps/arm: basic on core cache support changed to use l1 functions.Pavel Pisa2016-07-041-42/+29
* bsps/arm: Support recent bootloaders starting kernel in HYP modePavel Pisa2016-07-042-2/+15
* bsps: Add defines for some linker subsectionsSebastian Huber2016-05-311-1/+7
* score: Distribute clock tick to all online CPUsSebastian Huber2016-03-041-0/+5
* bsp/atsam: NewSebastian Huber2016-01-191-0/+39
* bsps/arm: Fix broken switch statementSebastian Huber2016-01-181-3/+4
* bsps: Generalize .nocacheheap to .nocachenoloadSebastian Huber2015-10-282-2/+8
* bsps/arm: Add missing translation table entrySebastian Huber2015-10-141-0/+4
* bsps: Add .nocacheheap sectionSebastian Huber2015-10-081-5/+5
* bsps/arm: Fix function definitionSebastian Huber2015-09-041-1/+1
* bsps/arm: Do not use __ARM_ARCH_7A__Sebastian Huber2015-07-311-28/+16
* bsps/arm: Update due to API changesSebastian Huber2015-07-211-4/+4
* bsps/arm: Add .nocache sectionSebastian Huber2014-11-272-1/+17
* bsps/arm: L1 cache support changesSebastian Huber2014-11-201-16/+21
* bsps/arm: Convert PL011 and PL050 console driversSebastian Huber2014-10-142-6/+28
* bsps/arm: Add a9mpcore_clock_initialize_early()Sebastian Huber2014-09-101-1/+10
* bsps/arm: Fix GIC tm27 supportSebastian Huber2014-09-101-15/+29
* Common ARM A8 code.Chris Johns2014-07-161-0/+55
* bsps/arm: Rename bsp_mm_config_tableSebastian Huber2014-07-011-2/+4
* bsps/arm: Change L2 cache initializationSebastian Huber2014-06-061-47/+0
* bsps/arm: Define ARM_CP15_TEXT_SECTIONSebastian Huber2014-06-062-42/+1
* bsps/arm: Simplify L1 caches supportSebastian Huber2014-06-051-55/+12
* bsps/arm: Cortex-A9 MPCore startSebastian Huber2014-06-051-0/+5
* bsps/arm: Cortex-A9 MPCore startSebastian Huber2014-06-051-4/+4
* bsps/arm: Cortex-A9 MPCore startSebastian Huber2014-06-051-6/+13
* bsps/arm: Simplify Cortex-A9 MPCore startSebastian Huber2014-06-051-31/+32
* bsp/arm: Broadcast cache maintenancesRalf Kirchner2014-05-281-1/+1
* bsps/arm: Declare return typesSebastian Huber2014-05-071-7/+8
* bsp/arm: Add cache size methodsRalf Kirchner2014-04-171-0/+33
* bsp/arm: Remove unused cache store methodsRalf Kirchner2014-04-171-9/+0
* bsp/arm: Correct cache misalignment handlingRalf Kirchner2014-04-171-6/+6
* bsp/arm: Consistenly same handling for flushingRalf Kirchner2014-04-171-2/+2
* bsp/arm: RTEMS_SMP to arm erratum 764369 detectionRalf Kirchner2014-04-173-10/+8
* bsp/arm: Erratum 764369 after enabling SCURalf Kirchner2014-04-171-1/+1
* bsp/arm: Correct detection of arm erratum 764368Ralf Kirchner2014-04-171-0/+1
* bsp/arm: Cleanup L1 cacheRalf Kirchner2014-04-171-2/+2
* Change all references of rtems.com to rtems.org.Chris Johns2014-03-2117-17/+17
* bsp/arm: Add handling for level 2 L2C-310 cache controllerRalf Kirchner2014-03-131-0/+483
* bsp/arm: Add SCU errata handling for L2C-310 cacheRalf Kirchner2014-03-132-10/+36
* bsp/arm: Add arm-errata.h and arm-release-id.hRalf Kirchner2014-03-132-0/+279
* bsp/arm: Add linker symbol bsp_processor_countRalf Kirchner2014-03-131-0/+2
* bsp/arm: Separate setup for translation tableRalf Kirchner2014-03-131-4/+20
* bsp/arm: Invalidate SCURalf Kirchner2014-03-132-1/+25
* score: Rename rtems_smp_process_interrupt()Sebastian Huber2014-02-191-1/+0
* score: Rename rtems_smp_secondary_cpu_initialize()Sebastian Huber2014-02-191-1/+2
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