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* 2001-01-12 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-122-2/+7
| | | | | * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected register constraints from "general" to "register".
* 2001-01-09 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-094-6/+27
| | | | | * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants to make it easier to conditionalize the code for various ISA levels.
* 2001-01-08 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-084-3/+16
| | | | | | | | * idtcpu.h: Commented out definition of "wait". It was stupid to use such a common word as a macro. * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3. * rtems/score/mips.h: Added include of <idtcpu.h>. * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
* 2001-01-03 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2001-01-033-7/+20
| | | | | * rtems/score/cpu.h: Added _CPU_Initialize_vectors(). * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
* 2000-12-19 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-192-1/+9
| | | | | | * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register. Previous code resulting in the interrupted immediately returning to the caller of the routine it was inside.
* 2000-12-19 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-192-11/+5
| | | | | * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here because it has not been allocated yet.
* 2000-12-13 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-134-82/+16
| | | | | | | | * cpu.c: Removed duplicate declaration for _ISR_Vector_table. * cpu_asm.S: Removed assembly language to vector ISR handler on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP. * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No longer a constant -- get the real value from libcpu.
* 2000-12-13 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-1312-713/+281
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * cpu_asm.h: Removed. * Makefile.am: Remove cpu_asm.h. * rtems/score/mips64orion.h: Renamed mips.h. * rtems/score/mips.h: New file, formerly mips64orion.h. Header rewritten. (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask, mips_disable_in_interrupt_mask): New macros. * rtems/score/Makefile.am: Reflect renaming mips64orion.h. * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the few defines that were in <cpu_asm.h>. * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine. MIPS ISA 3 is still in assembly for now. (_CPU_Thread_Idle_body): Rewrote in C. * cpu_asm.S: Rewrote file header. (FRAME,ENDFRAME) now in asm.h. (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C. (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C. (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and leaves other bits in SR alone on task switch. (mips_enable_interrupts,mips_disable_interrupts, mips_enable_global_interrupts,mips_disable_global_interrupts, disable_int, enable_int): Removed. (mips_get_sr): Rewritten as C macro. (_CPU_Thread_Idle_body): Rewritten in C. (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and placed in libcpu. (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved to libcpu/mips/shared/interrupts. (general): Cleaned up comment blocks and #if 0 areas. * idtcpu.h: Made ifdef report an error. * iregdef.h: Removed warning. * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable number defined by libcpu. (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines to access SR. (_CPU_ISR_Set_level): Rewritten as macro for ISA I. (_CPU_Context_Initialize): Honor ISR level in task initialization. (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
* 2000-12-06 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-12-062-0/+21
| | | | | * rtems/score/cpu.h: When mips ISA level is 1, registers in the context should be 32 not 64 bits.
* 2000-11-30 Joel Sherrill <joel@OARcorp.com>Joel Sherrill2000-11-302-2/+14
| | | | | | * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to correct name of _CPU_Context_switch_restore. Added dummy version of exc_utlb_code() so applications would link.
* 2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-11-092-1/+5
| | | | * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
* 2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-11-022-1/+5
| | | | * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
* 2000-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-10-252-1/+6
| | | | | * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros. Switch to GNU canonicalization.
* 2000-10-24 Alan Cudmore <alanc@linuxstart.com> andJoel Sherrill2000-10-2413-368/+641
| | | | | | | | | | | | | | | | | | | | | | | | | | | Joel Sherrill <joel@OARcorp.com> * This is a major reworking of the mips64orion port to use gcc predefines as much as possible and a big push to multilib the mips port. The mips64orion port was copied/renamed to mips to be more like other GNU tools. Alan did most of the technical work of determining how to map old macro names used by the mips64orion port to standard compiler macro definitions. Joel did the merge with CVS magic to keep individual file history and did the BSP modifications. Details follow: * Makefile.am: idtmon.h in mips64orion port not present. * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added. * cpu.c: Comments added. * cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added. First attempt at exception/interrupt processing for ISA level 1 and minus any use of IDT/MON added. * idtcpu.h: Conditionals changed to use gcc predefines. * iregdef.h: Ditto. * cpu_asm.h: No real change. Merger required commit. * rtems/Makefile.am: Ditto. * rtems/score/Makefile.am: Ditto. * rtems/score/cpu.h: Change MIPS64ORION to MIPS. * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
* 2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-09-052-0/+5
| | | | * Makefile.am: Include compile.am.
* Adding ChangeLogs.Joel Sherrill2000-08-101-0/+3
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* Port of RTEMS to the Texas Instruments C3x/C4x DSP families includingJoel Sherrill2000-07-261-0/+1
| | | | | | | | | | | a BSP (c4xsim) supporting the simulator included with gdb. This port was done by Joel Sherrill and Jennifer Averett of OAR Corporation. Also included with this port is a space/time optimization to eliminate FP context switch management on CPUs without hardware or software FP. An issue with this port was that sizeof(unsigned32) = sizeof(unsigned8) on this CPU. This required addressing alignment checks and assumptions as well as fixing code that assumed sizeof(unsigned32) == 4.
* Removed no cpu references.Joel Sherrill2000-07-117-8/+8
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* Patch rtems-rc-20000708-1.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-07-101-3/+0
| | | | | | | | | | | | | | | | | that is another small step toward multilibs: Changes: * Eliminate RTEMS_CHECK_CUSTOM_BSP from all configure.ins below exec/ * Add RTEMS_CHECK_CUSTOM_BSP to the multilib-disabled branch in RTEMS_ENV_RTEMSCPU to preserve the old per-BSP building scheme functional. Notes: * --enable-multilibs is still non-functional * This patch should not have any influence on the old building scheme (--disable-multilib should silently fall back to the old building scheme). * running ./bootstrap is required after applying the patch
* Patch rtems-rc-20000705-3.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-07-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | that is a somewhat experimental, multilib-related patch: Changes: * Use RTEMS_ENV_RTEMSCPU instead of RTEMS_ENV_RTEMSBSP in configure.ins below exec/. At the moment, RTEMS_ENV_RTEMSCPU is more or less an optical change to emphasize that these subdirectories shall not depend on RTEMS_BSP than a real behavioral change. * Add AC_DEFINE_* to several aclocal/*.m4 macros to prepare autoheader/autoconf generated targopts.h and similiar configuration headers. * c/src/configure.in: remove exec from cfg_subdirs if multilibs are enabled (c/src is build per bsp, exec shall be build per cpu in c/ or from the toplevel in future, when multilibs are enabled.) Notes: * This patch should not have any impact on the current building scheme. * --enable-multilib still does not work. * running bootstrap from the toplevel directory is required. CVS: ---------------------------------------------------------------------- CVS: Enter Log. Lines beginning with `CVS:' are removed automatically CVS: CVS: Committing in . CVS: CVS: Modified Files: CVS: c/src/tests/libtests/termios/init.c CVS: ----------------------------------------------------------------------
* Interrupt stack is allocated in _ISR_Handler_initialization notJoel Sherrill2000-07-031-1/+1
| | | | _Interrupt_Manager_initialization.
* Merged from 4.5.0-beta3aJoel Sherrill2000-06-125-12/+30
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* Patch rtems-rc-4.5.0-13-cvs.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>.Joel Sherrill2000-04-133-0/+17
| | | | adds .cvsignore.
* Patches rtems-rc-20000204-0.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-02-081-4/+1
| | | | | | | | | | | | | | | | | that contains: * Removes remaining (now illegal) references to $(SRC) from a couple of Makefile.ams * Removes duplicate AC_CONFIG_SUBDIRS macro from c/configure.in * Moves ENABLE_LIBCDIR into RTEMS_PROG_C[C|XX]_FOR_TARGET (hides LIBCDIR from most configure scripts, i.e. LIBCDIR becomes less visible) * Adds RTEMS_PROG_C[C|XX]_FOR_TARGET and RTEMS_CANONICALIZE_TOOLS to libbsp/*/configure.ins (A minor bug in previous implementations, which only has an impact when switching to GNU/Cygnus canonicalization) * Cleans up several bogus comments. * Removes MKLIB * Switches the version number to 4.5.0 (for testing version number handling)
* Patches rtems-rc-20000118-3.diff and rtems-rc-20000118-4.diff fromJoel Sherrill2000-01-311-20/+16
| | | | | | | | | | Ralf Corsepius <corsepiu@faw.uni-ulm.de> that contain: * Modifications, (minor) corrections, cleanups to most existing Makefile.ams * Adds automake support to all remaining BSPs which have not yet been converted to automake. * Makefile.am for all remaining wrapup/Makefile.ams
* Patch rtems-rc-20000118-1.diff from Ralf Corsepius <corsepiu@faw.uni-ulm.de>Joel Sherrill2000-01-311-3/+0
| | | | | | | | | | | | | | that contains: * cleanups to configuration files * A reworked gccnewlib.spec.in: I have reformated it for enhanced readability and added more rtems-base packages. It now should be free of any installation conflicts (If there still remain some, they should be regarded as bugs). * A fix to the bin2boot RTEMS_BSP issue (make RTEMS_BSP="pc386 pc486" now works). * removes libbsp/bare/wrapup * Further cleanups
* Patch rtems-rc-19991123-rc-2.diff from Ralf CorsepiusJoel Sherrill1999-12-013-0/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | <corsepiu@faw.uni-ulm.de> which implements automake support for some score/cpu/<RTEMS_CPU> subdirectories and fixes a few minor configuration bugs. To apply: rm -rf c/src/exec/score/cpu/a29k/wrap rm -rf c/src/exec/score/cpu/hppa1.1/wrap rm -rf c/src/exec/score/cpu/i386/wrap rm -rf c/src/exec/score/cpu/mips64orion/wrap rm -rf c/src/exec/score/cpu/no_cpu/wrap patch -p1 < rtems-rc-19991123-rc-2.diff.gz Notes: * I don't see a possiblity to convert the powerpc subdirectory in its current layout to automake the time being. * Besides the fact that this subdirectory is not in single-tree building layout, the actual showstopper is the ifeq $(RTEMS_CPU_MODEL),mpc750) gmake-conditional in powerpc/Makefile.in, which automake (correctly) refuses to handle. * The problem is *not* specific to the powerpc. Other CPUs basically have similar problems (SH:sh7032 vs sh7045, SPARC: erc32.h in score/cpu/sparc), but have been lucky to get around real issues (cf. configuration files below score/cpu/sh/). * From a configuration focused POV this problem boils down to a file/subdirectory selection problem: ppc: 1 or others sh: 1 out of 2 sparc: 1 out of 1 Automake's means to implement such behavior is using conditionals to be evaluated at configuration-time. The old configuration scheme however used make-time conditionals. The SH port was lucky to get around this issue because it applies a selection from a limited set of possible selections, the powerpc however applies a selection from an unlimited set, based on data not being available at configuration time. * Currently I only see two general solutions: 1) make RTEMS_CPU_MODEL available at configuration time, ie. replace make-time configuration by configuration-time configuration 2) Perform the selection at build-time, i.e. always install all files, but use #ifdef #else #endif in source files. This is what the m68k has exploited at other locations inside of the source-tree. => This directory is the last one remaining not using automake below the whole exec/ hierarchy.
* Patch rtems-rc-19991123-rc-2.diff from Ralf CorsepiusJoel Sherrill1999-12-011-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | <corsepiu@faw.uni-ulm.de> which implements automake support for some score/cpu/<RTEMS_CPU> subdirectories and fixes a few minor configuration bugs. To apply: rm -rf c/src/exec/score/cpu/a29k/wrap rm -rf c/src/exec/score/cpu/hppa1.1/wrap rm -rf c/src/exec/score/cpu/i386/wrap rm -rf c/src/exec/score/cpu/mips64orion/wrap rm -rf c/src/exec/score/cpu/no_cpu/wrap patch -p1 < rtems-rc-19991123-rc-2.diff.gz Notes: * I don't see a possiblity to convert the powerpc subdirectory in its current layout to automake the time being. * Besides the fact that this subdirectory is not in single-tree building layout, the actual showstopper is the ifeq $(RTEMS_CPU_MODEL),mpc750) gmake-conditional in powerpc/Makefile.in, which automake (correctly) refuses to handle. * The problem is *not* specific to the powerpc. Other CPUs basically have similar problems (SH:sh7032 vs sh7045, SPARC: erc32.h in score/cpu/sparc), but have been lucky to get around real issues (cf. configuration files below score/cpu/sh/). * From a configuration focused POV this problem boils down to a file/subdirectory selection problem: ppc: 1 or others sh: 1 out of 2 sparc: 1 out of 1 Automake's means to implement such behavior is using conditionals to be evaluated at configuration-time. The old configuration scheme however used make-time conditionals. The SH port was lucky to get around this issue because it applies a selection from a limited set of possible selections, the powerpc however applies a selection from an unlimited set, based on data not being available at configuration time. * Currently I only see two general solutions: 1) make RTEMS_CPU_MODEL available at configuration time, ie. replace make-time configuration by configuration-time configuration 2) Perform the selection at build-time, i.e. always install all files, but use #ifdef #else #endif in source files. This is what the m68k has exploited at other locations inside of the source-tree. => This directory is the last one remaining not using automake below the whole exec/ hierarchy.
* Updated copyright notice.Joel Sherrill1999-11-179-15/+9
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* This is another pass at making sure that nothing outside the BSPJoel Sherrill1999-11-051-0/+9
| | | | | | | | | | | | unnecessarily uses any variables defined by the BSP. On this sweep, use of BSP_Configuration and Cpu_table was eliminated. A significant part of this modification was the addition of macros to access fields in the RTEMS configuration structures. This is necessary to strengthen the division between the BSP independent parts of RTEMS and the BSPs themselves. This started after comments and analysis by Ralf Corsepius <corsepiu@faw.uni-ulm.de>.
* The files in libcpu should not be directly dependent on any BSP. InJoel Sherrill1999-11-041-1/+4
| | | | | | | | | | | particular, using bsp.h, or getting information from the BSP which should properly be obtained from RTEMS is forbidden. This is necessary to strengthen the division between the BSP independent parts of RTEMS and the BSPs themselves. This started after comments and analysis by Ralf Corsepius <corsepiu@faw.uni-ulm.de>. The changes primarily eliminated the need to include bsp.h and peeking at BSP_Configuration. The use of Cpu_table in each BSP needs to be eliminated.
* Patch from Charles-Antoine Gauthier <charles.gauthier@iit.nrc.ca>Joel Sherrill1999-07-291-1/+1
| | | | | to correct a typo CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES was actually typed in as CPU_CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES.
* Patch from Daniel Kelley <dank@icube.com>:Joel Sherrill1999-05-181-4/+4
| | | | | | I found a small buglet in the mips64orion _CPU_ISR_Set_level; the original was wiping out the level argument, and then comparing the current interrupt level with some random value of v0. See patch below.
* Fixed paths to include files so this will build.Joel Sherrill1999-03-314-0/+1051
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* Moved asm.h back up in tree.Joel Sherrill1999-02-191-0/+102
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* Moved to proper rtems/scoreJoel Sherrill1999-02-194-217/+148
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* Part of the automake VI patch from Ralf Corsepius <corsepiu@faw.uni-ulm.de>:Joel Sherrill1999-02-183-0/+1115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | > 4) rtems-rc-19990202-0.diff /reorg-score-cpu.sh > > reorg-score-cpu.sh reorganizes the cpu/<cpu>/* subdirectories in a > similar manner than previous reorg scripts did. rtems-rc-19990202-0.diff > contains the diffs after reorg-score-cpu.sh has been run on a > rtems-19981215 snapshot + my patches up to rtems-rc-19990131-2.diff. > > This patch is rather nasty and may break something. However, I've tested > it for about 10 different target/bsp pairs and believe to have shaken > out most bugs. I wonder about the following .h files that were not moved: a29k/asm.h a29k/cpu_asm.h i386/asm.h i960/asm.h m68k/asm.h m68k/m68302.h m68k/m68360.h m68k/qsm.h m68k/sim.h mips64orion/asm.h mips64orion/cpu_asm.h mips64orion/mips64orion.h no_cpu/asm.h no_cpu/cpu_asm.h powerpc/asm.h powerpc/mpc860.h sh/asm.h sparc/asm.h sparc/erc32.h
* Yet another part of automake VI from Ralf Corsepius <corsepiu@faw.uni-ulm.de>:Joel Sherrill1999-02-183-936/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | > 4) rtems-rc-19990202-0.diff /reorg-score-cpu.sh > > reorg-score-cpu.sh reorganizes the cpu/<cpu>/* subdirectories in a > similar manner than previous reorg scripts did. rtems-rc-19990202-0.diff > contains the diffs after reorg-score-cpu.sh has been run on a > rtems-19981215 snapshot + my patches up to rtems-rc-19990131-2.diff. > > This patch is rather nasty and may break something. However, I've tested > it for about 10 different target/bsp pairs and believe to have shaken > out most bugs. I wonder about the following .h files that were not moved: a29k/asm.h a29k/cpu_asm.h i386/asm.h i960/asm.h m68k/asm.h m68k/m68302.h m68k/m68360.h m68k/qsm.h m68k/sim.h mips64orion/asm.h mips64orion/cpu_asm.h mips64orion/mips64orion.h no_cpu/asm.h no_cpu/cpu_asm.h powerpc/asm.h powerpc/mpc860.h sh/asm.h sparc/asm.h sparc/erc32.h
* Switched to use of ASM compilation conditional.Joel Sherrill1998-12-151-2/+2
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* Changed reference from no_cpu to mips64orion.Joel Sherrill1998-12-151-1/+1
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* updated copyright to 1998Joel Sherrill1998-02-174-4/+4
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* Fixed typo in the pointer to the license terms.Joel Sherrill1997-10-084-8/+8
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* headers updated to reflect new style copyright notice as partJoel Sherrill1997-04-225-20/+20
| | | | of switching to the modified GNU GPL.
* added "ifndef" to avoid redefinition warningJoel Sherrill1997-04-071-0/+2
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* commented out sccs_id to eliminate warning.Joel Sherrill1997-04-072-6/+13
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* Added include of targopts.h.Joel Sherrill1997-01-291-0/+1
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* added $Id$ to file headersJoel Sherrill1996-09-118-5/+8
| | | | cpu.h: added prototype for _CPU_ISR_Get_level()
* new file for MIPS port by Craig Lebakken (lebakken@minn.net) andJoel Sherrill1996-09-068-0/+2384
Derrick Ostertag (ostertag@transition.com).
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