Commit message (Collapse) | Author | Age | Files | Lines | |
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* | bsps/x86_64: Add APIC timer based clock driver | Amaan Cheval | 2018-08-13 | 6 | -0/+614 |
| | | | | | | | | | The APIC timer is calibrated by running the i8254 PIT for a fraction of a second (determined by PIT_CALIBRATE_DIVIDER) and counting how many times the APIC counter has ticked. The calibration can be run multiple times (determined by APIC_TIMER_NUM_CALIBRATIONS) and averaged out. Updates #2898. | ||||
* | bsps/x86_64: Add support for RTEMS interrupts | Amaan Cheval | 2018-08-13 | 5 | -0/+394 |
| | | | | Updates #2898. | ||||
* | bsps/x86_64: Add paging support with 1GiB super pages | Amaan Cheval | 2018-08-13 | 4 | -0/+247 |
| | | | | Updates #2898. | ||||
* | bsps/x86_64: Reduce default RamSize to 1GiB | Amaan Cheval | 2018-08-13 | 1 | -3/+3 |
| | | | | | | | Simulators may not always be able to allocate 4GiB easily, and using an artificially lower RAM may cause a broken heap. Updates #2898. | ||||
* | bsps/x86_64: Reorganize header files and compile-options | Amaan Cheval | 2018-08-13 | 1 | -0/+3 |
| | | | | Updates #2898. | ||||
* | bsps/sparc/include/bsp/gradcdac.h: Fix nested comment warning | Joel Sherrill | 2018-08-10 | 1 | -1/+1 |
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* | qoriq/include/tm27.h: Fix prototype warning | Joel Sherrill | 2018-08-10 | 1 | -2/+2 |
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* | motorola_powerpc/include/tm27.h: Fix prototype warning | Joel Sherrill | 2018-08-10 | 1 | -4/+4 |
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* | bsps/powerpc/include/mpc83xx/mpc83xx.h: Fix nested comment warning | Joel Sherrill | 2018-08-10 | 1 | -1/+1 |
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* | bsps/powerpc/include/bsp/tictac.h: Fix protototype warnings | Joel Sherrill | 2018-08-10 | 1 | -4/+4 |
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* | gen83xx/include/tm27.h: Fix prototype warning | Joel Sherrill | 2018-08-10 | 1 | -1/+1 |
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* | gen5200/include/tm27.h: Fix prototype warning | Joel Sherrill | 2018-08-10 | 1 | -4/+4 |
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* | gen5200/include/bsp/ata.h: Fix warning | Joel Sherrill | 2018-08-10 | 1 | -0/+2 |
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* | csb337/include/at91rm9200_dbgu.h: Fix nested comment warning | Joel Sherrill | 2018-08-10 | 1 | -1/+1 |
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* | bsps/sparc: Fix external variable declarations | Sebastian Huber | 2018-08-10 | 1 | -2/+2 |
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* | bsps/sparc: Move polled APBUART functions | Sebastian Huber | 2018-08-10 | 6 | -124/+62 |
| | | | | This reduces the link-time dependencies and avoids copy-and-paste. | ||||
* | bsp/atsam: Fix handling of slow SPI speeds. | Christian Mauderer | 2018-08-09 | 1 | -1/+20 |
| | | | | | This patch fixes an overflow in the frequency calculation of the SPI driver for slow SPI speeds. | ||||
* | bsp/gen5200: Avoid deprecated routine | Sebastian Huber | 2018-08-07 | 1 | -1/+3 |
| | | | | Update #3358. | ||||
* | libchip/ata: Use rtems_blkdev_create() | Sebastian Huber | 2018-08-07 | 2 | -48/+13 |
| | | | | Update #3358. | ||||
* | bsp/smdk2410: Use rtems_blkdev_create() | Sebastian Huber | 2018-08-07 | 1 | -11/+3 |
| | | | | Update #3358. | ||||
* | bsps/lm32: Use rtems_blkdev_create() | Sebastian Huber | 2018-08-07 | 1 | -33/+3 |
| | | | | Update #3358. | ||||
* | bsps: Fix the generic IRQ support | Sebastian Huber | 2018-08-03 | 3 | -16/+43 |
| | | | | | | | | | The genmcf548x partly uses is own implementation of the interrupt extension API for libbsd support. This patch is a part of the BSP source reorganization. Update #3285. | ||||
* | bsp/riscv: Add missing BSP variant | Sebastian Huber | 2018-08-02 | 1 | -0/+9 |
| | | | | Update #3433. | ||||
* | bsp/riscv: Fix build with RTEMS_SMP undefined | Sebastian Huber | 2018-08-02 | 3 | -12/+10 |
| | | | | Update #3433. | ||||
* | bsp/riscv: Fix a synchronization issue for PLIC | Sebastian Huber | 2018-08-02 | 1 | -0/+8 |
| | | | | Update #3433. | ||||
* | bsp/riscv: Remove unused variable | Sebastian Huber | 2018-08-01 | 1 | -4/+0 |
| | | | | Update #3433. | ||||
* | bsp/riscv: Add NS16750 support to console driver | Sebastian Huber | 2018-08-01 | 1 | -36/+74 |
| | | | | Update #3433. | ||||
* | serial/ns16550: Precision clock synthesizer | Sebastian Huber | 2018-08-01 | 2 | -13/+68 |
| | | | | | | Set the FIFO control register while DLAB == 1 in the line control register. At least on the QorIQ T4240 the driver still works with the re-ordered FIFO control register access. | ||||
* | serial/ns16550: Use standard register names | Sebastian Huber | 2018-08-01 | 1 | -4/+4 |
| | | | | | Use the standard register names for the divisor latches. This makes it easier to compare the code with other driver implementations. | ||||
* | bsp/riscv: Initialize FPU depending on ISA | Sebastian Huber | 2018-08-01 | 1 | -1/+4 |
| | | | | | | Initialize fcsr to zero for a defined rounding mode. Update #3433. | ||||
* | bsp/riscv: Fix clock driver | Sebastian Huber | 2018-08-01 | 1 | -17/+49 |
| | | | | | | Do not assume that mtime is zero at boot time. Update #3433. | ||||
* | bsps/sparc: Fix typo in start.S | Sebastian Huber | 2018-08-01 | 1 | -1/+1 |
| | | | | | Fix typo in start.S introduced by 4678d1a8b0e74a12809122ef071324c99e78d7ff. | ||||
* | bsp/riscv: Fix inter-processor interrupts | Sebastian Huber | 2018-07-27 | 1 | -1/+7 |
| | | | | | | | | The previous version worked only on a patched Qemu. Writes to mip are illegal according to the The RISC-V Instruction Set Manual, Volume II: Privileged Architecture, Privileged Architecture Version 1.10. Update #3433. | ||||
* | riscv: Rework CPU counter support | Sebastian Huber | 2018-07-27 | 1 | -4/+18 |
| | | | | Update #3433. | ||||
* | bsp/riscv: Use interrupt driven NS16550 driver | Sebastian Huber | 2018-07-25 | 2 | -2/+11 |
| | | | | Update #3433. | ||||
* | bsp/riscv: Add PLIC support | Sebastian Huber | 2018-07-25 | 5 | -3/+263 |
| | | | | Update #3433. | ||||
* | bsp/riscv: Add simple SMP support to clock driver | Sebastian Huber | 2018-07-25 | 1 | -0/+2 |
| | | | | | | This is a hack. The clock interrupt should be handled by each hart. Update #3433. | ||||
* | bsp/riscv: Use CPU counter btimer | Sebastian Huber | 2018-07-25 | 1 | -68/+0 |
| | | | | Update #3433. | ||||
* | bsp/riscv: Add basic SMP startup | Sebastian Huber | 2018-07-25 | 7 | -27/+298 |
| | | | | Update #3433. | ||||
* | riscv: Add CLINT and PLIC support | Sebastian Huber | 2018-07-25 | 3 | -62/+4 |
| | | | | | | The CLINT and PLIC need some per-processor state. Update #3433. | ||||
* | bsps/riscv: Update linker-symbols.h | Sebastian Huber | 2018-07-25 | 1 | -15/+16 |
| | | | | Update #3433. | ||||
* | bsp/riscv: Add reset via for SiFive Test Finisher | Sebastian Huber | 2018-07-25 | 1 | -5/+18 |
| | | | | Update #3433. | ||||
* | bsp/riscv: Add and use riscv_fdt_get_address() | Sebastian Huber | 2018-07-25 | 5 | -25/+81 |
| | | | | Update #3433. | ||||
* | bsp/riscv: Fix HTIF warnings | Sebastian Huber | 2018-07-25 | 5 | -5/+62 |
| | | | | Update #3433. | ||||
* | riscv: Rework exception handling | Sebastian Huber | 2018-07-25 | 8 | -52/+89 |
| | | | | | | | | | | | Remove _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector() functions. Applications can install an exception handler via the fatal error handler to handle synchronous exceptions. Handle interrupt exceptions via _RISCV_Interrupt_dispatch() which must be provided by the BSP. Update #3433. | ||||
* | _SMP_Start_multitasking_on_secondary_processor() | Sebastian Huber | 2018-07-25 | 5 | -6/+6 |
| | | | | | Pass current processor control as first parameter to make dependency more explicit. | ||||
* | bsps: bsp_start_on_secondary_processor() | Sebastian Huber | 2018-07-25 | 6 | -13/+19 |
| | | | | | | Pass current processor control as first parameter in bsp_start_on_secondary_processor() and qoriq_start_thread() to make dependency more explicit. | ||||
* | score: _SMP_Inter_processor_interrupt_handler() | Sebastian Huber | 2018-07-25 | 6 | -6/+8 |
| | | | | | Pass current processor control via parameter since it may be already available at the caller side. | ||||
* | bsps: Fix function declaration warnings | Sebastian Huber | 2018-07-24 | 10 | -17/+20 |
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* | bsp/beagle: Fix warnings | Sebastian Huber | 2018-07-24 | 1 | -5/+5 |
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