| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
|
| |
The descriptor table size is equal to its alignment and set when
configuring the HW IP through VHDL generics. This SW patch simply
probes the HW how large the RX/TX descriptor tables are and adjusts
accordingly.
The number of descriptors actual used are controlled by other
settings (rxDescs and txDescs) controlled by the user.
Update #4308.
|
|
|
|
| |
Update #4307.
|
|
|
|
| |
Update #4307.
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The new GRCAN_FD IP supports CAN FD standard and is mostly backwards
compatible with GRCAN SW interface. The GRCAN driver have been extended
to support the GRCANFD IP using the same driver.
Additional functions have been added that uses a new CAN FD frame
format and read/write/baud-rate functions that supports both GRCANFD
and GRCAN. To keep the SW API fully backwards compatible with GRCAN,
the old functions remain.
Update #4307.
|
|
|
|
| |
Update #4307.
|
|
|
|
| |
Update #4306.
|
|
|
|
| |
Update #4306.
|
|
|
|
|
|
|
| |
Reimplemented the baud-rate algorithm from scratch to cope with
GRCAN, GRCANFD and OC_CAN devices.
Update #4306.
|
|
|
|
| |
Update #4305.
|
|
|
|
|
|
|
|
|
|
|
|
| |
When the DMA table has been allocated dynamically, the IOCTL_SET_PACKETSIZE
will trigger an issue where pDev->rx and pDev->tx are not updated with
the new DMA tables base address. Instead the old pointers are used.
There is no point in reallocting the DMA tables because there is no
configuration option to it. Therefore the DMA tables allocation is
moved to a separate function never called from SET_PACKETSIZE.
Update #4304.
|
|
|
|
| |
Update #4303.
|
|
|
|
|
|
|
| |
This is enables the updated codec for GR740 and is backwards compatible
with all other versions of the IP.
Updates #4275.
|
|
|
|
| |
Update #4274.
|
|
|
|
| |
Update #4274.
|
|
|
|
| |
Close #4293
|
|
|
|
|
|
|
| |
- It seems the compiler how defaults to -fcommon and this means
some uninitialised data is ignored.
Closes #4266
|
|
|
|
|
|
|
|
| |
- The change to building all code with code and data sections means
we have a section per function. Make sure all functions are
placed in the text section.
Closes #4266
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
- Add support to the BSP to enable irq-generic management
- Update the powerpc shared irq code to support irq-generic. This
is an opt in option for existing powerpc bsps. This change
should be simpler now
- Fix a number of issues in ISA IRQ controller handling by porting
fixes from the i386 (PC) BSP
Closes #4247
Closes #4248
|
|
|
|
| |
Close #4234
|
|
|
|
|
|
|
|
|
|
| |
- The call to enable the openpic irq for the ISA bridge fails
because the IRQ used is offset by the ISA bus signals and
the openpic call expects an IRQ relative to its signals.
- Add the MVME 2600/2700 to the list of boards with an ISA bridge.
Closes #4233
|
|
|
|
|
|
|
|
|
| |
For i.MX7 U-Boot initializes the system counter. On i.MX6 Barebox is
often used which doesn't initialize the counter. With this patch, we try
to auto-detect whether the counter is initialized or not and do the
initialization ourself if necessary.
Closes #4220
|
|
|
|
| |
Update #4185.
|
|
|
|
|
|
| |
- For small tables only round to the next 4kiB instead of 1MiB
Close #4185.
|
|
|
|
|
|
|
|
| |
Also start interrupt server tasks on processors which do not have a
scheduler. Applications may dynamically manage processors using
rtems_scheduler_remove_processor() and rtems_scheduler_add_processor().
Close #4190.
|
|
|
|
|
|
|
| |
The ISR lock must be destroyed to prevent memory corruption if RTEMS_PROFILING
and RTEMS_SMP is enabled.
Close #4189.
|
|
|
|
|
|
|
|
|
|
|
|
| |
In "bsp/atsam: Simplify XDMAD_Handler()" (5f813694f68cee) the interrupt
callback has been made unconditional. That allowed to avoid some special
deadlock situations in error cases. But it removed part of the XDMAD
status handling.
This patch adds the ability to update the XDMAD status from the
callback if that is necessary for the driver.
Fixes #4172
|
|
|
|
|
|
|
|
| |
Add a workaround for Cortex-A9 Errata 845369: A short loop including a DMB
instruction might cause a denial of service on another which executes a CP15
broadcast operation.
Close #4114.
|
|
|
|
|
|
|
| |
Add a workaround for Cortex-A9 Errata 845369: Under Very Rare Timing
Circumstances Transition into Streaming Mode Might Create Data Corruption.
Update #4114.
|
|
|
|
| |
Closes #4902.
|
|
|
|
|
| |
Closes #4055
Closes #4056
|
|
|
|
| |
Closes #4021
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The external UART over SPI device SC16IS752 uses the interrupt server
for interrupt processing. The interrupt server is also heavily used by
libbsd. The interrupt processing for the SC16IS752 is time critical and
doesn't work if network traffic is processed at the same priority.
With #4033 custom interrupt servers are available. Change
atsam_sc16is752_spi_create() to support user-defined interrupt servers.
Introduced atsam_sc16is752_spi_config to cut down the argument count of
this function.
Close #4038.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add rtems_interrupt_server_destroy().
Before this patch, the only way to create interrupt servers was
rtems_interrupt_server_initialize(). This function creates the default
interrupt server and in SMP configurations additional interrupt servers
for the additional processors. The interrupt server is heavily used by
libbsd. This includes the epoch based reclamation which performs time
consuming resource and memory deallocation work. This does not work well
with time critical services, for example an UART over SPI or I2C. One
approach to address this problem is to allow the application to create
custom interrupt servers with the right priority and task properties.
The interrupt server API accounted for this, however, it was not
implemented before this patch.
Close #4033.
|
|
|
|
|
|
| |
- properly use the cpu <-> apic maps for IPIs
Closes #4028.
|
| |
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
- Fixes timeout for smpipi01 where:
+ Main thread sends perform jobs to worker cpu while it is already
performing jobs
+ Interrupt on worker cpu performs jobs, but with empty job list
+ Worker cpu continues to execut previous job and adds new job list
to itself, which is never performed, since the interrupt has already
been handled
+ Main thread blocks forever on barrier D
|
| |
|
|
|
|
|
|
|
|
| |
- Do not forward Clock_isr through Clock_driver_support_at_tick as this
will cause every processor to send IPIs with Clock_isr therby creating
an infinie loop
- Instead the processor handling the clock interrupt causes all other
processors to call rtems_timecounter_tick to update their tick count
|
|
|
|
|
|
| |
- Defines CPU_Interrupt_frame in cpu_impl.h
- Updates isq_asm.S to save/restore registers in matching order to
interrupt frame
|
|
|
|
|
|
|
|
|
|
| |
Create a GS segment in the GDT for each processor for storing TLS.
This makes the GDT in startAP.S obsolete as all processors now share the
same GDT, which is passed to each AP at startup.
The correct segment for each processor is calculated in cpu_asm.S.
Update #3335
|
|
|
|
|
|
|
|
|
|
|
| |
start16.S is now only used for SMP configurations to start the
application processors.
This commit removes all unnecessary parts for this job,
i.e. video conssole initalisation, A20 gate activation
and all non-AP related code.
Update #3335
|
|
|
|
| |
Updates #2962
|
|
|
|
| |
Updates #2962
|
|
|
|
| |
Updates #2962
|
|
|
|
| |
Updates #2962
|
|
|
|
| |
Update #3970.
|
|
|
|
|
|
|
|
| |
_CPU_Counter_frequency() can be called by the rtems_counter
initialization before arm_gt_clock_initialize() initializes the value
used in _CPU_Counter_frequency().
Closes #3961.
|
|
|
|
|
|
| |
Some imx chips or boards don't use the same frequency for ECSPI and IPG.
Update #3869
|
| |
|