| Commit message (Collapse) | Author | Age | Files | Lines |
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Add support for _SMP_Send_message() to the own processor. This is
required by the smpmulticast01 test program.
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The use case for this function is the libbsd. In FreeBSD, the interrupt
setup and binding to a processor is done in two steps. Message
based interrupts like PCIe MSI and MSI-X interrupts can be implemented
through interrupt server entries. They are setup at the default
interrupt server and may optionally move to an interrupt server bound to
a specific processor.
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Directly use the CPU port API in boot_card() to allow tracing of the
higher level interrupt disable/enable routines, e.g.
_ISR_Local_disable() and _ISR_Local_enable(). Currently, there is no
configuration option to enable this. Below is a patch. It may be used
to investigate some nasty low level bugs in the system.
Update #3665.
diff --git a/cpukit/include/rtems/score/isrlevel.h b/cpukit/include/rtems/score/isrlevel.h
index c42451d010..46d361ddc2 100644
--- a/cpukit/include/rtems/score/isrlevel.h
+++ b/cpukit/include/rtems/score/isrlevel.h
@@ -40,6 +40,10 @@ extern "C" {
*/
typedef uint32_t ISR_Level;
+uint32_t rtems_record_interrupt_disable( void );
+
+void rtems_record_interrupt_enable( uint32_t level );
+
/**
* @brief Disables interrupts on this processor.
*
@@ -56,8 +60,7 @@ typedef uint32_t ISR_Level;
*/
#define _ISR_Local_disable( _level ) \
do { \
- _CPU_ISR_Disable( _level ); \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
+ _level = rtems_record_interrupt_disable(); \
} while (0)
/**
@@ -72,10 +75,7 @@ typedef uint32_t ISR_Level;
* _ISR_Local_disable().
*/
#define _ISR_Local_enable( _level ) \
- do { \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
- _CPU_ISR_Enable( _level ); \
- } while (0)
+ rtems_record_interrupt_enable( _level )
/**
* @brief Temporarily enables interrupts on this processor.
@@ -98,9 +98,8 @@ typedef uint32_t ISR_Level;
*/
#define _ISR_Local_flash( _level ) \
do { \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
- _CPU_ISR_Flash( _level ); \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
+ rtems_record_interrupt_enable( _level ); \
+ _level = rtems_record_interrupt_disable(); \
} while (0)
/
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- The TI's CortexA7 MP MPIDR register returns 0
Updates #3760
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- Update the linkcmd file to support configure settings
- Set the workspace size based on the revision value
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Closes #3777
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Closes #3780
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Remove static stuff that is never used.
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- Port the jbang code from C++ to C to enable DBGEN.
- Hook the libdebugger ARM backend support to return the base address
of the debug register set.
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Closes #3760
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Add NULL-pointer protection. Make MMU table read-only. Move vector
table to start section.
Close #3774.
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This fixes the corruption of r3 by the call to
bsp_start_arm_drop_hyp_mode().
Moving the code makes it easier to review changes in start.S.
Close #3773.
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This makes it easier to review changes in start.S.
Update #3773.
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There are no known ARMv7-M chips with a dual lockstep mode.
Update #3773.
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Update #3269.
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The old driver worked well for EEPROMS with the RTEMS EEPROM driver. But
it had problems with a lot of other situations. Although it's not a
direct port, the new driver is heavily modeled after the FreeBSD ti_i2c
driver.
Closes #3764.
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Closes #3762
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Fix the __size symbol value to reflect the total size of the bootloader.
This prevents a bootloader crash with application images above a certain
threshold (e.g. fileio sample program).
Update #3727.
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The watchdog timer (WDT) can be configure only once. Do not touch it in
the BSP since the application may want to use it.
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Accept a time interval up to 24h.
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Set the alarm time according to the note in the datasheet.
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The GNU ld had a couple of changes which resulted in a broken bootloader
image generation. Recent linker versions tie assignments to their
nearest output section statement. Place all absolute symbols which are
used with @sectoff relocations into a special section.
See also:
"Binutils 2.28 on PowerPC: dangerous relocation: generic linker can't
handle R_PPC_SECTOFF_HA"
https://www.sourceware.org/ml/binutils/2019-05/msg00183.html
Update #3727
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Use _SMP_Multicast_action() instead.
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Move resposibility to disable thread dispatching to the caller of
_SMP_Multicast_action(). Using an interrupt disable for this purpose is
questionable.
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This makes it possible to write tests for the generic interrupt
controller support.
Update #3269.
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Update machine flags for Cortex-M3 and Cortex-M4 based BSPs to account
for Cortex-M3 Errata 602117 which required GCC multilib changes.
Update #3747.
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SAM V71 Xplained Ultra - Board explanation now in Modules->BSPs->ARM
Update #3706.
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Update #3339.
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Close #3736.
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Replace it with a proper struct rtems_bsdnet_ifconfig forward
declaration.
Close #3742.
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Update #3122.
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