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The strlcpy() function ensures there is always a NUL character
at the end of the string. Hence it is safer as strncpy() and it avoids the
compiler warning
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Provide RTEMS_NO_RETURN also in case RTEMS_DEBUG is defined to prevent errors
like this:
error: no return statement in function returning non-void [-Werror=return-type]
Use C11 and C++11 standard means to declare a no-return function.
Close #4122.
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Replace leon3_irqmp_has_timestamp() with irqmp_has_timestamp() and move
it to grlib.h.
Close #4128.
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updates #4028.
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This adds an AArch64 ILP32 BSP variant based on Qemu's Cortex-A53
emulation with interrupt support using GICv3 and clock support using
the ARM GPT.
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This adds an AArch64 basic BSP based on Qemu's Cortex-A53 emulation with
interrupt support using GICv3 and clock support using the ARM GPT.
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This adds a bsp_reset implementation based on the ARM PSCI
specification often present in ARMv8 systems.
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This breaks out AArch32-specific code so that the shared GICv3 code can
be reused by other architectures.
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This breaks AArch32-specific portions of the ARM GPT driver into their
own file so that the generic code can be moved for reuse by other
architectures.
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This UART driver is now needed for BSPs other than ARM.
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Due to the static allocation of operating system resources the .bss section
needs more space than the .work section.
Close #4117.
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Closes #4093.
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This function is required by libbsd.
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Do not force BSPs to define __ppc_generic.
This was probably the last command line define in the BSPs.
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QEMU is now stricter with MMIO sizes and accesses. uintptr_t on RV64
is 8 bytes and generates an sd instruction that Store/AMO faults
because sifive_test MMIO expects 4 bytes accesses.
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In a multi-processor system we must broadcast the TLB maintenance operation to
the Inner Shareable domain to ensure that the other processors update their TLB
caches accordingly.
Close #4068.
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Update #3818.
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Use a far jump to avoid errors like this:
relocation truncated to fit: R_RISCV_JAL against symbol `boot_card'
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Update #3818.
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Closes #4040.
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Closes #4040.
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closes #4069.
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The inter-processor interrupt (IPI) may be used to process per-CPU jobs.
See for example the blocked handler in T_interrupt_test().
Update #3199.
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Closes #4055
Closes #4056
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The external UART over SPI device SC16IS752 uses the interrupt server
for interrupt processing. The interrupt server is also heavily used by
libbsd. The interrupt processing for the SC16IS752 is time critical and
doesn't work if network traffic is processed at the same priority.
With #4033 custom interrupt servers are available. Change
atsam_sc16is752_spi_create() to support user-defined interrupt servers.
Introduced atsam_sc16is752_spi_config to cut down the argument count of
this function.
Close #4039.
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Add rtems_interrupt_server_destroy().
Before this patch, the only way to create interrupt servers was
rtems_interrupt_server_initialize(). This function creates the default
interrupt server and in SMP configurations additional interrupt servers
for the additional processors. The interrupt server is heavily used by
libbsd. This includes the epoch based reclamation which performs time
consuming resource and memory deallocation work. This does not work well
with time critical services, for example an UART over SPI or I2C. One
approach to address this problem is to allow the application to create
custom interrupt servers with the right priority and task properties.
The interrupt server API accounted for this, however, it was not
implemented before this patch.
Close #4034.
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The cache of the fdt blob is flushed after copy. Therefore it should be
aligned.
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The chip select lines of the iMX SPI module doesn't work well for a
generic API like the one RTEMS uses. The existing solution only worked
in some special cases and had odd bugs when trying transfers of
different sizes (like deselecting between each byte for lengths that are
not dividable by 4).
With this patch the same approach like on FreeBSD or Linux is used:
Treat the CS lines as GPIOs.
Update 3869
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Update 3869
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Having a duplicate header with the shared includes is a build system
inconsistency. You may use one header file to build the libraries and
another one is installed (overwriting the other).
Update #3269.
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If we interrupt a thread dispatch critical section (thread dispatch
disable level != ISR nest level), then we should not do the fast idle
mode since this may delay an ongoing system call forever.
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- properly use the cpu <-> apic maps for IPIs
Closes #4029.
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Close #3981.
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Due to an unmaintained toolchain (internal errors in GCC, no FSF GDB
integration) the Epiphany architecture was obsoleted in RTEMS 5.1.
Update #3941.
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Update #3951.
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The PowerPC SPE support was removed from GCC.
Update #3951.
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Remove superflous __atexit stuff in start.o. It is no longer required
by GCC and may cause linker problems.
See GCC commit:
commit 362c63a5e8b5aacfff3e5af0911e42ba7c775042
Author: Geoff Keating <geoffk@cygnus.com>
Date: Fri Apr 14 23:16:25 2000 +0000
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GCC 10 no longer passes -many to the assembler. This enables more
checks in the assembler.
The 0 in the tlbie instruction is the L operand which selects a 4KiB
page size.
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GCC 10 no longer passes -many to the assembler. This enables more
checks in the assembler.
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