summaryrefslogtreecommitdiffstats
path: root/bsps (follow)
Commit message (Expand)AuthorAgeFilesLines
* clockdrv: Add clock driver implementation groupSebastian Huber2023-01-244-20/+22
* tm27: Avoid function pointer castsSebastian Huber2023-01-2434-41/+75
* bsp/tms570: Fix define redefinition errorSebastian Huber2023-01-171-2/+2
* riscv: Resurrect RISCV_ENABLE_HTIF_SUPPORTSebastian Huber2023-01-126-12/+30
* bsps/xil: Use the LP64 header for ILP32Kinsey Moore2023-01-041-10/+25
* bsps: Move ZynqMP-specific info into the BSPKinsey Moore2023-01-043-117/+2
* bsp/qoriq: Add qoriq_mmu_adjust_and_write_to_tlb1()Sebastian Huber2023-01-033-7/+38
* bsp/qoriq: Add qoriq_mmu_find_free_tlb1_entry()Sebastian Huber2023-01-032-1/+27
* bsp/qoriq: Support message signaled interruptsSebastian Huber2023-01-032-17/+244
* bsp/qoriq: Clear shared message signaled interruptsSebastian Huber2023-01-031-0/+5
* bsp/qoriq: Use only pic_is_ipi()Sebastian Huber2023-01-031-11/+6
* bsps: Import Xilinx NAND driverKinsey Moore2022-12-2310-0/+5622
* bsps: Import Xilinx support codeKinsey Moore2022-12-2330-0/+5366
* RISC-V: Always probe for HTIF and remove RISCV_ENABLE_HTIF_SUPPORTHesham Almatary2022-12-236-26/+18
* bsp/atsam: Allow to use custom SDRAMChristian Mauderer2022-12-151-0/+7
* bsps/atsam: Add NULL pointer protectionChristian Mauderer2022-12-155-2/+28
* bsps/atsam: Fix unidirectional SPI transfersChristian Mauderer2022-12-151-57/+131
* bsps/zynqmp: Fix and update device treesKinsey Moore2022-12-074-115/+137
* config: Add CONFIGURE_RECORD_INTERRUPTS_ENABLEDSebastian Huber2022-12-021-0/+97
* bsps/irq: Add bsp_interrupt_get_dispatch_table_slot()Sebastian Huber2022-12-024-8/+26
* bsps/irq: Rename handler in dispatch tableSebastian Huber2022-12-026-59/+57
* bsps/microblaze: Fix console interrupt build errorsAlex White2022-11-293-1/+21
* bsps/riscv: Simplify PLIC supportSebastian Huber2022-11-231-28/+30
* bsps/riscv: Fix PLIC enable register countSebastian Huber2022-11-231-3/+5
* bsps/riscv: Add riscv_plic_cpu_0_init()Sebastian Huber2022-11-231-13/+23
* bsps/riscv: Fix bsp_fdt_map_intr()Sebastian Huber2022-11-231-1/+1
* aarch64/versal: Add UART interrupt supportChris Johns2022-11-224-39/+324
* rtems/versal: Updated mmu to include mapping for SDHCI devices on versalAaron Nyholm2022-11-221-1/+5
* bsps/zynqmp: Use direct fdt_* callsKinsey Moore2022-11-181-22/+10
* aarch64/mmu: Prevent block descriptors at level -1Kinsey Moore2022-11-171-10/+13
* bsps/riscv: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-145-12/+90
* bsps/sparc: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-1440-132/+894
* bsps/shared/grlib: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-1467-199/+1453
* bsps/include/grlib: Change license to BSD-2 for files with Gaisler copyrightDaniel Cederman2022-11-1459-168/+1319
* bsps/include/libchip: Remove legacy networking header fileDaniel Cederman2022-11-141-152/+0
* bsps/riscv: Fix software interrupt dispatchingSebastian Huber2022-11-112-2/+33
* bsps/noel: Fix interrupt supportSebastian Huber2022-11-111-0/+2
* bsps/riscv: Fix PLIC enable register countSebastian Huber2022-11-101-2/+2
* bsps/riscv: Skip init on not configured processorsSebastian Huber2022-11-101-0/+11
* bsps/riscv: Simplify riscv_plic_init()Sebastian Huber2022-11-101-30/+39
* bsps/riscv: Simplify riscv_clint_init()Sebastian Huber2022-11-101-14/+25
* bsps/riscv: Add tm27 supportSebastian Huber2022-11-101-1/+136
* bsps/riscv: Always dispatch software interruptsSebastian Huber2022-11-101-3/+2
* bsps/riscv: bsp_interrupt_get/set_affinity()Sebastian Huber2022-11-102-14/+7
* bsps/riscv: bsp_interrupt_raise_on()Sebastian Huber2022-11-101-4/+20
* bsps/riscv: bsp_interrupt_is_pending()Sebastian Huber2022-11-101-2/+25
* bsps/riscv: bsp_interrupt_get_attributes()Sebastian Huber2022-11-101-0/+15
* bsps/riscv: Improve bsp_interrupt_vector_disable()Sebastian Huber2022-11-101-0/+8
* bsps/riscv: Improve bsp_interrupt_vector_enable()Sebastian Huber2022-11-101-0/+8
* bsps/riscv: bsp_interrupt_vector_is_enabled()Sebastian Huber2022-11-101-2/+47