summaryrefslogtreecommitdiffstats
path: root/bsps (follow)
Commit message (Collapse)AuthorAgeFilesLines
...
* sparc,smp: typo in start.S causing SMP not workingDaniel Hellstrom2018-08-241-1/+1
|
* bsps/arm: Fix PL111 register define re-definitionSebastian Huber2018-08-202-2/+2
| | | | Close #3502.
* bsps/x86_64: Add APIC timer based clock driverAmaan Cheval2018-08-136-0/+614
| | | | | | | | | The APIC timer is calibrated by running the i8254 PIT for a fraction of a second (determined by PIT_CALIBRATE_DIVIDER) and counting how many times the APIC counter has ticked. The calibration can be run multiple times (determined by APIC_TIMER_NUM_CALIBRATIONS) and averaged out. Updates #2898.
* bsps/x86_64: Add support for RTEMS interruptsAmaan Cheval2018-08-135-0/+394
| | | | Updates #2898.
* bsps/x86_64: Add paging support with 1GiB super pagesAmaan Cheval2018-08-134-0/+247
| | | | Updates #2898.
* bsps/x86_64: Reduce default RamSize to 1GiBAmaan Cheval2018-08-131-3/+3
| | | | | | | Simulators may not always be able to allocate 4GiB easily, and using an artificially lower RAM may cause a broken heap. Updates #2898.
* bsps/x86_64: Reorganize header files and compile-optionsAmaan Cheval2018-08-131-0/+3
| | | | Updates #2898.
* bsps/sparc/include/bsp/gradcdac.h: Fix nested comment warningJoel Sherrill2018-08-101-1/+1
|
* qoriq/include/tm27.h: Fix prototype warningJoel Sherrill2018-08-101-2/+2
|
* motorola_powerpc/include/tm27.h: Fix prototype warningJoel Sherrill2018-08-101-4/+4
|
* bsps/powerpc/include/mpc83xx/mpc83xx.h: Fix nested comment warningJoel Sherrill2018-08-101-1/+1
|
* bsps/powerpc/include/bsp/tictac.h: Fix protototype warningsJoel Sherrill2018-08-101-4/+4
|
* gen83xx/include/tm27.h: Fix prototype warningJoel Sherrill2018-08-101-1/+1
|
* gen5200/include/tm27.h: Fix prototype warningJoel Sherrill2018-08-101-4/+4
|
* gen5200/include/bsp/ata.h: Fix warningJoel Sherrill2018-08-101-0/+2
|
* csb337/include/at91rm9200_dbgu.h: Fix nested comment warningJoel Sherrill2018-08-101-1/+1
|
* bsps/sparc: Fix external variable declarationsSebastian Huber2018-08-101-2/+2
|
* bsps/sparc: Move polled APBUART functionsSebastian Huber2018-08-106-124/+62
| | | | This reduces the link-time dependencies and avoids copy-and-paste.
* bsp/atsam: Fix handling of slow SPI speeds.Christian Mauderer2018-08-091-1/+20
| | | | | This patch fixes an overflow in the frequency calculation of the SPI driver for slow SPI speeds.
* bsp/gen5200: Avoid deprecated routineSebastian Huber2018-08-071-1/+3
| | | | Update #3358.
* libchip/ata: Use rtems_blkdev_create()Sebastian Huber2018-08-072-48/+13
| | | | Update #3358.
* bsp/smdk2410: Use rtems_blkdev_create()Sebastian Huber2018-08-071-11/+3
| | | | Update #3358.
* bsps/lm32: Use rtems_blkdev_create()Sebastian Huber2018-08-071-33/+3
| | | | Update #3358.
* bsps: Fix the generic IRQ supportSebastian Huber2018-08-033-16/+43
| | | | | | | | | The genmcf548x partly uses is own implementation of the interrupt extension API for libbsd support. This patch is a part of the BSP source reorganization. Update #3285.
* bsp/riscv: Add missing BSP variantSebastian Huber2018-08-021-0/+9
| | | | Update #3433.
* bsp/riscv: Fix build with RTEMS_SMP undefinedSebastian Huber2018-08-023-12/+10
| | | | Update #3433.
* bsp/riscv: Fix a synchronization issue for PLICSebastian Huber2018-08-021-0/+8
| | | | Update #3433.
* bsp/riscv: Remove unused variableSebastian Huber2018-08-011-4/+0
| | | | Update #3433.
* bsp/riscv: Add NS16750 support to console driverSebastian Huber2018-08-011-36/+74
| | | | Update #3433.
* serial/ns16550: Precision clock synthesizerSebastian Huber2018-08-012-13/+68
| | | | | | Set the FIFO control register while DLAB == 1 in the line control register. At least on the QorIQ T4240 the driver still works with the re-ordered FIFO control register access.
* serial/ns16550: Use standard register namesSebastian Huber2018-08-011-4/+4
| | | | | Use the standard register names for the divisor latches. This makes it easier to compare the code with other driver implementations.
* bsp/riscv: Initialize FPU depending on ISASebastian Huber2018-08-011-1/+4
| | | | | | Initialize fcsr to zero for a defined rounding mode. Update #3433.
* bsp/riscv: Fix clock driverSebastian Huber2018-08-011-17/+49
| | | | | | Do not assume that mtime is zero at boot time. Update #3433.
* bsps/sparc: Fix typo in start.SSebastian Huber2018-08-011-1/+1
| | | | | Fix typo in start.S introduced by 4678d1a8b0e74a12809122ef071324c99e78d7ff.
* bsp/riscv: Fix inter-processor interruptsSebastian Huber2018-07-271-1/+7
| | | | | | | | The previous version worked only on a patched Qemu. Writes to mip are illegal according to the The RISC-V Instruction Set Manual, Volume II: Privileged Architecture, Privileged Architecture Version 1.10. Update #3433.
* riscv: Rework CPU counter supportSebastian Huber2018-07-271-4/+18
| | | | Update #3433.
* bsp/riscv: Use interrupt driven NS16550 driverSebastian Huber2018-07-252-2/+11
| | | | Update #3433.
* bsp/riscv: Add PLIC supportSebastian Huber2018-07-255-3/+263
| | | | Update #3433.
* bsp/riscv: Add simple SMP support to clock driverSebastian Huber2018-07-251-0/+2
| | | | | | This is a hack. The clock interrupt should be handled by each hart. Update #3433.
* bsp/riscv: Use CPU counter btimerSebastian Huber2018-07-251-68/+0
| | | | Update #3433.
* bsp/riscv: Add basic SMP startupSebastian Huber2018-07-257-27/+298
| | | | Update #3433.
* riscv: Add CLINT and PLIC supportSebastian Huber2018-07-253-62/+4
| | | | | | The CLINT and PLIC need some per-processor state. Update #3433.
* bsps/riscv: Update linker-symbols.hSebastian Huber2018-07-251-15/+16
| | | | Update #3433.
* bsp/riscv: Add reset via for SiFive Test FinisherSebastian Huber2018-07-251-5/+18
| | | | Update #3433.
* bsp/riscv: Add and use riscv_fdt_get_address()Sebastian Huber2018-07-255-25/+81
| | | | Update #3433.
* bsp/riscv: Fix HTIF warningsSebastian Huber2018-07-255-5/+62
| | | | Update #3433.
* riscv: Rework exception handlingSebastian Huber2018-07-258-52/+89
| | | | | | | | | | | Remove _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector() functions. Applications can install an exception handler via the fatal error handler to handle synchronous exceptions. Handle interrupt exceptions via _RISCV_Interrupt_dispatch() which must be provided by the BSP. Update #3433.
* _SMP_Start_multitasking_on_secondary_processor()Sebastian Huber2018-07-255-6/+6
| | | | | Pass current processor control as first parameter to make dependency more explicit.
* bsps: bsp_start_on_secondary_processor()Sebastian Huber2018-07-256-13/+19
| | | | | | Pass current processor control as first parameter in bsp_start_on_secondary_processor() and qoriq_start_thread() to make dependency more explicit.
* score: _SMP_Inter_processor_interrupt_handler()Sebastian Huber2018-07-256-6/+8
| | | | | Pass current processor control via parameter since it may be already available at the caller side.