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* aarch64/versal: Support DDRMC0 region 0 and 1Chris Johns2022-07-283-0/+59
| | | | | | | | | | | - Support DDRMC0 region 0 up to 2G in size - Support DDRMC0 region 1 with DDR memory greater than 2G up to the DDRMC0 max amount - Extend the heap with region 1's memory Closes #4684
* basp/aarch64: Make the unexpected sections origin address 64bitChris Johns2022-07-281-1/+1
| | | | Update #4684
* Use __asm__ for standard C compatibilitySebastian Huber2022-07-273-24/+24
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* aarch64: Use page table level 0Kinsey Moore2022-07-213-15/+58
| | | | | | | | | This alters the AArch64 page table generation and mapping code and MMU configuration to use page table level 0 in addition to levels 1, 2, and 3. This allows the mapping of up to 48 bits of memory space and is the maximum that can be mapped without relying on additional processor extensions. Mappings are restricted based on the number of physical address bits that the CPU supports.
* aarch64: Memory map the noinit sectionKinsey Moore2022-07-182-0/+8
| | | | | This section was added recently and must be mapped to be accessed without generating an exception.
* bsps: Sort .noinit* sectionsSebastian Huber2022-07-1556-56/+56
| | | | | | | | Sort the .noinit* input sections by name first, then by alignment if two sections have the same name. This allows the placement of begin/end symbols to initialize some areas with a special value. Update #4678.
* bsps/v850/gdbv850sim: Change license to BSD-2Joel Sherrill2022-07-123-9/+66
| | | | Updates #3053.
* bsps/sparc64/usiii: Change license to BSD-2Joel Sherrill2022-07-122-6/+44
| | | | Updates #3053.
* bsps/sparc64/shared: Change license to BSD-2Joel Sherrill2022-07-123-9/+66
| | | | Updates #3053.
* bsps/sparc64/niagara: Change license to BSD-2Joel Sherrill2022-07-123-9/+66
| | | | Updates #3053.
* bsps/sparc64/include: Change license to BSD-2Joel Sherrill2022-07-122-6/+44
| | | | Updates #3053.
* bsps/sh/shsim: Change license to BSD-2Joel Sherrill2022-07-124-12/+88
| | | | Updates #3053.
* bsps/sh/shared: Change license to BSD-2Joel Sherrill2022-07-121-3/+22
| | | | Updates #3053.
* bsps/sh/gensh2: Change license to BSD-2Joel Sherrill2022-07-124-12/+88
| | | | Updates #3053.
* bsps/sh/gensh1: Change license to BSD-2Joel Sherrill2022-07-121-3/+22
| | | | Updates #3053.
* bsps/powerpc/virtex5: Change license to BSD-2Joel Sherrill2022-07-122-6/+44
| | | | Updates #3053.
* bsps/powerpc/virtex4: Change license to BSD-2Joel Sherrill2022-07-122-6/+44
| | | | Updates #3053.
* bsps/powerpc/virtex: Change license to BSD-2Joel Sherrill2022-07-122-6/+44
| | | | Updates #3053.
* bsps/powerpc/tqm8xx: Change license to BSD-2Joel Sherrill2022-07-127-21/+154
| | | | Updates #3053.
* bsps/powerpc/t32mppc: Change license to BSD-2Joel Sherrill2022-07-128-24/+176
| | | | Updates #3053.
* bsps/powerpc/shared: Change license to BSD-2Joel Sherrill2022-07-1218-54/+396
| | | | Updates #3053.
* bsps/powerpc/qoriq: Change license to BSD-2Joel Sherrill2022-07-1231-93/+682
| | | | Updates #3053.
* bsps/powerpc/qemuppc: Change license to BSD-2Joel Sherrill2022-07-124-12/+88
| | | | Updates #3053.
* bsps/powerpc/psim: Change license to BSD-2Joel Sherrill2022-07-127-21/+154
| | | | Updates #3053.
* bsps/powerpc/mpc8260ads: Change license to BSD-2Joel Sherrill2022-07-122-6/+44
| | | | Updates #3053.
* bsps/powerpc/mpc55xxevb: Change license to BSD-2Joel Sherrill2022-07-1248-144/+1056
| | | | Updates #3053.
* bsps/powerpc/include: Change license to BSD-2Joel Sherrill2022-07-128-24/+176
| | | | Updates #3053.
* bsps/powerpc/83xx: Change license to BSD-2Joel Sherrill2022-07-1218-54/+396
| | | | Updates #3053.
* bsps/powerpc/gen5200: Change license to BSD-2Joel Sherrill2022-07-1221-63/+462
| | | | Updates #3053.
* bsps/powerpc/beatnik: Change license to BSD-2Joel Sherrill2022-07-121-3/+22
| | | | Updates #3053.
* bsps/no_cpu/no_bsp: Change license to BSD-2Joel Sherrill2022-07-1212-36/+264
| | | | Updates #3053.
* bsps/nios2/nios2_iss: Change license to BSD-2Joel Sherrill2022-07-121-3/+22
| | | | Updates #3053.
* bsps/moxie/moxiesim: Change license to BSD-2Joel Sherrill2022-07-121-3/+22
| | | | Updates #3053.
* bsps/mips/rbtx4938: Change license to BSD-2Joel Sherrill2022-07-125-15/+110
| | | | Updates #3053.
* bsps/mips/rbtx4925: Change license to BSD-2Joel Sherrill2022-07-125-15/+110
| | | | Updates #3053.
* bsps/mips/malta: Change license to BSD-2Joel Sherrill2022-07-1211-33/+242
| | | | Updates #3053.
* bsps/mips/jmr3904: Change license to BSD-2Joel Sherrill2022-07-127-21/+154
| | | | Updates #3053.
* bsps/mips/include: Change license to BSD-2Joel Sherrill2022-07-125-15/+110
| | | | Updates #3053.
* bsps/mips/hurricane: Change license to BSD-2Joel Sherrill2022-07-125-15/+110
| | | | Updates #3053.
* bsps/mips/csb350: Change license to BSD-2Joel Sherrill2022-07-125-15/+110
| | | | Updates #3053.
* bsps/mips/shared: Change license to BSD-2Joel Sherrill2022-07-125-15/+110
| | | | Updates #3053.
* irq/arm-gicv3.h: Customize CPU Interface initSebastian Huber2022-07-121-21/+37
| | | | | | | Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1 enable registers. This fixes the build for the AArch32 target. Add BSP options which define the initial values of CPU Interface registers.
* bsps/m68k/uC5282: Change license to BSD-2Joel Sherrill2022-07-112-6/+44
| | | | Updates #3053.
* bsps/m68k/shared: Change license to BSD-2Joel Sherrill2022-07-115-15/+110
| | | | Updates #3053.
* bsps/m68k/mvme162: Change license to BSD-2Joel Sherrill2022-07-111-3/+22
| | | | Updates #3053.
* bsps/m68k/mvme147s: Change license to BSD-2Joel Sherrill2022-07-117-21/+154
| | | | Updates #3053.
* bsps/m68k/mvme147: Change license to BSD-2Joel Sherrill2022-07-117-21/+154
| | | | Updates #3053.
* bsps/m68k/mrm332: Change license to BSD-2Joel Sherrill2022-07-117-21/+154
| | | | Updates #3053.
* bsps/m68k/mcf5329: Change license to BSD-2Joel Sherrill2022-07-114-12/+88
| | | | Updates #3053.
* bsps/m68k/mvf5235: Change license to BSD-2Joel Sherrill2022-07-116-18/+132
| | | | Updates #3053.
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