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* bsp/raspberrypi: Updated the console API.G S Niteesh2020-01-079-400/+196
| | | | | | Replaces the legacy termios API with new termios API (#3034) Replaces the custom PL011 serial driver with RTEMS arm-pl011. Update #3034
* bsp/raspberrypi: Enable FDT support.G S Niteesh2020-01-071-0/+4
| | | | This commit adds FDT support to the BSP.
* bsp/raspberrypi: Fix size of work area.Christian Mauderer2020-01-074-185/+80
| | | | | | | | | | The BSP tried to get the size of the SDRAM based on the revision code. Unfortunately the code had some bugs so that the default size has been used. Beneath that the MMU table hasn't been adapted. This patch queries the SDRAM size via a special VC Mailbox call instead. For the MMU adaption a simmilar method to the one in the imx BSP is used.
* bsps/arm: Define index of the workspace entry.Christian Mauderer2020-01-072-5/+6
| | | | | | The imx BSP contained a hack to change the workspace entry of the MMU table. This makes the used define visible for other BSPs too so that the same hack can be used for example in raspberry pi too.
* bsps/irq: fix resource leak in irq-server.cGedare Bloom2020-01-031-0/+1
| | | | | | Resource leak identified by Coverity (CID 1456675). The value of instances is leaked in case some but not all irq servers are created. It should be stored in bsp_interrupt_server_instances.
* bsps/powerpc: Fix warningSebastian Huber2020-01-021-3/+1
| | | | Update #3834.
* bsps/powerpc: Support constructors with prioritySebastian Huber2019-12-196-115/+59
| | | | Close #3339.
* bsps/arm: Export bsp_start_hook_0_doneSebastian Huber2019-12-191-5/+8
| | | | Close #3789.
* config: Add _MPCI_ConfigurationSebastian Huber2019-12-131-1/+1
| | | | | | | Replace the user MPCI configuration table with a system provided _MPCI_Configuration. Update #3735.
* rtems: Add and use rtems_object_get_local_node()Sebastian Huber2019-12-134-4/+4
| | | | Update #3841.
* mpci: Simplify MPCI configurationSebastian Huber2019-12-112-18/+26
| | | | Use watchdog for shared memory driver instead of a Classic API Timer.
* clock: Simplify driver initializationSebastian Huber2019-12-1119-187/+20
| | | | | | Use a system initialization handler instead of a legacy IO driver. Update #3834.
* clock: Remove Clock_exit() from APISebastian Huber2019-12-1116-38/+16
| | | | | | | This function is no longer supported by the standard clock driver implementation (clockimpl.h). Update #3436.
* bsp/xen: Use BSP options for all linkcmds varsSebastian Huber2019-12-051-3/+3
| | | | Update #3818.
* bsp/xen: Create BSPJeff Kubascik2019-12-0511-0/+521
| | | | Create the Xen BSP for Xen on ARM.
* bsps/arm: Unmask generic timer in interrupt handlerJeff Kubascik2019-12-051-0/+3
| | | | | Xen will mask the virtual timer before injecting the interrupt to the guest.
* bsps/arm: Add zImage boot headerJeff Kubascik2019-12-051-0/+11
| | | | | Xen currently only supports the zImage loader for 32 bit guests on ARM targets.
* Regenerate headers.amSebastian Huber2019-11-291-0/+1
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* bsp/mpc55xxevb: Remove obsolete linker cmd fileSebastian Huber2019-11-251-1/+0
| | | | Update #3818.
* bsp/gen83xx: Remove obsolete linker command fileSebastian Huber2019-11-251-19/+0
| | | | Update #3818.
* bsp/lpc32xx: Fix linker command fileSebastian Huber2019-11-191-1/+4
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* bsp/imx7: Rename linker command fileSebastian Huber2019-11-191-0/+0
| | | | | | | This BSP family uses only one linker command file. Use the standard name. Update #3818.
* bsp/altcycv_devkit: Rename linker command fileSebastian Huber2019-11-191-0/+0
| | | | | | | This BSP family uses only one linker command file. Use the standard name. Update #3818.
* bsp/atsamv: Fix warningSebastian Huber2019-11-181-1/+0
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* bsp/t32mppc: Rename linker command fileSebastian Huber2019-11-141-0/+0
| | | | | | | This BSP family uses only one linker command file. Use the standard name. Update #3818.
* bsp/beagle: Rename linker command fileSebastian Huber2019-11-141-0/+0
| | | | | | | This BSP family uses only one linker command file. Use the standard name. Update #3818.
* bsp/riscv: Fix format and warningsSebastian Huber2019-11-142-45/+27
| | | | Update #3785.
* bsp/riscv: Fix use of uninitialized integerSebastian Huber2019-11-141-6/+1
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* bsp/riscv: riscv_get_core_frequency()Sebastian Huber2019-11-142-43/+23
| | | | | | | Always provide this function. Return 0 by default. Fix formatting. Simplify function. Update #3785.
* bsp/gumstix: Fix warningSebastian Huber2019-11-141-0/+1
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* bsps/arm: Add support for small pages MMUSebastian Huber2019-10-313-30/+101
| | | | | | | The small page MMU support reduces the granularity for memory settings through the MMU from 1MiB sections to 4KiB small pages. Enable it by default on the realview_pbx_a9_qemu BSP.
* bsps/riscv: UART - Read reg-shift from DTB to properly set/get registersHesham Almatary2019-10-301-2/+13
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* riscv: Add new BSP cfg variants to be built with llvm/clangHesham Almatary2019-10-278-0/+112
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* riscv: Add new offending input sections to the linker scriptHesham Almatary2019-10-271-0/+5
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* riscv: Add NOLOAD directive to the .work sectionHesham Almatary2019-10-271-1/+1
| | | | ld.lld defaults .work to PROGBITS otherwise
* riscv: Address differences in the linkerscript between GNU LD and LLVM/LLDHesham Almatary2019-10-271-51/+51
| | | | | | | | | | LLVM/LLD does not support STARTUP and ALIGN_WITH_INPUT directives that GNU LD support. INPUT and ALIGN(8) are supported by LLVM/LLD and can replace the unsupported STARTUP/ALIGN_WITH_INPUT directives. The commit conditionally adds the supported directive that linkers can understand depending on the toolchain used to compile RTEMS i.e., clang or gcc. Clang is assumed to use LLD by default.
* riscv: Generate linkcmds.base from the shared linkcmds.base.inHesham Almatary2019-10-271-0/+0
| | | | | This commit moves the existing linkcmds.base to linkcmds.base.in in order to make it configurable by autotools.
* bsp/xilinx-zynq: Simplify linkcmds configSebastian Huber2019-10-231-3/+3
| | | | | | | Use NULL-pointer protection also for Qemu variant. Do all calculations in the linker command file. This is a preparation for the new build system.
* bsp/xilinx-zynqmp: Simplify linkcmds configSebastian Huber2019-10-231-3/+3
| | | | | Do all calculations in the linker command file. This is a preparation for the new build system.
* bsp/atsam: Use PIO for SC16IS752.Christian Mauderer2019-10-232-21/+26
| | | | This allows to mix SC16IS752 chips with other interrupts.
* bsp/atsam: Add additional PIO helper.Christian Mauderer2019-10-232-0/+59
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* bsps/atsam: Improve case for level triggered IRQs.Christian Mauderer2019-10-231-11/+15
| | | | | | | | For level triggered interrupts currently the handler would have been called two times (assuming no one cleared the mask in a handler which would have been bad because the handler couldn't process all other that got cleared by accident). This patch allows the handler only to return if nothing is left to do.
* riscv: add freedom E310 Arty A7 bspPragnesh Patel2019-10-238-6/+314
| | | | | | | Added support for Sifive Freedom FE310 soc on Arty A7 FPGA board. Update #3785. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
* arm/beanglebone: Fix i2c build error.Chris Johns2019-10-191-1/+1
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* bsp/erc32: Improve pseudo-SMP supportSebastian Huber2019-10-011-0/+84
| | | | | Add support for _SMP_Send_message() to the own processor. This is required by the smpmulticast01 test program.
* rtems: Add rtems_interrupt_server_entry_move()Sebastian Huber2019-09-201-0/+17
| | | | | | | | | The use case for this function is the libbsd. In FreeBSD, the interrupt setup and binding to a processor is done in two steps. Message based interrupts like PCIe MSI and MSI-X interrupts can be implemented through interrupt server entries. They are setup at the default interrupt server and may optionally move to an interrupt server bound to a specific processor.
* bsps/beagle: register i2c device at initializationVijay Kumar Banerjee2019-09-193-13/+24
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* record: Allow tracing of ISR disable/enableSebastian Huber2019-09-061-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Directly use the CPU port API in boot_card() to allow tracing of the higher level interrupt disable/enable routines, e.g. _ISR_Local_disable() and _ISR_Local_enable(). Currently, there is no configuration option to enable this. Below is a patch. It may be used to investigate some nasty low level bugs in the system. Update #3665. diff --git a/cpukit/include/rtems/score/isrlevel.h b/cpukit/include/rtems/score/isrlevel.h index c42451d010..46d361ddc2 100644 --- a/cpukit/include/rtems/score/isrlevel.h +++ b/cpukit/include/rtems/score/isrlevel.h @@ -40,6 +40,10 @@ extern "C" { */ typedef uint32_t ISR_Level; +uint32_t rtems_record_interrupt_disable( void ); + +void rtems_record_interrupt_enable( uint32_t level ); + /** * @brief Disables interrupts on this processor. * @@ -56,8 +60,7 @@ typedef uint32_t ISR_Level; */ #define _ISR_Local_disable( _level ) \ do { \ - _CPU_ISR_Disable( _level ); \ - RTEMS_COMPILER_MEMORY_BARRIER(); \ + _level = rtems_record_interrupt_disable(); \ } while (0) /** @@ -72,10 +75,7 @@ typedef uint32_t ISR_Level; * _ISR_Local_disable(). */ #define _ISR_Local_enable( _level ) \ - do { \ - RTEMS_COMPILER_MEMORY_BARRIER(); \ - _CPU_ISR_Enable( _level ); \ - } while (0) + rtems_record_interrupt_enable( _level ) /** * @brief Temporarily enables interrupts on this processor. @@ -98,9 +98,8 @@ typedef uint32_t ISR_Level; */ #define _ISR_Local_flash( _level ) \ do { \ - RTEMS_COMPILER_MEMORY_BARRIER(); \ - _CPU_ISR_Flash( _level ); \ - RTEMS_COMPILER_MEMORY_BARRIER(); \ + rtems_record_interrupt_enable( _level ); \ + _level = rtems_record_interrupt_disable(); \ } while (0) /
* arm/tlb: Fix the MP affinity check to invalidate ASIDs.Chris Johns2019-08-121-1/+9
| | | | | | - The TI's CortexA7 MP MPIDR register returns 0 Updates #3760
* arm/raspberry: Set the workspace based on the mailbox version.Chris Johns2019-08-123-26/+135
| | | | | | - Update the linkcmd file to support configure settings - Set the workspace size based on the revision value
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