summaryrefslogtreecommitdiffstats
path: root/bsps (follow)
Commit message (Collapse)AuthorAgeFilesLines
* aarch64: whitespace fixes in start.SGedare Bloom2021-06-241-166/+166
|
* bsps/aarch64: replace boot options with asm switch codeGedare Bloom2021-06-241-7/+8
|
* bsps/aarch64: add non-secure mode and versal supportGedare Bloom2021-06-242-4/+37
|
* bsps/aarch64: add physical secure timerGedare Bloom2021-06-242-0/+9
|
* bsps/aarch64: add mnemonic for ICC_IGRPEN1_EL3Gedare Bloom2021-06-241-0/+1
|
* bsps/dev/irq: make icspicfgr an indexable arrayGedare Bloom2021-06-241-4/+2
|
* aarch64: add support to drop EL3 to EL2Kinsey Moore2021-06-241-1/+26
|
* aarch64/xilinx-versal: new BSPs for qemu and vck190Gedare Bloom2021-06-2410-0/+965
|
* sparc: Simplify trap table initializationSebastian Huber2021-06-2410-116/+64
| | | | | | | | | | | | | | | Move _ISR_Handler() to a separate file since it is now only used if a handler is installed by _CPU_ISR_install_raw_handler(). Statically initialize the traps for external interrupts to use the new _SPARC_Interrupt_trap() which directly dispatches the interrupt handlers installed by rtems_interrupt_handler_install() via the BSP-provided _SPARC_Interrupt_dispatch(). Since the trap table is now fully statically initialized, there is no longer a dependency on the Cache Manager in the default configuration. Update #4458.
* bsps: bsp_interrupt_handler_dispatch_unchecked()Sebastian Huber2021-06-241-19/+40
| | | | | | Add bsp_interrupt_handler_dispatch_unchecked() as an alternative to bsp_interrupt_handler_dispatch(). It may be used if the caller can ensure that the vector number is valid.
* bsps/sparc: Use rtems_interrupt_handler_install()Sebastian Huber2021-06-2410-31/+98
| | | | | | | Avoid using set_vector() which depends on _ISR_Vector_table(). Prepare for a statically initialized trap table. Update #4458.
* sparc: More reliable bad trap handlingSebastian Huber2021-06-2410-578/+2
| | | | | | | | | | | | | Statically initialize the trap table in start.S to jump to _SPARC_Bad_trap() for all unexpected traps. This enables a proper RTEMS fatal error handling right from the start. Do not rely on the stack and register settings which caused an unexpected trap. Use the ISR stack of the processor to do the fatal error handling. Save the full context which caused the trap. Fatal error handler may use it for error logging. Unify the _CPU_Exception_frame_print() implementations and move it to cpukit. Update #4459.
* bsps/sparc: Add a symbol for each trap table entrySebastian Huber2021-06-241-95/+264
| | | | | | | | This makes it easier to review start.o and set break points to trap table entries. This change was checked by inspecting the trap table in start.o with objdump. Update #4458.
* bsp/atsam: Fix BSP_INTERRUPT_VECTOR_COUNTSebastian Huber2021-06-241-1/+1
| | | | | | Fix an off by one error. Update #3269.
* bsps/irq: Default BSP_INTERRUPT_VECTOR_COUNT == 0Sebastian Huber2021-06-241-2/+5
| | | | | | | Change the default value of BSP_INTERRUPT_VECTOR_COUNT so that no interrupt vectors are supported and all related directives return RTEMS_INVALID_ID. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAXSebastian Huber2021-06-2455-65/+0
| | | | | | This define is no longer used. Update #3269.
* bsps/irq: Use BSP_INTERRUPT_VECTOR_COUNTSebastian Huber2021-06-2415-21/+21
| | | | | | Use BSP_INTERRUPT_VECTOR_COUNT instead of BSP_INTERRUPT_VECTOR_MAX. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_NUMBERSebastian Huber2021-06-242-4/+2
| | | | | | Replace it with BSP_INTERRUPT_VECTOR_COUNT. Update #3269.
* bsps/irq: Add BSP_INTERRUPT_VECTOR_COUNTSebastian Huber2021-06-2455-0/+67
| | | | | | | | | | | | | Assert BSP_INTERRUPT_VECTOR_MAX + 1 == BSP_INTERRUPT_VECTOR_COUNT. After building all BSPs with this patch, BSP_INTERRUPT_VECTOR_MAX can be removed and replaced by BSP_INTERRUPT_VECTOR_COUNT. The BSP_INTERRUPT_VECTOR_COUNT allows a default implementation which supports no interrupt vector at all. Using COUNT instead of MAX may avoid some interpretation issues, for example is the maximum value a valid vector number or not. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MINSebastian Huber2021-06-2460-106/+15
| | | | | | | | | | Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector numbers start with zero. The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit and building all BSPs. Update #3269.
* bsps/irq: Assert BSP_INTERRUPT_VECTOR_MIN == 0Sebastian Huber2021-06-241-0/+4
| | | | | | | After building all BSPs with this patch, this BSP-specific define can be removed to simplify the implementation. Update #3269.
* bsp/generic_or1k: Remove incomplete IRQ supportSebastian Huber2021-06-242-45/+1
| | | | Update #3269.
* bsp/genmcf548x: Change BSP_INTERRUPT_VECTOR_MINSebastian Huber2021-06-241-1/+9
| | | | | | | | | This BSP uses a customized implementation of the interrupt extension API. It was the only BSP which defined BSP_INTERRUPT_VECTOR_MIN to a value other than zero. Define it to zero and use a custom bsp_interrupt_is_valid_vector() function instead. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_NO_HEAP_USAGESebastian Huber2021-06-243-40/+3
| | | | | | | Remove the support for BSP_INTERRUPT_NO_HEAP_USAGE. This was only used by one BSP and provides no real benefit. Update #3269.
* grlib: Register system console as /dev/consoleSebastian Huber2021-06-241-1/+5
| | | | Close #4461.
* bsps/powerpc, bsps/shared: Move remaining legacy networking header filesVijay Kumar Banerjee2021-06-238-2359/+0
|
* bsp/leon3: Fix compile errorSebastian Huber2021-06-231-1/+1
| | | | Fix compile error with RTEMS_DRVMGR_STARTUP = True.
* bsps/i386: Update calibration of TSC to be more accurateJan Sommer2021-06-211-33/+38
| | | | Closes #4455
* bsps/irq: Change license to BSD-2-ClauseSebastian Huber2021-06-1711-97/+242
| | | | | | | Change license to BSD-2-Clause according to file history and re-licensing agreement. Update #3053.
* grlib: Simplify apbuart_inbyte_nonblocking()Sebastian Huber2021-06-171-5/+5
|
* grlib: Fix apbuart_outbyte_polled() prototypeSebastian Huber2021-06-172-2/+2
| | | | Callers usually want to output a character.
* grlib: Add apbuart_outbyte_wait()Sebastian Huber2021-06-176-24/+24
|
* grlib: Remove NL -> CR in apbuart_outbyte_polled()Sebastian Huber2021-06-176-12/+4
| | | | This is already done in rtems_putc().
* bsps/leon3: Auto initialization for printk()Sebastian Huber2021-06-171-28/+14
| | | | | | Get rid of the hack to output into the idle stack during the early system initialization. This fixes also a couple of test program failures which fail due to missing output.
* grlib: Add ambapp_plb()Sebastian Huber2021-06-1719-63/+96
| | | | | Replace the global variable ambapp_plb with a function to allow an automatic on demand initialization.
* grlib: Customizable allocation in ambapp_scan()Sebastian Huber2021-06-172-26/+42
| | | | | Make the memory allocations in ambapp_scan() customizable via the new struct ambapp_context parameter which generalizes the memory copy handler.
* bsps/sparc: Simplify memory initializationSebastian Huber2021-06-102-34/+39
| | | | | | | | | | | | | Directly initialize the memory in the start sequence defined by start.S instead of using a system initialization handler. This avoids using the global variable rdb_start which used a memory location which was shared with _ERC32_MEC_Timer_Control_Mirror. This change makes it possible to use _Memory_Allocate() even before the system initialization is started. Change license to BSD-2-Clause according to file history and re-licensing agreement. Update #3053.
* bsps/sparc: Simplify stack initializationSebastian Huber2021-06-101-28/+21
| | | | | | Initialize the stacks for all processors in one place. Do not rely on Per_CPU_Control::interrupt_stack_high and directly use the statically allocated interrupt stack area.
* bsps/sparc: Unify stack initializationSebastian Huber2021-06-101-8/+6
| | | | | Initialize the stacks in start.S in one place and identical to _CPU_Context_Initialize().
* bsps/sparc: Remove support to load data sectionSebastian Huber2021-06-101-32/+4
| | | | | | | | | | | | | | | | | | Remove the support to load the data section and rely on the boot loader. The code is an artifact from the old erc32 days, when we would boot and execute from ROM and the .data had to be copied over to RAM. With leon1/2/3, this is not used anymore as a boot loader is made from the RAM image using a custom tool (mkprom). In SMP configurations, this support was also broken since LEON3_Boot_Cpu (in the data section due to the -1 initialization value) was used quite early in the start sequence. If the data copy is really necessary, then an application can still add this step as a very early system initialization step, since boot_card() and the system initialization loop does not use initialized read-write data (only read-only and BSS data). However, the SMP startup would still not work in this case. A boot loader is a better place to load the sections.
* bsps/sparc: Remove unused __bsp_mem_init symbolSebastian Huber2021-06-101-1/+1
|
* aarch64: add qemu bsps for cortex-a72Gedare Bloom2021-06-096-0/+355
| | | | The a72 BSPs are identical to the a53 BSPs just changing a53 to a72.
* arm/fvp: Fix integer from pointer without a castSebastian Huber2021-06-071-1/+1
| | | | Update #4202.
* Change filesystem utime_h handler to utimens_hRyan Long2021-05-281-1/+1
| | | | | | | Also updated licenses. Closes #4400 Updates #3899
* bsps/aarch64: Add MMU driver to relax alignmentKinsey Moore2021-05-275-0/+518
| | | | | | | | | | | | | | | Currently, the AArch64 BSPs have a hard time running on real hardware without building the toolchain and the bsps with -mstrict-align in multiple places. Configuring the MMU on these chips allows for unaligned memory accesses for non-device memory which avoids requiring strict alignment in the toolchain and in the BSPs themselves. In writing this driver, it was found that the synchronous exception handling code needed to be rewritten since it relied on clearing SCTLR_EL1 to avoid thread stack misalignments in RTEMS_DEBUG mode. This is now avoided by exactly preserving thread mode stack and flags and the new implementation is compatible with the draft information provided on the mailing list covering the Exception Management API.
* bsps/aarch64: Advertise cache function supportKinsey Moore2021-05-271-0/+10
| | | | | Ensure that cache functions are flagged as usable by the generic cache implementation code.
* bsps/aarch64: Align MVAs consistentlyKinsey Moore2021-05-271-8/+5
| | | | | | This fixes a bug where addresses were not being aligned correctly. Addresses used in cache functions are now aligned consistently using RTEMS_ALIGN_DOWN.
* bsps/aarch64: Break out system registersKinsey Moore2021-05-271-180/+33
| | | | | Break out system register definitions and accessors so that they're usable by other parts of RTEMS.
* powerpc/.../sbrk.c: Do not reference errno.Joel Sherrill2021-05-251-2/+12
| | | | Closes #4r37.
* ppc-irq-legacy.c: Use rtems_malloc() instead of malloc().Joel Sherrill2021-05-251-10/+11
| | | | Closes #4438.
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-27 21:26:11 +0000