| Commit message (Collapse) | Author | Age | Files | Lines |
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Update #3269.
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Bring the error conditions and status in line with
rtems_task_get_affinity() and rtems_task_set_affinity().
Update #3269.
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Update #3269.
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The heap protection is conditional.
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When compiling the lwIP port for the TMS570, there
were issues with the BSP. Headers are expected in a folder
named ti_herc which did not exist. This fixes the issue.
Furthermore, there were multiple warnings about define redefinitions.
This was fixed as well.
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These patches were submitted a few months ago, but it was found out
that the default-by-family: [] were missing in the GPIO .yml lines.
This was fixed in this patch.
This patch accounts for different pins for the ETH peripheral
on STM32H7 devices. For example, the Nucleo H743ZI has slightly
different pins than other STM32H7 boards.
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The <leon.h> header file contains a lot of implementation details. Hide them
from <bsp.h>.
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Fully support the interrupt extension API to set/get the interrupt affinity.
Remove LEON3_irq_to_cpu which defined the interrupt to processor mapping in a
BSP-specific way.
Update #3269.
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Flush imx_gic_dist_base so that secondary processors can use the right
address.
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Skip the data cache initialization if we are a secondary processor.
The bug was introduced by e164df5e33608576443b4cd5923a9046358ee773 and
did not show up in tests using Qemu since the data cache behaviour is
not emulated.
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Calling the memory FLASH and EXTRAM instead of FLEXSPI and SDRAM makes
it simpler to support other types of external RAM. This patch also
removes some of the calculations and improves names and documentation to
avoid pitfalls. It removes a unnecessary memory definition.
Update #4180
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Update #4180
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Fixes a problem with bad epilog code in _fini and to keep sections
necessary with the -ffunction/data-sections.
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This function is not performance critical. There is no need to
implement it inline.
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The fix to address CID 1399742 (NO_EFFECT) in commit
f8b6359415404540864f809cbcffb8c2200261e1 introduced a bug since
LEON3_IrqCtrl_EIrq == -1 in case no extended interrupts are supported by
the interrupt controller. Fix this by checking for
LEON3_IrqCtrl_EIrq > 0.
In addition, interrupt number 0 is reserved and should not be used.
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The GICv3 support is shared between AArch32 and AArch64. For AArch32,
the new AARCH64_IS_NONSECURE is never defined. Use ARM_MULTILIB_ARCH_V4
instead.
This issue was introduced by 76c6caad52244ab9a14151620a80ff0f71035b6c.
There is still a change in bsp_interrupt_vector_enable() for AArch32
compared to the version before 76c6caad52244ab9a14151620a80ff0f71035b6c.
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Move the moduleid register to the correct offset according to Cadence IP
documentation.
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The existing fix for the ZynqMP UART hardware bug only caught the vast
majority of instances where it could occur. To fully fix the data
corruption, this fix must be applied after every baud rate change. This
makes the logic reset and kick apply in any locations where the baud
rate could be changed.
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Move _ISR_Handler() to a separate file since it is now only used if a handler
is installed by _CPU_ISR_install_raw_handler().
Statically initialize the traps for external interrupts to use the new
_SPARC_Interrupt_trap() which directly dispatches the interrupt handlers
installed by rtems_interrupt_handler_install() via the BSP-provided
_SPARC_Interrupt_dispatch().
Since the trap table is now fully statically initialized, there is no longer a
dependency on the Cache Manager in the default configuration.
Update #4458.
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Add bsp_interrupt_handler_dispatch_unchecked() as an alternative to
bsp_interrupt_handler_dispatch(). It may be used if the caller can ensure that
the vector number is valid.
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Avoid using set_vector() which depends on _ISR_Vector_table(). Prepare for a
statically initialized trap table.
Update #4458.
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Statically initialize the trap table in start.S to jump to _SPARC_Bad_trap()
for all unexpected traps. This enables a proper RTEMS fatal error handling
right from the start. Do not rely on the stack and register settings which
caused an unexpected trap. Use the ISR stack of the processor to do the fatal
error handling. Save the full context which caused the trap. Fatal error
handler may use it for error logging.
Unify the _CPU_Exception_frame_print() implementations and move it to cpukit.
Update #4459.
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This makes it easier to review start.o and set break points to trap table
entries. This change was checked by inspecting the trap table in start.o with
objdump.
Update #4458.
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Fix an off by one error.
Update #3269.
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Change the default value of BSP_INTERRUPT_VECTOR_COUNT so that no interrupt
vectors are supported and all related directives return RTEMS_INVALID_ID.
Update #3269.
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This define is no longer used.
Update #3269.
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Use BSP_INTERRUPT_VECTOR_COUNT instead of BSP_INTERRUPT_VECTOR_MAX.
Update #3269.
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Replace it with BSP_INTERRUPT_VECTOR_COUNT.
Update #3269.
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Assert BSP_INTERRUPT_VECTOR_MAX + 1 == BSP_INTERRUPT_VECTOR_COUNT.
After building all BSPs with this patch, BSP_INTERRUPT_VECTOR_MAX can be
removed and replaced by BSP_INTERRUPT_VECTOR_COUNT. The
BSP_INTERRUPT_VECTOR_COUNT allows a default implementation which supports no
interrupt vector at all. Using COUNT instead of MAX may avoid some
interpretation issues, for example is the maximum value a valid vector number
or not.
Update #3269.
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Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector
numbers start with zero.
The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit
and building all BSPs.
Update #3269.
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After building all BSPs with this patch, this BSP-specific define can be
removed to simplify the implementation.
Update #3269.
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Update #3269.
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This BSP uses a customized implementation of the interrupt extension API. It
was the only BSP which defined BSP_INTERRUPT_VECTOR_MIN to a value other than
zero. Define it to zero and use a custom bsp_interrupt_is_valid_vector()
function instead.
Update #3269.
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Remove the support for BSP_INTERRUPT_NO_HEAP_USAGE. This was only used
by one BSP and provides no real benefit.
Update #3269.
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Close #4461.
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Fix compile error with RTEMS_DRVMGR_STARTUP = True.
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