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* bsps: Add gicv3_get_attributes()Sebastian Huber2022-04-061-26/+1
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* bsps: Add gicv3_sgi_ppi_get_priority()Sebastian Huber2022-04-061-3/+4
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* bsps: Add gicv3_sgi_ppi_set_priority()Sebastian Huber2022-04-061-3/+5
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* bsps: Move gicv3_init_cpu_interface()Sebastian Huber2022-04-061-30/+2
| | | | Make the processor index a parameter.
* bsps: Move gicv3_init_dist()Sebastian Huber2022-04-061-39/+1
| | | | Make the distributor register block a parameter.
* bsps: Add gicv3_sgi_ppi_disable()Sebastian Huber2022-04-061-4/+1
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* bsps: Add gicv3_sgi_ppi_enable()Sebastian Huber2022-04-061-9/+1
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* bsps: Add gicv3_sgi_ppi_is_enabled()Sebastian Huber2022-04-061-4/+1
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* bsps: Add gicv3_ppi_clear_pending()Sebastian Huber2022-04-061-4/+1
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* bsps: Add gicv3_ppi_set_pending()Sebastian Huber2022-04-061-4/+1
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* bsps: Add gicv3_trigger_sgi()Sebastian Huber2022-04-061-14/+1
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* bsps: Add gicv3_sgi_ppi_is_pending()Sebastian Huber2022-04-061-4/+1
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* bsps: Add <dev/irq/arm-gicv3.h>Sebastian Huber2022-04-061-121/+1
| | | | | | | | Separate the Interrupt Manager implementation from the generic Arm GICv3 support. Move parts of the Arm GICv3 support into a new header file. This helps to support systems with a clustered structure in which multiple GICv3 instances are present. For example, two clusters of two Cortex-R52 cores where each cluster has a dedicated GICv3 instance.
* bsps/irq: Improve affinity set handlingSebastian Huber2022-03-161-1/+7
| | | | | | | | Restrict the affinity set to the set of online processors. Make sure the affinity set for an interrupt vector contains at least one online processor. Update #3269.
* bsps/irq: Fix formattingSebastian Huber2022-03-161-3/+3
| | | | Update #3269.
* bsps/shared: Manual file header clean upChristian Mauderer2022-03-107-125/+87
| | | | Updates #4625.
* bsps/shared/: Scripted embedded brains header file clean upJoel Sherrill2022-03-1025-122/+14
| | | | Updates #4625.
* bsp/leon3: Include missing header fileSebastian Huber2022-03-081-0/+1
| | | | | The <leon.h> include was removed from <bsp.h> in commit 1577a48369fae5e024baa2119b26d25de0f43946.
* bsps: Avoid use of memcpy() in bsp_fdt_copy()Sebastian Huber2022-01-191-1/+1
| | | | | The memcpy() function may be not loaded at the time bsp_fdt_copy() is called.
* bsps: Default to CPU counter benchmark timerSebastian Huber2022-01-151-30/+0
| | | | | | Most BSPs which used the stubbed benachmark timer provide a CPU counter. All BSPs provide at least a stub CPU counter. Simply use the benchmark timer implementation using the CPU counter.
* aarch64: always boot into EL1NSGedare Bloom2022-01-121-12/+3
| | | | | | | | | | | Always start the executive in Exception Level 1, Non-Secure mode. If we boot in EL3 Secure with GICv3 then we have to initialize the distributor and redistributor to set up G1NS interrupts early in the boot sequence before stepping down from EL3S to EL1NS. Now there is no need to distinguish between secure and non-secure world execution after the primary core boots, so get rid of the AARCH64_IS_NONSECURE configuration option.
* arm/gicv3: refactor DIST initialization to helperGedare Bloom2022-01-121-31/+29
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* Fix device tree blob alignmentSebastian Huber2022-01-111-4/+4
| | | | A device tree blob must be aligned on an 8-byte boundary.
* libc: Optimize malloc() initializationSebastian Huber2021-11-302-0/+98
| | | | | | | | | | | | | | | | The BSPs provide memory for the separate C Program Heap initialization via _Memory_Get(). Most BSPs provide exactly one memory area. Only two BSPs provide more than one memory area (arm/altera-cyclone-v and bsps/powerpc/mpc55xxevb). Only if more than one memory area is provided, there is a need to use _Heap_Extend(). Provide two implementations to initialize the separate C Program Heap and let the BSP select one of the implementations based on the number of provided memory areas. This gets rid of a dependency on _Heap_Extend(). It also avoids dead code sections for most BSPs. Change licence to BSD-2-Clause according to file history. Update #3053.
* score: Optimize Workspace Handler initializationSebastian Huber2021-11-302-0/+92
| | | | | | | | | | | | The BSPs provide memory for the workspace initialization via _Memory_Get(). Most BSPs provide exactly one memory area. Only two BSPs provide more than one memory area (arm/altera-cyclone-v and bsps/powerpc/mpc55xxevb). Only if more than one memory area is provided, there is a need to use _Heap_Extend(). Provide two implementations to initialize the workspace handler and let the BSP select one of the implementations based on the number of provided memory areas. This gets rid of a dependency on _Heap_Extend(). It also avoids dead code sections for most BSPs.
* bsps/gicv2: Allow BSPs to define IRQ attributesKinsey Moore2021-09-213-34/+180
| | | | | | | ARM's GICv2 is configurable and its attributes vary between implementations including omission of specific interrupts. This allows BSPs to accomodate those varying implementations with customized attribute sets.
* bsps/shared: Add PSCI SMP startup supportKinsey Moore2021-09-211-0/+92
| | | | | | | | This adds the SMP function that supports spinup of additional CPU cores using the ARM standard PSCI inteface. This interface is provided by QEMU as well as ARM Trusted Firmware running in monitor mode (EL3) on ARMv7 and AArch64 CPUs. This supports activation va SMC or HVC instructions depending on BSP configuration.
* build: Remove old build systemSebastian Huber2021-09-214-151/+0
| | | | | Close #3250. Close #4081.
* arm/xilinx: Fix zynq-uart interrupt receiveChris Johns2021-09-162-57/+66
| | | | | | | | - Trigger on a single character entering the RX FIFO - Disable the RX timeout - Send up to a FIFO full of data
* bsps/zynq: Moved general i2c files to shared directoriesStephen Clark2021-09-091-0/+482
| | | | | Certain files related to the Zynq BSP's I2C driver are useable by the ZynqMP BSP as well. Moved these files to shared directory in anticipation of I2C support for ZynqMP.
* bsps/cache: Optimize smp_cache_broadcast()Sebastian Huber2021-07-291-1/+2
| | | | | Directly call the handler on the executing processor instead of doing this indirectly via a per-CPU job.
* bsps/irq: bsp_interrupt_facility_initialize()Sebastian Huber2021-07-274-13/+5
| | | | | | Do not return a status code in bsp_interrupt_facility_initialize() since this leads to unreachable code in bsp_interrupt_initialize(). Use RTEMS_DEBUG assertions in bsp_interrupt_facility_initialize() if necessary.
* bsps/irq: Add rtems_interrupt_entry_install()Sebastian Huber2021-07-267-341/+481
| | | | | | | | | | | | | | | | | | | Add rtems_interrupt_entry_remove(). Split up irq-generic.c into several files. In particular, place all functions which use dynamic memory into their own file. Add optional macros to let the BSP customize the vector installation after installing the first entry and the vector removal before removing the last entry: * bsp_interrupt_vector_install() * bsp_interrupt_vector_remove() Use these new customization options in the m68k/genmcf548x BSP so re-use the generic interrupt controller support. Update #3269.
* bsps/irq: Move bsp_interrupt_handler_is_empty()Sebastian Huber2021-07-261-19/+0
| | | | | | This function is only used by one BSP. Update #3269.
* bsps/irq: Add bsp_interrupt_check_and_lock()Sebastian Huber2021-07-262-61/+50
| | | | | | | | Return RTEMS_INCORRECT_STATE instead of RTEMS_INTERNAL_ERROR in case the interrupt support is not initialized. This is similar to rtems_timer_server_fire_after() for example. Update #3269.
* bsps/irq: Use rtems_interrupt_entrySebastian Huber2021-07-262-13/+13
| | | | Update #3269.
* bsps/irq: Implement new directives for GICv2/3Sebastian Huber2021-07-262-31/+185
| | | | Update #3269.
* bsps/irq: bsp_interrupt_set_affinity()Sebastian Huber2021-07-263-4/+7
| | | | | | Return a status code for bsp_interrupt_set_affinity(). Update #3269.
* bsps/irq: bsp_interrupt_get_affinity()Sebastian Huber2021-07-263-10/+16
| | | | | | Return a status code for bsp_interrupt_get_affinity(). Update #3269.
* bsps/irq: bsp_interrupt_vector_disable()Sebastian Huber2021-07-264-6/+8
| | | | | | Return a status code for bsp_interrupt_vector_disable(). Update #3269.
* bsps/irq: bsp_interrupt_vector_enable()Sebastian Huber2021-07-264-6/+8
| | | | | | Return a status code for bsp_interrupt_vector_enable(). Update #3269.
* bsps/irq: Add rtems_interrupt_is_pending()Sebastian Huber2021-07-264-1/+49
| | | | | | Add a default implementation which just returns RTEMS_UNSATISFIED. Update #3269.
* bsps/irq: Add rtems_interrupt_get_attributes()Sebastian Huber2021-07-264-2/+55
| | | | | | | Add a default implementation which clears the attributes to zero and just returns RTEMS_SUCCESSFUL for valid parameters. Update #3269.
* bsps/irq: Add rtems_interrupt_raise()Sebastian Huber2021-07-266-0/+144
| | | | | | | | | Add rtems_interrupt_raise_on() and rtems_interrupt_clear(). Add a default implementation which just returns RTEMS_UNSATISFIED for valid parameters. Update #3269.
* bsps/irq: Add rtems_interrupt_vector_is_enabled()Sebastian Huber2021-07-264-1/+51
| | | | | | | Add a default implementation which just returns RTEMS_UNSATISFIED for valid parameters. Update #3269.
* rtems: Add RTEMS_FATAL_SOURCE_SPURIOUS_INTERRUPTSebastian Huber2021-07-261-7/+5
| | | | | | | | Add RTEMS_FATAL_SOURCE_SPURIOUS_INTERRUPT as the fatal source for spurious interrupts. Use the interrupt vector number of the spurious interrupt for the fatal code. Update #3269.
* rtems: Add rtems_interrupt_vector_enable()Sebastian Huber2021-07-263-0/+61
| | | | | | Add rtems_interrupt_vector_disable(). Update #3269.
* bsps/irq: Move handler iterate to separate fileSebastian Huber2021-07-264-82/+102
| | | | Update #3269.
* bsps/irq: Canonicalize get/set affinity errorsSebastian Huber2021-07-261-2/+10
| | | | | | | Bring the error conditions and status in line with rtems_task_get_affinity() and rtems_task_set_affinity(). Update #3269.
* bsps/irq: Move get/set affinity to separate fileSebastian Huber2021-07-264-52/+92
| | | | Update #3269.
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