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* bsps: Fix GICv3 support for AArch32Sebastian Huber2021-06-301-3/+3
| | | | | | | | | | | The GICv3 support is shared between AArch32 and AArch64. For AArch32, the new AARCH64_IS_NONSECURE is never defined. Use ARM_MULTILIB_ARCH_V4 instead. This issue was introduced by 76c6caad52244ab9a14151620a80ff0f71035b6c. There is still a change in bsp_interrupt_vector_enable() for AArch32 compared to the version before 76c6caad52244ab9a14151620a80ff0f71035b6c.
* bsps/zynq-uart: Make post baud change kick globalKinsey Moore2021-06-292-0/+14
| | | | | | | | The existing fix for the ZynqMP UART hardware bug only caught the vast majority of instances where it could occur. To fully fix the data corruption, this fix must be applied after every baud rate change. This makes the logic reset and kick apply in any locations where the baud rate could be changed.
* bsps/aarch64: add non-secure mode and versal supportGedare Bloom2021-06-241-2/+21
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* bsps/aarch64: add mnemonic for ICC_IGRPEN1_EL3Gedare Bloom2021-06-241-0/+1
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* rtems: Constify rtems_task_wake_when()Sebastian Huber2021-05-121-1/+1
| | | | | | | | | | | | | | | | Add a parameter to _TOD_Validate() to disable the validation of the ticks member. There are two reasons for this change. Firstly, in rtems_task_wake_when() was a double check for time_buffer == NULL (one in rtems_task_wake_when() and one in _TOD_Validate()). Secondly, the ticks member is ignored by rtems_task_wake_when(). This was done with a write of zero to the ticks member and thus a modification of the user-provided structure. Now the structure is no longer modified. Using a mask parameter is quite efficient. You just have to load an immediate value and there are no additional branches in _TOD_Validate(). Close #4406.
* _TOD_Validate(): Fix incorrect return codeFrank Kühndel2021-05-121-1/+1
| | | | | | | | | | | | | | | This patch fixes bug #4403. Directives * rtems_timer_fire_when() * rtems_timer_server_fire_when() * rtems_task_wake_when() are documented to return RTEMS_INVALID_ADDRESS when their time-of-day argument is NULL. But actually they return RTEMS_INVALID_CLOCK. To fix the issue this patch changes _TOD_Validate() to return a status code instead of just true/false. Close #4403
* bsps/xilinx-zynqmp: Avoid constant UART reinitKinsey Moore2021-04-191-3/+6
| | | | | | Constantly reinitializing the Cadence UART on every character output causes data corruption/loss on some ZynqMP hardware. Only initialize the UART once for early output and give it a kick on startup.
* disp_hcms29xx.c: Unused value (CID #1399752)Ryan Long2021-04-081-1/+3
| | | | | | CID 1399752: Unused value in disp_hcms29xx_update_task(). Closes #4342
* bsps/xilinx_zynq: Add SPI driver for xilinx-axi-spiJan Sommer2021-03-301-0/+402
| | | | Updates #4321
* bsps/xilinx_zynq: Add SPI driver for cadence-spiJan Sommer2021-03-101-0/+444
| | | | Updates #4320
* bsps/shared: Allow setting baud rate for zynq uartJan Sommer2021-03-051-5/+16
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* bsps/shared: Adapt fsl-edma driver for imxrtChristian Mauderer2021-01-211-104/+245
| | | | | | | | | | Note: The changes have been done with portability in mind. The driver should (in theory) be able to replace the original one in the MPC BSPs too. For full compatibility an adaption layer and especially a test would be necessary. Because both are missing, don't integrate it into the MPC BSP now. Update #4180
* bsps/shared: Copy fsl-edma from mpc55xxChristian Mauderer2021-01-211-0/+329
| | | | | | This is a preparation for making the driver universal. Update #4180
* bsps: Use header file for GIC architecture supportSebastian Huber2020-12-232-0/+2
| | | | | | This avoids a function call overhead in the interrupt dispatching. Update #4202.
* bsps: Fix includesSebastian Huber2020-12-221-0/+6
| | | | Update #4202.
* bsps: Remove gicvx_interrupt_dispatch()Sebastian Huber2020-12-162-2/+2
| | | | | | Avoid one level of indirection. Update #4202.
* bsps: Add GICv3 arm_gic_irq_processor_count()Sebastian Huber2020-12-162-0/+34
| | | | Update #4202.
* bsps/gicv3: Resolve build warnings on 64bitKinsey Moore2020-12-111-2/+2
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* bsps: Remove ARM GIC SGI target filterSebastian Huber2020-12-102-15/+3
| | | | | | | Remove the target filter for software-generated interrupts since this feature is not supported by the affinity routing in GICv3. Update #4202.
* bsps: Fix GICv3 arm_gic_trigger_sgi()Sebastian Huber2020-12-102-3/+3
| | | | | | | | Use the targets parameter to determine the targets of the SGI. Change targets parameter type to 32-bit to ease the parameter passing. GICv3 supports up to 16 targets. Update #4202.
* bsps/arm: Support system level ARM Generic TimerSebastian Huber2020-12-101-1/+12
| | | | Update #4202.
* bsps: Add SMP support to ARM GICv3Sebastian Huber2020-12-091-23/+33
| | | | Update #4202.
* zynq-uart: Fix set_attributes implementationKinsey Moore2020-12-032-6/+52
| | | | | | | | | The zynq-uart set_attributes implementation was configured to always return false which causes spconsole01 to fail. This restores the disabled implementation which sets the baud rate registers appropriately and allows spconsole01 to pass. This also expands the set_attributes functionality to allow setting of the stop bits, character width, and parity.
* bsps: Move ARM GICv2 driver to bsps/sharedKinsey Moore2020-12-022-1/+276
| | | | | This moves the ARM GICv2 driver to bsps/shared to be usable by AArch64 code.
* bsps: Move zynq-uart to bsps/sharedKinsey Moore2020-12-022-0/+361
| | | | | This moves the zynq-uart driver from bsps/arm/shared to bsps/shared to accomodate use by AArch64 BSPs.
* rtems: Add <rtems/rtems/clockimpl.h>Sebastian Huber2020-12-022-0/+2
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* disp_hcms29xx: Fix string truncation warningFrank Kühndel2020-10-101-4/+3
| | | | | | The strlcpy() function ensures there is always a NUL character at the end of the string. Hence it is safer as strncpy() and it avoids the compiler warning
* bsps: Break out AArch32 GICv3 supportKinsey Moore2020-10-051-0/+354
| | | | | This breaks out AArch32-specific code so that the shared GICv3 code can be reused by other architectures.
* bsps: Break out AArch32 portions of GPT driverKinsey Moore2020-10-051-0/+174
| | | | | | This breaks AArch32-specific portions of the ARM GPT driver into their own file so that the generic code can be moved for reuse by other architectures.
* Move ARM PL011 UART driverKinsey Moore2020-10-051-0/+91
| | | | This UART driver is now needed for BSPs other than ARM.
* dev/spi-memdrv: Fix use of uninit mem_param_ptrSebastian Huber2020-08-031-12/+9
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* bsps/clock: Fix fast idle clock tick supportSebastian Huber2020-07-231-6/+13
| | | | | | If we interrupt a thread dispatch critical section (thread dispatch disable level != ISR nest level), then we should not do the fast idle mode since this may delay an ongoing system call forever.
* bsp/shared/clock: Reset Clock_driver_isrs to correct valueJan Sommer2020-04-031-1/+1
| | | | | | | CLOCK_DRIVER_ISRS_PER_TICK is the configuration define, CLOCK_DRIVER_ISRS_PER_TICK_VALUE is the actual value of ISRS per clock tick, therefore use this one to reset the Clock_driver_isrs after each tick.
* bsps/clock: Use _SMP_Get_processor_maximum()Sebastian Huber2020-02-251-1/+1
| | | | | | | Use a specific test to enable the fast idle mode instead of using the rtems_configuration_is_smp_enabled() workaround. Update #3876.
* libchip/ns16550: Allow user calculate baud divisorG S Niteesh2020-02-161-0/+2
| | | | | | | | This patch will allow the user to pass a function to calculate the baud divisor. This will allow for more flexibility, since for some BSPs like raspberrypi, the calculation of baud divisor is different from what is in the current driver.
* Use RTEMS_SYSINIT_ORDER_LAST_BUT_5Sebastian Huber2020-02-041-1/+1
| | | | | | | | Use RTEMS_SYSINIT_ORDER_LAST_BUT_5 instead of RTEMS_SYSINIT_ORDER_LAST to allow applications and support functions to place system initialization handlers behind the standard handlers. Update #3838.
* clock: Simplify driver initializationSebastian Huber2019-12-111-18/+1
| | | | | | Use a system initialization handler instead of a legacy IO driver. Update #3834.
* score: Rename _SMP_Get_processor_count()Sebastian Huber2019-04-111-2/+4
| | | | | | | Rename _SMP_Get_processor_count() in _SMP_Get_processor_maximum() to be in line with the API level rtems_scheduler_get_processor_maximum(). Update #3732.
* z85c30.c: Do not process 0 baud and return an error (CID 1399713)Joel Sherrill2019-03-141-0/+9
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* bsps: Adjust architecture Doxygen groupsSebastian Huber2019-03-041-1/+1
| | | | | | | | | | - Use CamelCase as it is not used in our C code. Enables simple search and replace. - Prefix with "RTEMS" to aid deployment and integration. It aids searching and sorting. Update #3706.
* Remove explicit file names from @fileSebastian Huber2019-02-281-1/+1
| | | | | | This makes the @file documentation independent of the actual file name. Update #3707.
* Simplify _CPU_Counter_difference()Sebastian Huber2018-12-071-23/+0
| | | | | | | | | | | | | | In order to simplify the use of CPU counter values it is beneficial to have monotonic increasing values within the range of the CPU counter ticks data type, e.g. 32-bit unsigned integer. This eases the use of CPU counter timestamps in external tools which do not know the details of the CPU counter hardware. The CPU counter is the fastest way to get a time on an RTEMS system. Such a CPU counter may be also used as the timecounter. Use it on SPARC for this purpose to simplify the clock drivers. Update #3456.
* bsps: Include missing header filesSebastian Huber2018-11-091-0/+2
| | | | Update #3598.
* serial/ns16550: Fix precision clock synthesizerSebastian Huber2018-10-171-15/+16
| | | | | | | The precision clock synthesizer support broke the driver on the QorIQ P1020. On this device the Alternate Function Register is accessed with DLAB == 1 instead of the FIFO Control Register (FCR). Restructure the code to account for this.
* Use rtems_task_exit()Sebastian Huber2018-10-021-1/+1
| | | | | Update #3530. Update #3533.
* libchip/ata: Use rtems_blkdev_create()Sebastian Huber2018-08-071-46/+13
| | | | Update #3358.
* serial/ns16550: Precision clock synthesizerSebastian Huber2018-08-011-13/+67
| | | | | | Set the FIFO control register while DLAB == 1 in the line control register. At least on the QorIQ T4240 the driver still works with the re-ordered FIFO control register access.
* serial/ns16550: Use standard register namesSebastian Huber2018-08-011-4/+4
| | | | | Use the standard register names for the divisor latches. This makes it easier to compare the code with other driver implementations.
* Remove Clock_driver_support_shutdown_hardware()Sebastian Huber2018-06-272-38/+8
| | | | | | | | | | | | | | | | | The aim of this clock driver hook was to stop clock tick interrupts at some late point in the exit() procedure. The use of atexit() pulls in malloc() which pulls in errno. It is incompatible with the intention of the CONFIGURE_DISABLE_NEWLIB_REENTRANCY configuration option. The exit() function must be called from thread context, so accompanied clock tick interrupts should cause no harm. On the contrary, someone may assume a normal operating system operation, e.g. working timeouts. Remove the Clock_driver_support_shutdown_hardware() clock driver hook. Close #3436.
* Add _CPU_Counter_frequency()Sebastian Huber2018-06-151-0/+20
| | | | | | | | | | Add rtems_counter_frequency() API function. Use it to initialize the counter value converter via the new system initialization step (RTEMS_SYSINIT_CPU_COUNTER). This decouples the counter implementation and the counter converter. It avoids an unnecessary pull in of the 64-bit integer division from libgcc. Update #3456.
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