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* bsps/riscv: Add Microchip PolarFire SoC BSP variantPadmarao Begari2022-09-208-4/+132
| | | | | | | | The Microchip PolarFire SoC support is implemented as a riscv BSP variant to boot with any individual hart(cpu core) or SMP based on the boot HARTID configurable and support components are 4 CPU Cores (U54), Interrupt controller (PLIC), Timer (CLINT), UART.
* bsps/riscv: Add device tree blobPadmarao Begari2022-09-202-0/+967
| | | | | | | | | | | | | | | | | Add the basic Microchip PolarFire SoC device tree source and blob The mpfs-dtb.h is generated by the bin2hex https://github.com/padmaraob/bin2hex 1.Compile and build the bin2hex.c $ gcc -o bin2hex bin2hex.c 2.Generate the mpfs.dtb from the mpfs.dts $ dtc -O dtb -o mpfs.dtb mpfs.dts 3.Generate the mpfs-dtb.h Header file from the mpfs.dtb. $ ./bin2hex mpfs.dtb
* bsps/riscv/riscv: Fix fe310_uart_readAlan Cudmore2022-09-191-2/+5
| | | | | | | | | | | Note: Resending after learning how to use git send-email, please disregard previous message. This fixes the riscv fe310 console driver fe310_uart_read function. The function reads the RX status/data register to check if data is available, but discards the data and reads it a seconds time. Also cleared the interrupt enable bit in the first_open function. Close #4719
* bsp/riscv: Add NOEL-V BSPMartin Aberg2022-09-068-0/+469
| | | | | | | | | | | | | | | | | | | | Added support for Cobham Gaisler NOEL-V systems. The NOEL-V support is implemented as a riscv BSP. Both 32-bit and 64-bit processor systems are supported. Cobham Gaisler's NOEL-V RISC-V processor IP is described here: https://www.gaisler.com/NOELV Compatible with the following NOEL-V FPGA example design ranges available from Cobham Gaisler. Follow the links for free bit-streams, DTS/DTB, user's manuals and quick-start guides: - NOEL-ARTYA7-EX (https://www.gaisler.com/NOEL-ARTYA7) - NOEL-PF-EX (https://www.gaisler.com/NOEL-PF) - NOEL-XCKU-EX (https://www.gaisler.com/NOEL-XCKU) Uses the shared GRLIB APBUART console driver "apbuart_termios.c". APBUART devices are probed using device tree. Closes #4225.
* bsp/riscv: Work area size based on /memory node in fdtDaniel Cederman2022-09-061-0/+144
| | | | | Uses the first entry in the /memory node to determine the end of the work area. Falls back on linker symbol if unable to parse the node.
* riscv: Use zicsr architecture extensionSebastian Huber2022-02-252-1/+8
| | | | | | | | | | This is required for ISA 2.0 support, see chapter "Zicsr", Control and Status Register (CSR) Instructions, Version 2.0 in RISC-V Instruction Set Manual, Volume I: RISC-V User-Level ISA
* bsps/riscv: Add missing includeSebastian Huber2022-02-251-0/+1
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* bsp_specs: Delete last remnants of these.Joel Sherrill2021-11-292-0/+0
| | | | Updates #3937.
* build: Remove old build systemSebastian Huber2021-09-216-534/+0
| | | | | Close #3250. Close #4081.
* score: Canonicalize _CPU_Fatal_halt()Sebastian Huber2021-07-282-2/+4
| | | | | | | | Move _CPU_Fatal_halt() declaration to <rtems/score/cpuimpl.h> and make sure it is a proper declaration of a function which does not return. Fix the type of the error code. If necessary, add the implementation to cpu.c. Implementing _CPU_Fatal_halt() as a function makes it possible to wrap this function for example to fully test _Terminate().
* bsps/irq: bsp_interrupt_facility_initialize()Sebastian Huber2021-07-272-6/+2
| | | | | | Do not return a status code in bsp_interrupt_facility_initialize() since this leads to unreachable code in bsp_interrupt_initialize(). Use RTEMS_DEBUG assertions in bsp_interrupt_facility_initialize() if necessary.
* bsps/irq: bsp_interrupt_set_affinity()Sebastian Huber2021-07-264-6/+10
| | | | | | Return a status code for bsp_interrupt_set_affinity(). Update #3269.
* bsps/irq: bsp_interrupt_get_affinity()Sebastian Huber2021-07-264-4/+8
| | | | | | Return a status code for bsp_interrupt_get_affinity(). Update #3269.
* bsps/irq: bsp_interrupt_vector_disable()Sebastian Huber2021-07-262-2/+5
| | | | | | Return a status code for bsp_interrupt_vector_disable(). Update #3269.
* bsps/irq: bsp_interrupt_vector_enable()Sebastian Huber2021-07-262-2/+5
| | | | | | Return a status code for bsp_interrupt_vector_enable(). Update #3269.
* bsps/irq: Add rtems_interrupt_is_pending()Sebastian Huber2021-07-262-0/+22
| | | | | | Add a default implementation which just returns RTEMS_UNSATISFIED. Update #3269.
* bsps/irq: Add rtems_interrupt_get_attributes()Sebastian Huber2021-07-262-0/+16
| | | | | | | Add a default implementation which clears the attributes to zero and just returns RTEMS_SUCCESSFUL for valid parameters. Update #3269.
* bsps/irq: Add rtems_interrupt_raise()Sebastian Huber2021-07-262-0/+46
| | | | | | | | | Add rtems_interrupt_raise_on() and rtems_interrupt_clear(). Add a default implementation which just returns RTEMS_UNSATISFIED for valid parameters. Update #3269.
* bsps/irq: Add rtems_interrupt_vector_is_enabled()Sebastian Huber2021-07-262-0/+22
| | | | | | | Add a default implementation which just returns RTEMS_UNSATISFIED for valid parameters. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAXSebastian Huber2021-06-242-2/+0
| | | | | | This define is no longer used. Update #3269.
* bsps/irq: Add BSP_INTERRUPT_VECTOR_COUNTSebastian Huber2021-06-242-0/+2
| | | | | | | | | | | | | Assert BSP_INTERRUPT_VECTOR_MAX + 1 == BSP_INTERRUPT_VECTOR_COUNT. After building all BSPs with this patch, BSP_INTERRUPT_VECTOR_MAX can be removed and replaced by BSP_INTERRUPT_VECTOR_COUNT. The BSP_INTERRUPT_VECTOR_COUNT allows a default implementation which supports no interrupt vector at all. Using COUNT instead of MAX may avoid some interpretation issues, for example is the maximum value a valid vector number or not. Update #3269.
* bsps/irq: Remove BSP_INTERRUPT_VECTOR_MINSebastian Huber2021-06-242-4/+0
| | | | | | | | | | Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector numbers start with zero. The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit and building all BSPs. Update #3269.
* grlib: Add apbuart_outbyte_wait()Sebastian Huber2021-06-171-1/+2
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* grlib: Remove NL -> CR in apbuart_outbyte_polled()Sebastian Huber2021-06-171-1/+1
| | | | This is already done in rtems_putc().
* grlib: Add ambapp_plb()Sebastian Huber2021-06-175-16/+25
| | | | | Replace the global variable ambapp_plb with a function to allow an automatic on demand initialization.
* bsps: Support RTEMS_NOINIT in linkcmdsSebastian Huber2021-05-022-0/+11
| | | | Update #3866.
* bsps: Remove networking driversVijay Kumar Banerjee2021-04-071-59/+0
| | | | Update #3850
* bsps/riscv: Add per cpu clock interruptJan Sommer2021-03-231-10/+49
| | | | - Fixes failure of test smpclock01
* bsp/riscv: Re-license to BSD-2-ClauseSebastian Huber2021-02-091-10/+37
| | | | | | Change license to BSD-2-Clause according to file history. Update #3053.
* bsps: Replace bsp_specs with an empty fileSebastian Huber2021-01-282-18/+0
| | | | | | | This fixes an issue with the latest tool chain which adds the default linker script in the endfile specification. Update #3250.
* bsps: Add missing DWARF 5 sectionsSebastian Huber2021-01-261-3/+5
| | | | Sort alphabetically.
* bsps: Support DWARF 5 sectionsSebastian Huber2021-01-251-20/+30
| | | | GCC 11 uses DWARF 5 by default.
* Add networking support for griscv bspJiri Gaisler2020-11-093-1/+74
| | | | | | | * Only GRETH device supported for now * Fix endian problem in GRETH driver * Remove SPARC assembly from greth.c * Builds with both autoconf and waf
* grlib: Add and use irqmp_has_timestamp()Sebastian Huber2020-10-101-1/+1
| | | | | | | Replace leon3_irqmp_has_timestamp() with irqmp_has_timestamp() and move it to grlib.h. Close #4128.
* bsps/riscv: Add bsp_fdt_map_intr()Sebastian Huber2020-09-231-0/+6
| | | | This function is required by libbsd.
* riscv: Make sifive_test finisher 4 bytesHesham Almatary2020-09-171-1/+1
| | | | | | QEMU is now stricter with MMIO sizes and accesses. uintptr_t on RV64 is 8 bytes and generates an sd instruction that Store/AMO faults because sifive_test MMIO expects 4 bytes accesses.
* bsps/riscv: Use far jump to boot_card()Sebastian Huber2020-09-151-1/+1
| | | | | | Use a far jump to avoid errors like this: relocation truncated to fit: R_RISCV_JAL against symbol `boot_card'
* htif_console_handler is defined in htif.cHesham Almatary2020-09-061-1/+1
| | | | closes #4069.
* bsps: Always install IPI in SMP configsSebastian Huber2020-08-311-12/+9
| | | | | | | The inter-processor interrupt (IPI) may be used to process per-CPU jobs. See for example the blocked handler in T_interrupt_test(). Update #3199.
* bsps/riscv: Fix multiple definitionSebastian Huber2020-04-101-2/+0
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* imfs: Replace devfs with an IMFS specializationSebastian Huber2020-03-091-3/+0
| | | | | | | | | | | | | | | | Add a simplified path evaluation function IMFS_eval_path_devfs() for a device only IMFS configuration. The code size can be further reduced by the application if it disables the support for legacy IO drivers via: #define CONFIGURE_IMFS_DISABLE_MKNOD #define CONFIGURE_IMFS_DISABLE_MKNOD_DEVICE Obsolete CONFIGURE_MAXIMUM_DEVICES. Remove BSP_MAXIMUM_DEVICES. Update #3894. Update #3898.
* Use RTEMS_SYSINIT_ORDER_LAST_BUT_5Sebastian Huber2020-02-041-1/+1
| | | | | | | | Use RTEMS_SYSINIT_ORDER_LAST_BUT_5 instead of RTEMS_SYSINIT_ORDER_LAST to allow applications and support functions to place system initialization handlers behind the standard handlers. Update #3838.
* bsps: Add RamEnd to linker command filesSebastian Huber2020-02-041-0/+1
| | | | Update #3838.
* Regenerate headers.amSebastian Huber2019-11-291-0/+1
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* bsp/riscv: Fix format and warningsSebastian Huber2019-11-142-45/+27
| | | | Update #3785.
* bsp/riscv: Fix use of uninitialized integerSebastian Huber2019-11-141-6/+1
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* bsp/riscv: riscv_get_core_frequency()Sebastian Huber2019-11-142-43/+23
| | | | | | | Always provide this function. Return 0 by default. Fix formatting. Simplify function. Update #3785.
* bsps/riscv: UART - Read reg-shift from DTB to properly set/get registersHesham Almatary2019-10-301-2/+13
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* riscv: Add new BSP cfg variants to be built with llvm/clangHesham Almatary2019-10-278-0/+112
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* riscv: Add new offending input sections to the linker scriptHesham Almatary2019-10-271-0/+5
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