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2023-05-20Update company nameSebastian Huber1-1/+1
The embedded brains GmbH & Co. KG is the legal successor of embedded brains GmbH.
2023-03-17bsps/riscv: Make SMP start more robustSebastian Huber1-2/+14
In SMP configurations, check that we run on a configured processor. If not, then there is not much that can be done since we do not have a stack available for this processor. Just loop forever in this case. Do this in assemlby to ensure that no stack memory is used.
2022-11-04bsps/riscv: Use start data for objectSebastian Huber1-0/+6
Maybe this helps to ensure that the object is properly aligned. Update #4658.
2022-10-28bsps/riscv: Workaround for sporadic linker issuesSebastian Huber1-0/+1
Disable the linker relaxation in start.S to work around an issue described here: https://mail.gnu.org/archive/html/bug-binutils/2021-03/msg00164.html The real issue is probably in the linker command file or the linker itself. Update #4658.
2022-09-20bsps/riscv: Add Microchip PolarFire SoC BSP variantPadmarao Begari1-0/+2
The Microchip PolarFire SoC support is implemented as a riscv BSP variant to boot with any individual hart(cpu core) or SMP based on the boot HARTID configurable and support components are 4 CPU Cores (U54), Interrupt controller (PLIC), Timer (CLINT), UART.
2022-02-25riscv: Use zicsr architecture extensionSebastian Huber1-0/+1
This is required for ISA 2.0 support, see chapter "Zicsr", Control and Status Register (CSR) Instructions, Version 2.0 in RISC-V Instruction Set Manual, Volume I: RISC-V User-Level ISA
2020-09-15bsps/riscv: Use far jump to boot_card()Sebastian Huber1-1/+1
Use a far jump to avoid errors like this: relocation truncated to fit: R_RISCV_JAL against symbol `boot_card'
2019-01-22riscv: add griscv bspJiri Gaisler1-0/+0
Update #3678.
2019-01-08bsp/riscv: Clear boot command lineSebastian Huber1-0/+1
2018-11-08score: Rename interrupt stack symbolsSebastian Huber1-3/+3
Rename * _Configuration_Interrupt_stack_area_begin in _ISR_Stack_area_begin, * _Configuration_Interrupt_stack_area_end in _ISR_Stack_area_end, and * _Configuration_Interrupt_stack_size in _ISR_Stack_size. Move definitions to <rtems/score/isr.h>. The new names are considerable shorter and in the right namespace. Update #3459.
2018-08-01bsp/riscv: Initialize FPU depending on ISASebastian Huber1-1/+4
Initialize fcsr to zero for a defined rounding mode. Update #3433.
2018-07-25bsp/riscv: Add basic SMP startupSebastian Huber1-18/+57
Update #3433.
2018-07-25riscv: Rework exception handlingSebastian Huber1-34/+3
Remove _CPU_ISR_install_raw_handler() and _CPU_ISR_install_vector() functions. Applications can install an exception handler via the fatal error handler to handle synchronous exceptions. Handle interrupt exceptions via _RISCV_Interrupt_dispatch() which must be provided by the BSP. Update #3433.
2018-07-06riscv: Add LADDR assembler defineSebastian Huber1-8/+8
An address must be loaded to a register according to the code model. Add LADDR define for use in assembler code. Update #3433.
2018-06-28riscv: Add _CPU_Get_current_per_CPU_control()Sebastian Huber1-1/+5
Update #3433.
2018-06-28bsp/riscv: Fix vector table for lp64Sebastian Huber1-16/+22
Update #3433.
2018-06-28bsp/riscv: Add SMP startup synchronizationSebastian Huber1-2/+20
Update #3433.
2018-06-28bsp/riscv: Add device tree supportSebastian Huber1-6/+12
Update #3433.
2018-06-28riscv: Add dummy SMP supportSebastian Huber1-0/+10
Update #3433.
2018-06-27bsp/riscv: Load global pointerSebastian Huber1-0/+6
Update #3433.
2018-06-27bsp/riscv: Use memset() to clear .bssSebastian Huber1-10/+5
Update #3433.
2018-06-27riscv: Format assembler filesSebastian Huber1-33/+36
Use tabs to match the GCC generated assembler output. Update #3433.
2018-06-27bsp/riscv: Do not clear integer registers at startSebastian Huber1-31/+0
There is no need to do this. Update #3433.
2018-06-27bsp/riscv_generic: Rename to "riscv"Sebastian Huber1-0/+0
Update #3433.
2018-06-27bsp/riscv_generic: New linker command fileSebastian Huber1-3/+1
This linker command file is based on the "riscv64-rtems5-ld --verbose" output. Update #3433.
2018-06-27Rework initialization and interrupt stack supportSebastian Huber1-1/+1
Statically initialize the interrupt stack area (_Configuration_Interrupt_stack_area_begin, _Configuration_Interrupt_stack_area_end, and _Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the interrupt stack area in a special section ".rtemsstack.interrupt". Let BSPs define the optimal placement of this section in their linker command files (e.g. in a fast on-chip memory). This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the low level initialization code has all information available via global symbols. This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define superfluous, since the interrupt stacks are allocated by confdefs.h for all architectures. There is no need for BSP-specific linker command file magic (except the section placement), see previous ARM linker command file as a bad example. Remove _CPU_Install_interrupt_stack(). Initialize the hardware interrupt stack in _CPU_Initialize() if necessary (e.g. m68k_install_interrupt_stack()). The optional _CPU_Interrupt_stack_setup() is still useful to customize the registration of the interrupt stack area in the per-CPU information. The initialization stack can reuse the interrupt stack, since * interrupts are disabled during the sequential system initialization, and * the boot_card() function does not return. This stack resuse saves memory. Changes per architecture: arm: * Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases. * Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp. bfin: * Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value. lm32, m32c, mips, nios2, riscv, sh, v850: * Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack. m68k: * Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack. powerpc: * Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack. * Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA). sparc: * Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM. Update #3459.
2018-04-20bsps: Move start files to bspsSebastian Huber1-0/+0
This patch is a part of the BSP source reorganization. Update #3285.
2017-11-01bsp: Make riscv_generic work for both riscv32 and riscv64 - v2Hesham Almatary1-6/+4
Update #3109
2017-10-28bsp: Add new riscv_generic bsp v3Hesham Almatary1-0/+122
* Only runs/tested on simulator/spike. * Ticker, hello, capture work proprely * Tested via RTEMS Tester, Passed: 525/565 (92%) Update #3109
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