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2022-02-25bsps/riscv: Add missing includeSebastian Huber1-0/+1
2021-11-29bsp_specs: Delete last remnants of these.Joel Sherrill1-0/+0
2021-09-21build: Remove old build systemSebastian Huber2-62/+0
2021-07-28score: Canonicalize _CPU_Fatal_halt()Sebastian Huber1-1/+2
2021-07-27bsps/irq: bsp_interrupt_facility_initialize()Sebastian Huber1-3/+1
2021-07-26bsps/irq: bsp_interrupt_set_affinity()Sebastian Huber2-4/+6
2021-07-26bsps/irq: bsp_interrupt_get_affinity()Sebastian Huber2-2/+4
2021-07-26bsps/irq: bsp_interrupt_vector_disable()Sebastian Huber1-1/+3
2021-07-26bsps/irq: bsp_interrupt_vector_enable()Sebastian Huber1-1/+3
2021-07-26bsps/irq: Add rtems_interrupt_is_pending()Sebastian Huber1-0/+11
2021-07-26bsps/irq: Add rtems_interrupt_get_attributes()Sebastian Huber1-0/+8
2021-07-26bsps/irq: Add rtems_interrupt_raise()Sebastian Huber1-0/+23
2021-07-26bsps/irq: Add rtems_interrupt_vector_is_enabled()Sebastian Huber1-0/+11
2021-06-24bsps/irq: Remove BSP_INTERRUPT_VECTOR_MAXSebastian Huber1-1/+0
2021-06-24bsps/irq: Add BSP_INTERRUPT_VECTOR_COUNTSebastian Huber1-0/+1
2021-06-24bsps/irq: Remove BSP_INTERRUPT_VECTOR_MINSebastian Huber1-2/+0
2021-03-23bsps/riscv: Add per cpu clock interruptJan Sommer1-10/+49
2021-02-09bsp/riscv: Re-license to BSD-2-ClauseSebastian Huber1-10/+37
2021-01-28bsps: Replace bsp_specs with an empty fileSebastian Huber1-9/+0
2020-09-23bsps/riscv: Add bsp_fdt_map_intr()Sebastian Huber1-0/+6
2020-09-17riscv: Make sifive_test finisher 4 bytesHesham Almatary1-1/+1
2020-09-06htif_console_handler is defined in htif.cHesham Almatary1-1/+1
2020-02-04Use RTEMS_SYSINIT_ORDER_LAST_BUT_5Sebastian Huber1-1/+1
2019-11-29Regenerate headers.amSebastian Huber1-0/+1
2019-11-14bsp/riscv: Fix format and warningsSebastian Huber2-45/+27
2019-11-14bsp/riscv: Fix use of uninitialized integerSebastian Huber1-6/+1
2019-11-14bsp/riscv: riscv_get_core_frequency()Sebastian Huber2-43/+23
2019-10-30bsps/riscv: UART - Read reg-shift from DTB to properly set/get registersHesham Almatary1-2/+13
2019-10-27riscv: Add new BSP cfg variants to be built with llvm/clangHesham Almatary8-0/+112
2019-10-23riscv: add freedom E310 Arty A7 bspPragnesh Patel7-5/+312
2019-04-11score: Rename _SMP_Get_processor_count()Sebastian Huber1-9/+9
2019-03-08bsps: Adjust bsp.h Doxygen groupsSebastian Huber1-0/+20
2019-01-22riscv: add griscv bspJiri Gaisler3-532/+5
2019-01-08bsp/riscv: Clear boot command lineSebastian Huber1-0/+1
2018-11-08score: Rename interrupt stack symbolsSebastian Huber1-3/+3
2018-09-17riscv: Allow platforms with no PLIC to proceedHesham Almatary1-0/+5
2018-08-02bsp/riscv: Add missing BSP variantSebastian Huber1-0/+9
2018-08-02bsp/riscv: Fix build with RTEMS_SMP undefinedSebastian Huber3-12/+10
2018-08-02bsp/riscv: Fix a synchronization issue for PLICSebastian Huber1-0/+8
2018-08-01bsp/riscv: Remove unused variableSebastian Huber1-4/+0
2018-08-01bsp/riscv: Add NS16750 support to console driverSebastian Huber1-36/+74
2018-08-01bsp/riscv: Initialize FPU depending on ISASebastian Huber1-1/+4
2018-08-01bsp/riscv: Fix clock driverSebastian Huber1-17/+49
2018-07-27bsp/riscv: Fix inter-processor interruptsSebastian Huber1-1/+7
2018-07-27riscv: Rework CPU counter supportSebastian Huber1-4/+18
2018-07-25bsp/riscv: Use interrupt driven NS16550 driverSebastian Huber1-1/+9
2018-07-25bsp/riscv: Add PLIC supportSebastian Huber4-2/+258
2018-07-25bsp/riscv: Add simple SMP support to clock driverSebastian Huber1-0/+2
2018-07-25bsp/riscv: Use CPU counter btimerSebastian Huber1-68/+0
2018-07-25bsp/riscv: Add basic SMP startupSebastian Huber6-26/+295
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