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* bsp/tms570: Rename tms570_initialize_and_clear()Sebastian Huber2024-01-153-3/+3
| | | | | | | Rename tms570_initialize_and_clear() in tms570_pom_initialize_and_clear(). Update #4982.
* bsp/tms570: Add bsp_restart()Sebastian Huber2024-01-152-0/+44
| | | | Update #4982.
* bsp/tms570: Use new pin defineSebastian Huber2024-01-151-1/+1
| | | | Update #4982.
* bsp/tms570: Relicense to BSD-2-ClauseSebastian Huber2024-01-1572-183/+1232
| | | | | | | | | Change license to BSD-2-Clause according to file history and contributor agreements. Add Doxygen file comments. Update #3053. Update #3707. Update #4982.
* bsp/tms570: Remove empty <bsp/tms570-vim.h>Sebastian Huber2024-01-152-49/+1
| | | | Update #4982.
* bsp/tms570: Remove empty <bsp/tms570-sci.h>Sebastian Huber2024-01-154-48/+1
| | | | Update #4982.
* bsp/tms570: Remove empty <bsp/tms570-rti.h>Sebastian Huber2024-01-153-48/+2
| | | | Update #4982.
* bsps/arm: Use shared empty bsp_start_hook_0()Sebastian Huber2024-01-157-29/+42
| | | | Update #4982.
* libio: Clean up usage of rtems_termios_device_modeKinsey Moore2024-01-101-2/+2
| | | | | | | | | | | | This cleans up outputUsesInterrupts usage with rtems_termios_device_mode enum values. The outputUsesInterrupts member was typed as an int, named as if it were a boolean value, and used as if it were a rtems_termios_device_mode enum. In this patch, values assigned to outputUsesInterrupts have been converted to the corresponding rtems_termios_device_mode enum value, conversions from deviceOutputUsesInterrupts have been made explicit, and uses of rtems_termios_device_mode enum values with deviceOutputUsesInterrupts have been converted to booleans.
* bsps/arm/stm32f4: Enable USART RX interruptsJacob Killelea2023-12-141-7/+63
| | | | | | | | | | | | | | | Hi all, this is my first email patch submission and my first contribution to RTEMS, so please give any feedback you have! This patch enables interrupt driven data reception on USART ports on STM32F4 series chips. This feature is gated behind the config flag BSP_CONSOLE_USE_INTERRUPTS. If this flag is not set to True, the older polling implementation will be used. I tested this feature on STM32F401CE (blackpill) and STM32 Nucleo F411RE boards, with both capable of keeping up with a 115200 baud continous data stream. With the older polling implementation, both would drop bytes at 9600 baud. In addition, I updated the implementation of usart_set_attributes to support changing the baud rate of the USART port based on the input speed.
* bsp/tms570: Do not use POM for internal flashSebastian Huber2023-12-061-3/+2
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* bsp/tms570: Improve POM handlingSebastian Huber2023-12-065-2/+14
| | | | | | Place the vector table in the start section so that the overlay can be avoided if we execute from internal flash. The problem is that when the POM is enabled, the ECC cannot be enabled for the internal flash.
* bsp/tms570: Adjust BSP_OSCILATOR_CLOCKSebastian Huber2023-12-061-0/+5
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* bsp/tms570: Fix debug console baud settingSebastian Huber2023-12-061-1/+1
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* bsp/tms570: Use internal RAM for fast dataSebastian Huber2023-12-061-1/+1
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* bsp/tms570: Add TMS570LC4357 supportSebastian Huber2023-12-063-0/+32
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* bsp/tms570: Use 0x for hex constantsSebastian Huber2023-12-061-8/+8
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* bsp/tms570: Replace TMS570_MMR_SELECT_GMII_SELSebastian Huber2023-12-062-1/+9
| | | | | Replace TMS570_MMR_SELECT_GMII_SEL with TMS570_MMR_SELECT_MII_MODE and TMS570_MMR_SELECT_RMII_MODE.
* bsp/tms570: Add pin configuration variantsSebastian Huber2023-12-062-46/+133
| | | | | | | Rearrange pin function bit fields to allow the clearing of all function bits through TMS570_PIN_AND_FNC(). Move implementation details to source file.
* bsps/arm: BSP_START_VECTOR_ADDRESS_TABLE_ALIGNMENTSebastian Huber2023-12-061-0/+4
| | | | | Add the BSP option BSP_START_VECTOR_ADDRESS_TABLE_ALIGNMENT to optionally define an alignment of the vector address table begin.
* ZYNQ7000: Add support PYNQ, PicoZed, MicroZed, ZYBO and ZYBO Z7Bernd Moessner2023-11-2810-0/+40
| | | | | | | | | | | | | This patch adds basic support for the following boards: xilinx_zynq_pynq - PYNQ Z1 / Z2 xilinx_zynq_microzed - MicroZed 7010 / 7020 xilinx_zynq_picozed - PicoZed 7010 / 7015 / 7020 / 7030 xilinx_zynq_zybo - ZYBO xilinx_zynq_zybo_z7 - ZYBO Z7-10 / Z7-20 N.b. Arty Z7-20 is basically a PYNQ Z1 - different board color and updated Eth PHY.
* bsps/imxrt1166: Disable video_muxChristian Mauderer2023-11-282-4/+7
| | | | | | The pinctrl-0 of the video_mux might overwrite pin settings done by other peripherals. Disabling it by default prevents unexpected pin settings.
* bsp/imxrt1166: Support GPIO CS pins in LPSPIChristian Mauderer2023-11-281-19/+225
| | | | | | | | | | | | | | With this, it is possible to use GPIOs as CS pins in the LPSPI. To avoid additional complexity, the GPIOs will have the same limitations as the native (hardware) CS pins. The GPIO CS feature adds a number of extra code when starting SPI transfers on this controller. Therefore it is possible to disable the additional code by just setting the IMXRT_LPSPI_MAX_CS option to 0. In that case only native CS pins are supported. At the moment, this feature is only enabled on i.MXRT1166 by default because it is not tested on i.MXRT1050. But it should work there too.
* bsps/imx*: imx_gpio from pointer to fdt propertyChristian Mauderer2023-11-282-12/+69
| | | | | | Device trees allow mixing different kinds of GPIOs in one property. For that it is usefull to only provide a pointer to an arbitrary location in the property and initialize a GPIO from that.
* bsps/arm: Add BSP for ZynqMP RPUPhilip Kirkpatrick2023-11-208-0/+644
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* bsps/arm/imxrt: Optimize nocache memory settingsChristian Mauderer2023-08-211-2/+2
| | | | | | The nocache-memory was set as device memory. It's not necessary to be that strict. Set it to normal non-cacheable non-shareable memory instead.
* bsps/arm/imxrt1166: Enable USBChristian Mauderer2023-08-213-46/+85
| | | | Enable the USB modules in the FDT.
* bsps/imxrt: Fix enabling USBPHY in fsl_clockChristian Mauderer2023-08-211-0/+8
| | | | | The mcux-sdk tries to enable the USBPHY. But it uses the wrong register for that. This patch fixes the bug.
* arm: Fix cache support for ARM926EJ-SSebastian Huber2023-08-101-0/+26
| | | | | | | The ARM926EJ-S is an ARMv5T architecture processor and lacks some features of ARMv6 processors such as the ARM1176JZF-S. Close #4940.
* bsp/lpc32xx: Fix lpc32xx_magic_zero_sizeSebastian Huber2023-08-091-1/+1
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* bsp/lpc32xx: Increase SDRAM size to 64MiBSebastian Huber2023-08-092-2/+2
| | | | Increase stage 2 bootloader size to 16MiB.
* bsp/lpc32xx: Remove hard to maintain commentsSebastian Huber2023-08-094-81/+0
| | | | | These comments duplicate the memory and region definitions of the linker command file.
* bsp/lpc32xx: Restore lpc32xx_set_translation_table_entries()Sebastian Huber2023-08-092-5/+83
| | | | | | This implementation disables the MMU during the modification of the translation table. This behaviour is required by boot loaders for these boards.
* bsp/lpc32xx: Fix warningSebastian Huber2023-08-091-1/+1
| | | | The type is a pointer.
* Revert "bsps/arm/beagle/dcan: Added DCAN support"Karel Gardas2023-08-017-11552/+0
| | | | This reverts commit 26d50bdfb601b9ef71ec2b30d2d9467c2437f443.
* bsps/stm32h7: add modification notice required by Apache License 2.0Karel Gardas2023-07-311-0/+3
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* bsps/stm32h7: fix compilation issue after HAL updateKarel Gardas2023-07-311-0/+3
| | | | | | | | | | | | Based on: commit 99494370d6124ef5d773119fa59f5bac4bbf395f Author: Sebastian Huber <sebastian.huber@embedded-brains.de> Date: Wed Mar 4 12:34:34 2020 +0100 bsp/stm32h7: New BSP Update #3910.
* bsp/stm32h7: Add and use BSP Doxygen groupKarel Gardas2023-07-31232-0/+3729
| | | | | | | | | | | | Inspired by: commit fe58f6ce4bf1ff5e92d64b9fee0cb46b6ac06e64 Author: Sebastian Huber <sebastian.huber@embedded-brains.de> Date: Thu Nov 26 08:13:52 2020 +0100 bsp/stm32h7: Add and use BSP Doxygen group Update #3910.
* bsps/stm32h7: workaround compilation issue with libbsdKarel Gardas2023-07-311-0/+7
| | | | | | | | Part of the new HAL requires float_t type definition. For that it includes math.h header file which unfortunately brings a lot of math functions in. One of them, 'log' conflicts with FreeBSD log function defined in systm.h Provided hack is really just a crude work around this issue. Never thought that Motorola 68881 would help me even in 21st century.
* bsps/stm32h7: disable ETH_UpdateDescriptor as unused functionKarel Gardas2023-07-311-0/+2
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* bsps/stm32h7: recreate stm32h7xx_hal_conf.hKarel Gardas2023-07-311-138/+157
| | | | | | | | | | Re-apply based on: commit 6bb6b69bb6360cff11057ebef2a8b91cc3a91b3d Author: Sebastian Huber <sebastian.huber@embedded-brains.de> Date: Tue Apr 6 09:43:23 2021 +0200 arm/stm32h7: Add STM32H7_HSE_FREQUENCY
* bsps/stm32h7: Add init for sdmmc pinsKarel Gardas2023-07-311-0/+2
| | | | | | | | | | | | Re-apply based on: commit 8fd29cfbc5c911c46f065e36389c3d246aa97854 Author: Christian Mauderer <christian.mauderer@embedded-brains.de> Date: Tue Mar 2 16:14:41 2021 +0100 stm32h7: Add init for sdmmc pins Update #4372
* bsp/stm32h7: Enable LL driversKarel Gardas2023-07-3150-91/+91
| | | | | | | | | | | | Re-apply based on: commit abb78587b6d1be08697810cdae31cd2dbe35ee4a Author: Sebastian Huber <sebastian.huber@embedded-brains.de> Date: Wed Apr 1 11:11:59 2020 +0200 bsp/stm32h7: Enable LL drivers Update #3910.
* bsp/stm32h7: Disable unused functionsKarel Gardas2023-07-315-0/+28
| | | | | | | | | | | | Re-apply based on: commit e4ba06f8b49da4334543f713ba437263c794d7ee Author: Sebastian Huber <sebastian.huber@embedded-brains.de> Date: Thu Apr 2 08:28:56 2020 +0200 bsp/stm32h7: Disable unused functions Update #3910.
* bsps/stm32h7: update STM32 H7 HALKarel Gardas2023-07-31285-31270/+264949
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates STM32 H7 HAL source files. The files are taken from two STM projects from their github.com repositories: (i) https://github.com/STMicroelectronics/stm32h7xx_hal_driver.git The project files are still available under BSD-3 license and the version/commit used is: d5fc8d05fc16fa2a2a2f948cf6c6ab39e78358e1 which represents post Release v1.11.1 development tree. (ii) https://github.com/STMicroelectronics/cmsis_device_h7.git The project files were re-licensed from previous BSD-3 to Apache 2.0 license. Fortunately the project does not contain NOTICE file so no need to do anything special when used in RTEMS. The project version/commit imported is: 6d5ef249bec5177e0e2a0880ed62df2132874d99 which is code-wise Release v1.10.3 exactly.
* bsps/arm: fix nested extern decl. warnings brought by CMSIS files updateKarel Gardas2023-07-281-0/+11
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* bsps/stm32h7: Make UART7 pins configurableKinsey Moore2023-07-241-2/+2
| | | | | This change allows for the pins assigned to UART7 to be reconfigured via config.ini.
* bsps/imxrt: Add imxrt1166_cm7_saltshaker BSPChristian Mauderer2023-07-2414-3/+6858
| | | | | The BSP is for a custom i.MXRT1166 based board. At the moment, only the cortex M7 is supported.
* bsps/imsrt: Make flash config more flexibleChristian Mauderer2023-07-244-3/+7
| | | | | | | | The flash configuration is something very board specific. So move the file to a board specific location. Beneath that, not all controllers and configurations need the flash config right at the address 0 of the flash. For example on the i.MXRT11xx, the config has an offset for some flash types.
* bsps/imx*: Support more GPIO controllersChristian Mauderer2023-07-241-4/+14
| | | | | | | | The imx-gpio driver used in i.MX and i.MXRT BSPs generates a name based on a fixed string. The original code only used one digit for the controller. With the 13 GPIO controllers of the i.MXRT1166, that isn't enough any more. This patch extends the name to two digits which should be enough for the next controller generations.
generated by cgit v1.2.3 (git 2.25.1) at 2024-04-26 12:40:36 +0000