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authorSebastian Huber <sebastian.huber@embedded-brains.de>2022-06-30 15:17:01 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2023-08-09 07:22:10 +0200
commit573a7202e614b4f4b94d581f3b5a0bc758b4ca7f (patch)
tree939f3a24c9dc71bea830ac1f02b8bec00eaf3d2b /bsps/arm
parentbsp/lpc32xx: Fix warning (diff)
downloadrtems-573a7202e614b4f4b94d581f3b5a0bc758b4ca7f.tar.bz2
bsp/lpc32xx: Restore lpc32xx_set_translation_table_entries()
This implementation disables the MMU during the modification of the translation table. This behaviour is required by boot loaders for these boards.
Diffstat (limited to 'bsps/arm')
-rw-r--r--bsps/arm/lpc32xx/include/bsp/mmu.h7
-rw-r--r--bsps/arm/lpc32xx/start/mmu.c81
2 files changed, 83 insertions, 5 deletions
diff --git a/bsps/arm/lpc32xx/include/bsp/mmu.h b/bsps/arm/lpc32xx/include/bsp/mmu.h
index 58109ac8f6..ba628a19f0 100644
--- a/bsps/arm/lpc32xx/include/bsp/mmu.h
+++ b/bsps/arm/lpc32xx/include/bsp/mmu.h
@@ -74,14 +74,11 @@ extern "C" {
*
* @return Previous section flags of the first modified entry.
*/
-static inline uint32_t lpc32xx_set_translation_table_entries(
+uint32_t lpc32xx_set_translation_table_entries(
const void *begin,
const void *end,
uint32_t section_flags
-)
-{
- return arm_cp15_set_translation_table_entries(begin, end, section_flags);
-}
+);
/** @} */
diff --git a/bsps/arm/lpc32xx/start/mmu.c b/bsps/arm/lpc32xx/start/mmu.c
new file mode 100644
index 0000000000..0c2f355a45
--- /dev/null
+++ b/bsps/arm/lpc32xx/start/mmu.c
@@ -0,0 +1,81 @@
+/**
+ * @file
+ *
+ * @ingroup lpc32xx_mmu
+ *
+ * @brief MMU support implementation.
+ */
+
+/*
+ * Copyright (c) 2010-2011 embedded brains GmbH. All rights reserved.
+ *
+ * embedded brains GmbH
+ * Obere Lagerstr. 30
+ * 82178 Puchheim
+ * Germany
+ * <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.com/license/LICENSE.
+ */
+
+#include <bsp/mmu.h>
+
+static uint32_t disable_mmu(void)
+{
+ uint32_t ctrl = 0;
+
+ arm_cp15_data_cache_test_and_clean_and_invalidate();
+
+ ctrl = arm_cp15_get_control();
+ arm_cp15_set_control(ctrl & ~ARM_CP15_CTRL_M);
+
+ arm_cp15_tlb_invalidate();
+
+ return ctrl;
+}
+
+static void restore_mmu_control(uint32_t ctrl)
+{
+ arm_cp15_set_control(ctrl);
+}
+
+static uint32_t set_translation_table_entries(
+ const void *begin,
+ const void *end,
+ uint32_t section_flags
+)
+{
+ uint32_t *ttb = arm_cp15_get_translation_table_base();
+ uint32_t i = ARM_MMU_SECT_GET_INDEX(begin);
+ uint32_t iend = ARM_MMU_SECT_GET_INDEX(ARM_MMU_SECT_MVA_ALIGN_UP(end));
+ uint32_t ctrl = disable_mmu();
+ uint32_t section_flags_of_first_entry = ttb [i];
+
+ while (i < iend) {
+ ttb [i] = (i << ARM_MMU_SECT_BASE_SHIFT) | section_flags;
+ ++i;
+ }
+
+ restore_mmu_control(ctrl);
+
+ return section_flags_of_first_entry;
+}
+
+uint32_t lpc32xx_set_translation_table_entries(
+ const void *begin,
+ const void *end,
+ uint32_t section_flags
+)
+{
+ rtems_interrupt_level level;
+ uint32_t section_flags_of_first_entry = 0;
+
+ rtems_interrupt_disable(level);
+ section_flags_of_first_entry =
+ set_translation_table_entries(begin, end, section_flags);
+ rtems_interrupt_enable(level);
+
+ return section_flags_of_first_entry;
+}