| Commit message (Collapse) | Author | Age | Files | Lines |
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Update #3866.
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Change the ARMV7_CP15_START_WORKSPACE_ENTRY_INDEX value to be in line
with the workspace entry in ARMV7_CP15_START_DEFAULT_SECTIONS.
Close #4395.
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Uses configured millisecond per ticks
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Refactored the i2c driver to parse register values from the device
tree rather than hardcoding them. But still the clocks have to
initialized manually.
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Set the Main Stack Pointer (MSP) to the ISR stack area end just in case
we run using the Process Stack Pointer (PSP). This helps if
applications are started by a boot loader.
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This now uses rtems_clock_get_uptime_nanoseconds
to calculate the uptime ticks in milliseconds.
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Update #3850
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Update #4372
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Update #4372
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The following files have been ported
1) ti_pinmux.c
2) ti_pinmux.h
3) am335x_scm_padconf.c
4) am335x_scm_padconf.h
Update #3784
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Detects the SOC type using FDT and also replaces the ti_cpuid.h
header in FreeBSD with custom one.
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Makes it simpler to access the QTMR in an application via a FDT name or
link in an application specific FDT entry.
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Change license to BSD-2-Clause according to file histories and
re-licensing agreement.
Update #3899.
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This fixes an issue with the latest tool chain which adds the default
linker script in the endfile specification.
Update #3250.
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Sort alphabetically.
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GCC 11 uses DWARF 5 by default.
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For i.MX7 U-Boot initializes the system counter. On i.MX6 Barebox is
often used which doesn't initialize the counter. With this patch, we try
to auto-detect whether the counter is initialized or not and do the
initialization ourself if necessary.
Closes #3869
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This allows an application to get the registers of the LPSPI. That is
usefull for applications that want to use DMA for a very specialized and
highly optimized communication.
Update #4180
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Also currently no driver uses these numbers, it is usefull for
applications that want to use the DMA.
Update #4180
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Note: The changes have been done with portability in mind. The driver
should (in theory) be able to replace the original one in the MPC BSPs
too. For full compatibility an adaption layer and especially a test
would be necessary. Because both are missing, don't integrate it into
the MPC BSP now.
Update #4180
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If spi or i2c slaves are "connected" to the spi or i2c bus, the device
tree compiler complains if the busses are not named spi or i2c.
Update #4180
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This allows applications to individually provide configuration
structures.
Update #4209.
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This allows applications to individually provide configuration
structures.
Update #4209.
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This BSP supports the Arm Fixed Virtual Platform. Only the Cortex-R52
processor configuration is supported by the BSP. It should be easy to
add support for other variants if needed.
Update #4202.
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The arm_cp15_set_exception_handler() is a complicated function which
should be avoided if possible.
Update #4202.
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This avoids a function call overhead in the interrupt dispatching.
Update #4202.
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Update #4202.
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Initialize the data and unified cache levels. Invalidate the
instruction cache levels.
Update #4202.
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This makes it possible to reuse this loop.
Update #4202.
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The start hook arguments are not used by a BSP. Removing them avoids
the need for a stack during the very early system initialization.
Update #4202.
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Make sure the branch predictors are invalidated before the first branch
is executed.
Update #4202.
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Set the VBAR to the vector table in the start section before
bsp_start_hook_0() is called to earlier handle exceptions in RTEMS.
Set the VBAR to the normal vector table in start.S for the main
processor. Secondary processors set it in bsp_start_hook_0().
Update #4202.
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Avoid one level of indirection.
Update #4202.
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Update #4184.
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When moving the headers from the imx BSP to the shared area, the wrong
directory has been selected. This patch fixes that problem.
Update #4180
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This allows simpler creation of own dts files for custom boards.
Update #4180
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- For small tables only round to the next 4kiB instead of 1MiB
Close #4184.
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Remove the target filter for software-generated interrupts since this
feature is not supported by the affinity routing in GICv3.
Update #4202.
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Use the targets parameter to determine the targets of the SGI. Change
targets parameter type to 32-bit to ease the parameter passing. GICv3
supports up to 16 targets.
Update #4202.
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Update #4202.
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