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Pass the parameter of the clock interrupt handler to
Clock_driver_support_at_tick() and Clock_driver_timecounter_tick(). This makes
it possible to use the interrupt handler argument in clock drivers.
Use the interrupt handler provided by Clock_driver_support_install_isr() to
avoid local delarations of Clock_isr().
Update #4862.
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Update #4982.
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Add the BSP option BSP_START_VECTOR_ADDRESS_TABLE_ALIGNMENT to
optionally define an alignment of the vector address table begin.
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Device trees allow mixing different kinds of GPIOs in one property. For
that it is usefull to only provide a pointer to an arbitrary location in
the property and initialize a GPIO from that.
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The ARM926EJ-S is an ARMv5T architecture processor and lacks some
features of ARMv6 processors such as the ARM1176JZF-S.
Close #4940.
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The imx-gpio driver used in i.MX and i.MXRT BSPs generates a name based
on a fixed string. The original code only used one digit for the
controller. With the 13 GPIO controllers of the i.MXRT1166, that isn't
enough any more. This patch extends the name to two digits which should
be enough for the next controller generations.
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The header file <rtems/irq.h> provides a legacy API. Do not provide it
by default through <bsp/irq.h>.
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Avoid a dynamic memory allocation for the inter-processor interrupt.
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Avoid a dynamic memory allocation for the clock driver interrupt.
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On most i.MX* the upper bits in SW_PAD_CTL are reserved. On some chips,
like the i.MXRT1166, they are a domain write protection. Setting them to
1 can have unexpected side effects.
The device tree uses these bits for some flags. Make sure that they are
not accidentally written to some value.
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The embedded brains GmbH & Co. KG is the legal successor of embedded
brains GmbH.
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Update #3707.
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- see ARM DUI 0646C Arm Cortex-M7 Devices Generic User Guide
"The RELOAD value is calculated according to its use.
For example, to generate a multi-shot timer with a period
of N processor clock cycles, use a RELOAD value of N-1.
If the SysTick interrupt is required every 100 clock pulses,
set RELOAD to 99."
- see routines used in CMSIS project for reference
Close #4746.
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Add the function type to _start() and bsp_start_hook_0_done() so that
the linker can generate ARM/Thumb interworking code.
Update #4202.
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The .data.rel.ro* linker input section pattern accidentally matches with
writeable data those symbol name starts with "ro".
Close #4701.
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Sort the .noinit* input sections by name first, then by alignment if two
sections have the same name. This allows the placement of begin/end symbols to
initialize some areas with a special value.
Update #4678.
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Updates #3053.
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REGION_WORK may be backed by external RAM which may not be initialized
in a time we need stack to work well. E.g. code loaded in flash,
stack allocated on in-cpu SRAM and data (REGION_WORK) on external SDRAM.
Sponsored-By: Precidata
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Synchronize data and instruction streams.
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Updates #4625.
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Close #3250.
Close #4081.
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Do not continue execution on processors which are not configured to prevent the
use of arbitrary memory for the initialization stack.
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Do not return a status code in bsp_interrupt_facility_initialize() since this
leads to unreachable code in bsp_interrupt_initialize(). Use RTEMS_DEBUG
assertions in bsp_interrupt_facility_initialize() if necessary.
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Return a status code for bsp_interrupt_vector_disable().
Update #3269.
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Return a status code for bsp_interrupt_vector_enable().
Update #3269.
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Add a default implementation which just returns RTEMS_UNSATISFIED.
Update #3269.
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Add a default implementation which clears the attributes to zero and
just returns RTEMS_SUCCESSFUL for valid parameters.
Update #3269.
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Add rtems_interrupt_raise_on() and rtems_interrupt_clear().
Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.
Update #3269.
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Add a default implementation which just returns RTEMS_UNSATISFIED for
valid parameters.
Update #3269.
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Skip the data cache initialization if we are a secondary processor.
The bug was introduced by e164df5e33608576443b4cd5923a9046358ee773 and
did not show up in tests using Qemu since the data cache behaviour is
not emulated.
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Use BSP_INTERRUPT_VECTOR_COUNT instead of BSP_INTERRUPT_VECTOR_MAX.
Update #3269.
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Remove BSP_INTERRUPT_VECTOR_MIN and unconditionally let interrupt vector
numbers start with zero.
The BSP_INTERRUPT_VECTOR_MIN == 0 invariant was tested by the previous commit
and building all BSPs.
Update #3269.
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Update #3866.
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Set the Main Stack Pointer (MSP) to the ISR stack area end just in case
we run using the Process Stack Pointer (PSP). This helps if
applications are started by a boot loader.
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Update #3850
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Sort alphabetically.
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GCC 11 uses DWARF 5 by default.
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This avoids a function call overhead in the interrupt dispatching.
Update #4202.
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Update #4202.
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Initialize the data and unified cache levels. Invalidate the
instruction cache levels.
Update #4202.
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This makes it possible to reuse this loop.
Update #4202.
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The start hook arguments are not used by a BSP. Removing them avoids
the need for a stack during the very early system initialization.
Update #4202.
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Make sure the branch predictors are invalidated before the first branch
is executed.
Update #4202.
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Set the VBAR to the vector table in the start section before
bsp_start_hook_0() is called to earlier handle exceptions in RTEMS.
Set the VBAR to the normal vector table in start.S for the main
processor. Secondary processors set it in bsp_start_hook_0().
Update #4202.
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