summaryrefslogtreecommitdiffstats
path: root/bsps/arm/shared/cache/cache-l2c-310.c (unfollow)
Commit message (Expand)AuthorFilesLines
2023-05-26bsps: Improve Doxygen file commentsSebastian Huber1-6/+9
2019-03-08bsps: Adjust shared Doxygen groupsSebastian Huber1-1/+1
2018-12-21ARM_CACHE_L1_CPU_SUPPORT_PROVIDES_RANGE_FUNCTIONSSebastian Huber1-2/+1
2018-01-31bsps: Rework cache manager implementationSebastian Huber1-17/+2
2017-06-14Remove excessive locking from cache operations.Alexei Pososin1-35/+9
2016-07-12Misc: Spell length correctlyJoel Sherrill1-1/+1
2016-07-04bsp/arm: Report correct maximal cache line length for ARM Cortex-A + L2C-310.Pavel Pisa1-0/+4
2014-11-25bsps/arm: L2C 310 avoid infinite loopsSebastian Huber1-0/+8
2014-11-20bsps/arm: L2C 310 drop exclusive cache supportSebastian Huber1-71/+50
2014-11-20bsps/arm: L2C 310 compile-time errata 588369Sebastian Huber1-49/+19
2014-11-20bsps/arm: L2C 310 compile-time errata 753970Sebastian Huber1-71/+43
2014-11-20bsps/arm: L2C 310 exclusive config is fatalSebastian Huber1-7/+16
2014-11-20bsps/arm: L2C 310 use l2c_310_* prefix throughoutSebastian Huber1-99/+99
2014-11-20bsps/arm: L2C 310 use L2C_310_* prefix throughoutSebastian Huber1-232/+232
2014-11-20bsps/arm: L2C 310 add compile time checksSebastian Huber1-81/+68
2014-11-20bsps/arm: L2C 310 delete invalid linkSebastian Huber1-2/+0
2014-11-20bsps/arm: L2C 310 simplify and remove white spaceSebastian Huber1-292/+177
2014-11-20bsps/arm: L2C 310 rename BSP_ARM_L2CC_BASESebastian Huber1-26/+26
2014-09-10bsps/arm: Fix get cache sizeSebastian Huber1-4/+6
2014-09-10bsps/arm: Fix invalidate instruction cacheSebastian Huber1-33/+2
2014-06-06bsps/arm: Change L2 cache initializationSebastian Huber1-3/+1
2014-04-17bsp/arm: Cleanup L2 cache handlingRalf Kirchner1-38/+7
2014-04-17bsp/arm: Correct L2 cache enable methodRalf Kirchner1-53/+48
2014-04-17bsp/arm: Add cache size methodsRalf Kirchner1-0/+82
2014-04-17bsp/arm: Add L2 cache lockingRalf Kirchner1-9/+34
2014-04-17bsp/arm: Remove unused cache store methodsRalf Kirchner1-21/+0
2014-04-17bsp/arm: Correct cache misalignment handlingRalf Kirchner1-26/+54
2014-04-17bsp/arm: Correct L2 cache flushingRalf Kirchner1-17/+31
2014-04-17bsp/arm: Remove arm erratum 764369 from L2 cacheRalf Kirchner1-14/+0
2014-03-13bsp/arm: Add handling for level 2 L2C-310 cache controllerRalf Kirchner1-0/+1515
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-05 04:51:10 +0000