| Commit message (Collapse) | Author | Age | Files | Lines |
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Add support for _SMP_Send_message() to the own processor. This is
required by the smpmulticast01 test program.
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Introduce new library librtemsrecordwrap.a which contains wrappers for
operating system functions which produce entry/exit events.
The wrappers can be selected during link time via the GNU ld --wrap
option.
Update #3665.
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Remove Martin Galvan due to inactivity from the Write After Approval
list.
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Update #3665.
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Update #3794.
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+ Modify POSIX thread create extension to ensure expected
initial signal mask is provided to system threads, initial
tasks and threads, and inheritied by tasks and threads.
+ Adds psxsignal07 to verify functionality when using a POSIX
Initialization thread and POSIX threads.
+ Adds psxsignal08 to verify functionality when using a Classic API
Initialization task and Classic API tasks.
Closes #3794.
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The use case for this function is the libbsd. In FreeBSD, the interrupt
setup and binding to a processor is done in two steps. Message
based interrupts like PCIe MSI and MSI-X interrupts can be implemented
through interrupt server entries. They are setup at the default
interrupt server and may optionally move to an interrupt server bound to
a specific processor.
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Note that this test requires a functional fenv implementation. Some
targets have multilib variants where the fenv implementation is not
100% passing.
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Return the empty string instead of a NULL pointer if no version key is
available.
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Directly use the CPU port API in boot_card() to allow tracing of the
higher level interrupt disable/enable routines, e.g.
_ISR_Local_disable() and _ISR_Local_enable(). Currently, there is no
configuration option to enable this. Below is a patch. It may be used
to investigate some nasty low level bugs in the system.
Update #3665.
diff --git a/cpukit/include/rtems/score/isrlevel.h b/cpukit/include/rtems/score/isrlevel.h
index c42451d010..46d361ddc2 100644
--- a/cpukit/include/rtems/score/isrlevel.h
+++ b/cpukit/include/rtems/score/isrlevel.h
@@ -40,6 +40,10 @@ extern "C" {
*/
typedef uint32_t ISR_Level;
+uint32_t rtems_record_interrupt_disable( void );
+
+void rtems_record_interrupt_enable( uint32_t level );
+
/**
* @brief Disables interrupts on this processor.
*
@@ -56,8 +60,7 @@ typedef uint32_t ISR_Level;
*/
#define _ISR_Local_disable( _level ) \
do { \
- _CPU_ISR_Disable( _level ); \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
+ _level = rtems_record_interrupt_disable(); \
} while (0)
/**
@@ -72,10 +75,7 @@ typedef uint32_t ISR_Level;
* _ISR_Local_disable().
*/
#define _ISR_Local_enable( _level ) \
- do { \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
- _CPU_ISR_Enable( _level ); \
- } while (0)
+ rtems_record_interrupt_enable( _level )
/**
* @brief Temporarily enables interrupts on this processor.
@@ -98,9 +98,8 @@ typedef uint32_t ISR_Level;
*/
#define _ISR_Local_flash( _level ) \
do { \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
- _CPU_ISR_Flash( _level ); \
- RTEMS_COMPILER_MEMORY_BARRIER(); \
+ rtems_record_interrupt_enable( _level ); \
+ _level = rtems_record_interrupt_disable(); \
} while (0)
/
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Keep the stack pointer properly 8-byte aligned.
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Update #3665.
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Add system events for memory allocation/free.
Update #3665.
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Add system events to identify the target system. Add system events to
transfer blocks of memory and register sets.
Update #3665.
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The _Record_Initialize() function depends only initialized read-only
data. Call it as the first initialization step to allow tracing of the
complete system initialization.
Update #3665.
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Update #3665.
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This allows its use in crash dump procedures.
Update #3665.
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Reduce the system dependencies to allow tracing of very low level
functions, for example the interrupt disable/enable.
Introduce general purpose RTEMS_RECORD_CALLER and RTEMS_RECORD_LINE
events.
Update #3665.
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Update #3665.
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This helps to get rid of the <rtems/rtems/tasks.h> dependency in
<rtems/record.h>.
Update #3665.
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The .rtemsrwset section is used for the per-CPU data. This section has
loadable content. Place the ring buffers in the BSS section to avoid
large executable image sizes.
Not using the per-CPU data makes it possible to initialize the record
support earlier.
Update #3665.
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This is necessary to get the thread names properly on 32-bit and 64-bit
targets.
Update #3665.
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Also fixes the thread names on signed char targets.
Update #3665.
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Signal the accumulated item overflow count with the time of the first
new item.
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This may help to avoid character loss.
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Ensures that the FCR values are used.
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This is a minor optimization.
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Do nothing after errors.
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In case of a ring buffer overflow, the rtems_record_drain() will push
the complete ring buffer content to the client. While the items are
processed by the client, new items may overwrite some items being
processed. The overwritten items can be detected in the following
iteration once the next tail/head information is pushed to the client.
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- The TI's CortexA7 MP MPIDR register returns 0
Updates #3760
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- Parse the ROM taables if present to find the component base for
the debug hardware. This lets the RPi2 run dl09.exe.
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- Update the linkcmd file to support configure settings
- Set the workspace size based on the revision value
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Closes #3777
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Closes #3780
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This scheme is easier to decode.
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