| Commit message (Collapse) | Author | Age | Files | Lines |
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Check that the state of rand() and lrand48() is thread-specific,
that they are properly initialized, and return the expected
sequence of pseudo-random numbers for default seed values.
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Updates #4661
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The interrupt enables are used to implement a priority scheme in
bsp_interrupt_dispatch(). Enable interrupts through
bsp_interrupt_vector_enable() only if they are not already enabled to
not interfere with the priority scheme while
bsp_interrupt_vector_enable() is called during interrupt dispatching.
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Provide custom bsp_interrupt_is_valid_vector() implementation since
several interrupt vectors are reserved.
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This helps to run the validation tests of the Interrupt Manager
directives.
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Do not sporadically service interrupts configured as FIQ by the IRQ
interrupt dispatch.
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Some BSPs require that Clear_tm27_intr() is called in the interrupt
service routine.
Update #3269.
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Sections with identical attributes may be contiguous with a respective
begin and end address which is not on a minimum region boundary. The
begin address is aligned down to the region base address. The end
address is aligned up to the region end address. Account for this in
the check for contiguous sections.
Update #4202.
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A section may span up to the end of the address range. In this case the
end address is zero. Use the base address to check if a region should
be before another region.
Update #4202.
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ATSAM_CONSOLE_DEVICE_INDEX and ATSAM_CONSOLE_DEVICE_TYPE have to be
integers like suggested by their description. Otherwise it's not
possible to select (for example) USART2 as console device.
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Nucleo does not have any SDRAM, so 0 size is the only possible right
choice here.
Sponsored-By: Precidata
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Nucleo does not have any SDRAM so default linkage to SDRAM does not make
any sense here.
Sponsored-By: Precidata
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This is the default configuration of the board out of the box.
Any other possible/supported configuration requires soldering,
so definitely not out of the box experience.
Sponsored-By: Precidata
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This patch adds stm32h747i-disco-m4 BSP variant and puts it in sync
with the stm32h747i-disco BSP variant hardware support. That means,
only USART 1, 2 and UART 8 are enabled. Also SDRAM 2 is set to 32MB,
SDRAM 1 size is set to 0.
Sponsored-By: Precidata
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This means:
SDRAM 1: 0
SDRAM 2: 32 MB
Sponsored-By: Precidata
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This patch disables all U(S)ARTs which are not supported by the board
itself and its provided connectors. That means only USART1 and 2
and UART8 are enabled.
Sponsored-By: Precidata
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Sponsored-By: Precidata
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Besides C files for the BSP variant the patch also provides license
clarification on system_stm32h7xx.c file which is provided
in boards/stm/stm32h747i-disco directory.
The files comes from STM32CubeH7 project and references "root directory"
in its license comment and it's not clear where this points out.
Let's add clarification comment about it and also based on it
and resulting license let's add SPDX license identifier.
Sponsored-By: Precidata
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This means:
SDRAM 1: 0
SDRAM 2: 32 MB
Sponsored-By: Precidata
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This patch disables all U(S)ARTs which are not supported by the board
itself and its provided connectors.
Sponsored-By: Precidata
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This is minimalist configuration for the stm32h757i-eval-m4 BSP provided
here. The only general enhancement worth mention is a flash origin address
configuration which is needed for simplification as M4 core boots
from second flash bank which starts at 0x8100000 by default. The boot
address of the core may be changed by using STM32CubeProgrammer. If done
so then also BSP configuration needs to be changed accordingly.
As the BSP variant is running on M4 core, there is also more configuration
changes required here. E.g. boot core and ABI (compilation flags)
in comparison with stm32h757i-eval BSP. On the other hand, C code is shared
completely with this BSP variant.
Sponsored-By: Precidata
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Sponsored-By: Precidata
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This is done in preparation for future Cortex-M4 based BSP variants
which do not provide cache at all.
Sponsored-By: Precidata
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Sponsored-By: Precidata
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This means:
SDRAM 1: 0
SDRAM 2: 32 MB
Sponsored-By: Precidata
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Sponsored-By: Precidata
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Sponsored-By: Precidata
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Sponsored-By: Precidata
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This patch disables all U(S)ARTs which are not supported by the board
itself and its provided connectors.
Sponsored-By: Precidata
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This is minimalist configuration for the stm32h757i-eval BSP provided
here. The only general enhancement worth mention is boot core
configuration which is needed here as this is the first dual-core board
supported by stm32h7 BSP family and we need to choose boot core in order
to get C files compiling well.
Sponsored-By: Precidata
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Besides C files for the BSP variant the patch also provides license
clarification on system_stm32h7xx.c file which is provided
in boards/stm/stm32h757i-eval directory.
The files comes from STM32CubeH7 project and references "root directory"
in its license comment and it's not clear where this points out.
Let's add clarification comment about it and also based on it
and resulting license let's add SPDX license identifier.
Sponsored-By: Precidata
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Update #2349.
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Return early only if there was a timeout, otherwise return the PPS info.
Update #2349.
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Add myself also to Localized Write Permission for x86_64.
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Close #2349.
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Update #2349.
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Update #2349.
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Update #2349.
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Update #2349.
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Update #2349.
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Update #2349.
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Rename tc_getfrequency() to _Timecounter_Get_frequency().
Update #2349.
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Update #2349.
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Update #2349.
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