| Commit message (Collapse) | Author | Age | Files | Lines |
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Update #3059.
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The set of online processors must be a subset of the thread processor
affinity for the schedulers without arbitrary processor affinity support
to avoid problems in case of processor addition and removal.
Update #3059.
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Update #3059.
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Update #3059.
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Account for the thread processor affinity and make sure that it is
possible to allocate a processor to each thread dedicated to a scheduler
instance.
Update #3059.
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Replace the simple processor count with the processor set owned by the
scheduler instance.
Update #3059.
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Update #3059.
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Update #3059.
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Update #3059.
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Implement the Processor_mask via <sys/bitset.h>. Provide
_Processor_mask_To_uint32_t() to enable its use in device specific
routines, e.g. interrupt affinity register in an interrupt controller.
Update #3059.
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Update #2909.
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Right after a "msr basepri_max, %[basepri]" instruction an interrupt
service may still take place (observed at least on Cortex-M7). However,
pendable service calls that are activated during this interrupt service
may be delayed until interrupts are enable again. The
_ARMV7M_Pendable_service_call() did not check that a thread dispatch is
allowed. Move this test from _ARMV7M_Interrupt_service_leave() to
_ARMV7M_Pendable_service_call().
Update #3060.
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Update #3060.
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With global stdio streams, a freopen() would close the global stream
object.
Update #3012.
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Update #3056.
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Update #3056.
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Update #3056.
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Update #3056.
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In SMP configurations, add a red-black tree node to Scheduler_Node to
enable an EDF scheduler implementation.
Update #3056.
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Split smpscheduler03 to run the tests with only one processor.
Update #3056.
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Account for legacy AltiVec context.
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Do not zero the GPR2 in the thread context via dcbz instructions. Bug
was introduced by 32b4a0c42704f0076da8e2d5411290f55d1b2965.
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Change bsp_interrupt_vector_enable() and bsp_interrupt_vector_disable()
to not return a status code. Add bsp_interrupt_assert() and use it to
validate the vector number in the vector enable/disable implementations.
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Close #3051.
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Display the scheduler name instead of the current CPU in the "task"
shell command. The current CPU could be misleading in case locking
protocols are involved. The "cpuuse" command can be used to obtain the
current CPU.
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Update ticket #2891 and my GSOC project
add c/src/lib/libbsp/arm/beagle/i2c/bbb-i2c.c
modify c/src/lib/libbsp/arm/beagle/include/i2c.h
modify c/src/lib/libbsp/arm/beagle/include/bbb-gpio.h
modify c/src/lib/libcpu/arm/shared/include/am335x.h
modify c/src/lib/libbsp/arm/beagle/Makefile.am
Now can read the EEPROM by i2c, the test application link is: https://github.com/hahchenchen/GSOC-test-application
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modify c/src/lib/libbsp/arm/beagle/Makefile.am
modify c/src/lib/libbsp/arm/beagle/include/i2c.h
delete c/src/lib/libbsp/arm/beagle/misc/i2c.c
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According to manual, the used operations (Clean Line by PA, Clean and
Invalidate Line by PA, Cache Sync) are atomic and do not require
locking.
Update #3007.
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This task variable is superfluous since we use thread-local storage now.
Update #2289.
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See also:
https://www.gnu.org/software/automake/manual/html_node/Built-Sources-Example.html
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This reverts c475924d6d2ea7d5cba160a8a28e88642d6b46d8.
Update #2909.
Close #2994.
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Update #2833.
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Update #2833.
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Update #2833.
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For whatever reason FreeBSD renames several functions provided by
<arpa/inet.h> and uses weak references to provide the standard function
names. This causes problems on targets lacking proper support for weak
references. We do not need this function renaming on RTEMS.lk:x
Update #2833.
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Update #2468.
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