diff options
Diffstat (limited to 'testsuites')
| -rw-r--r-- | testsuites/smptests/smpipi01/init.c | 48 | ||||
| -rw-r--r-- | testsuites/smptests/smpmulticast01/init.c | 18 | ||||
| -rw-r--r-- | testsuites/unit/tc-compiler-builtins.c | 221 | ||||
| -rw-r--r-- | testsuites/validation/bsps/tr-fatal-clock-xil-ttc-irq-install.c | 187 | ||||
| -rw-r--r-- | testsuites/validation/bsps/tr-fatal-clock-xil-ttc-irq-install.h | 84 | ||||
| -rw-r--r-- | testsuites/validation/bsps/ts-fatal-clock-xil-ttc-irq-install.c | 79 | ||||
| -rw-r--r-- | testsuites/validation/tc-dev-clock-xil-ttc.c | 136 | ||||
| -rw-r--r-- | testsuites/validation/tc-score-fatal.c | 87 | ||||
| -rw-r--r-- | testsuites/validation/tc-score-isr.c | 2 | ||||
| -rw-r--r-- | testsuites/validation/tr-mtx-seize-wait.c | 2 |
10 files changed, 817 insertions, 47 deletions
diff --git a/testsuites/smptests/smpipi01/init.c b/testsuites/smptests/smpipi01/init.c index 290d13775f..f8172fed96 100644 --- a/testsuites/smptests/smpipi01/init.c +++ b/testsuites/smptests/smpipi01/init.c @@ -198,6 +198,43 @@ static const Per_CPU_Job_context counter_1_job_context = { .arg = &test_instance }; +static void sync_handler(void *arg) +{ + test_context *ctx = arg; + SMP_barrier_State *bs = &ctx->worker_barrier_state; + + /* (E) */ + barrier(ctx, bs); +} + +static const Per_CPU_Job_context sync_context = { + .handler = sync_handler, + .arg = &test_instance +}; + +static void wait_for_ipi_done(test_context *ctx, Per_CPU_Control *cpu) +{ + Per_CPU_Job job; + unsigned long done; + + job.context = &sync_context; + _Per_CPU_Submit_job(cpu, &job); + + while (cpu->isr_nest_level == 0) { + RTEMS_COMPILER_MEMORY_BARRIER(); + } + + /* (E) */ + barrier(ctx, &ctx->main_barrier_state); + + while (cpu->isr_nest_level != 0) { + RTEMS_COMPILER_MEMORY_BARRIER(); + } + + done = _Atomic_Load_ulong( &job.done, ATOMIC_ORDER_ACQUIRE ); + rtems_test_assert( done == PER_CPU_JOB_DONE ); +} + static void test_send_message_flood( test_context *ctx, uint32_t cpu_count @@ -211,20 +248,15 @@ static void test_send_message_flood( ctx->jobs[cpu_index][0].context = &counter_0_job_context; ctx->jobs[cpu_index][1].context = &counter_1_job_context; - _Per_CPU_Submit_job(cpu, &ctx->jobs[cpu_index][0]); + _Per_CPU_Add_job(cpu, &ctx->jobs[cpu_index][0]); } for (cpu_index = 0; cpu_index < cpu_count; ++cpu_index) { Per_CPU_Control *cpu; - Per_CPU_Control *cpu_self; uint32_t i; cpu = _Per_CPU_Get_by_index(cpu_index); - cpu_self = _Thread_Dispatch_disable(); - _SMP_Synchronize(); - _Thread_Dispatch_enable(cpu_self); - for (i = 0; i < cpu_count; ++i) { if (i != cpu_index) { ctx->copy_counters[i] = ctx->counters[i].value; @@ -235,6 +267,10 @@ static void test_send_message_flood( _SMP_Send_message(cpu, SMP_MESSAGE_PERFORM_JOBS); } + if (cpu_index != cpu_index_self) { + wait_for_ipi_done(ctx, cpu); + } + for (i = 0; i < cpu_count; ++i) { if (i != cpu_index) { rtems_test_assert(ctx->copy_counters[i] == ctx->counters[i].value); diff --git a/testsuites/smptests/smpmulticast01/init.c b/testsuites/smptests/smpmulticast01/init.c index ef8a1dbcb4..51a4624ea1 100644 --- a/testsuites/smptests/smpmulticast01/init.c +++ b/testsuites/smptests/smpmulticast01/init.c @@ -563,14 +563,16 @@ static void fatal_extension( bool ok; if (source == RTEMS_FATAL_SOURCE_SMP) { - T_step_eq_int(1, source, RTEMS_FATAL_SOURCE_SMP); - T_step_false(2, always_set_to_false, "unexpected argument value"); - T_step_eq_int(3, code, SMP_FATAL_WRONG_CPU_STATE_TO_PERFORM_JOBS); - T_case_end(); - - ok = T_run_finalize(); - rtems_test_assert(ok); - TEST_END(); + if (code != SMP_FATAL_SHUTDOWN_RESPONSE) { + T_step_eq_int(1, source, RTEMS_FATAL_SOURCE_SMP); + T_step_false(2, always_set_to_false, "unexpected argument value"); + T_step_eq_int(3, code, SMP_FATAL_WRONG_CPU_STATE_TO_PERFORM_JOBS); + T_case_end(); + + ok = T_run_finalize(); + rtems_test_assert(ok); + TEST_END(); + } } else if (source == RTEMS_FATAL_SOURCE_APPLICATION) { ok = T_run_finalize(); rtems_test_assert(ok); diff --git a/testsuites/unit/tc-compiler-builtins.c b/testsuites/unit/tc-compiler-builtins.c index 3beebe06fa..7a470b6632 100644 --- a/testsuites/unit/tc-compiler-builtins.c +++ b/testsuites/unit/tc-compiler-builtins.c @@ -130,6 +130,16 @@ uint64_t __udivmoddi4( uint64_t n, uint64_t d, uint64_t *r ); #endif +#if defined(TEST_UDIVMODDI4) && defined(__arm__) +/* + * Here __aeabi_uldivmod() may be used to carry out integer division + * operations even though the reminder is unused. This function is + * implemented by __udivmoddi4() which may never get called without a + * reminder for compiler generated code. + */ +#define TEST_UDIVMODDI4_WITHOUT_REMINDER +#endif + static bool do_longjmp; static jmp_buf exception_return_context; @@ -174,6 +184,9 @@ static void CompilerUnitBuiltins_Action_0( void ) { volatile unsigned int n; + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + n = 1U; T_eq_int( __builtin_clz( n ), 31 ); @@ -192,6 +205,9 @@ static void CompilerUnitBuiltins_Action_1( void ) { volatile unsigned long long n; + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + n = 1ULL; T_eq_int( __builtin_clzll( n ), 63 ); @@ -215,6 +231,9 @@ static void CompilerUnitBuiltins_Action_2( void ) { volatile unsigned int n; + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + n = 1U; T_eq_int( __builtin_ctz( n ), 0 ); @@ -233,6 +252,9 @@ static void CompilerUnitBuiltins_Action_3( void ) { volatile unsigned long long n; + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + n = 1ULL; T_eq_int( __builtin_ctzll( n ), 0 ); @@ -256,6 +278,9 @@ static void CompilerUnitBuiltins_Action_4( void ) { volatile unsigned int n; + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + n = 1U; T_eq_int( __builtin_ffs( n ), 1 ); @@ -274,6 +299,9 @@ static void CompilerUnitBuiltins_Action_5( void ) { volatile unsigned long long n; + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + n = 1ULL; T_eq_int( __builtin_ffsll( n ), 1 ); @@ -298,6 +326,9 @@ static void CompilerUnitBuiltins_Action_6( void ) { volatile unsigned int n; + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + n = 1U; T_eq_int( __builtin_parity( n ), 1 ); @@ -313,6 +344,9 @@ static void CompilerUnitBuiltins_Action_7( void ) { volatile unsigned long long n; + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + n = 1ULL; T_eq_int( __builtin_parityll( n ), 1 ); @@ -328,6 +362,9 @@ static void CompilerUnitBuiltins_Action_8( void ) { volatile unsigned int n; + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + n = 0U; T_eq_int( __builtin_popcount( n ), 0 ); @@ -346,6 +383,9 @@ static void CompilerUnitBuiltins_Action_9( void ) { volatile unsigned long long n; + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + n = 0ULL; T_eq_int( __builtin_popcountll( n ), 0 ); @@ -364,6 +404,9 @@ static void CompilerUnitBuiltins_Action_10( void ) { volatile uint32_t n; + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + n = UINT32_C( 0 ); T_eq_u32( __builtin_bswap32( n ), n ); @@ -385,6 +428,9 @@ static void CompilerUnitBuiltins_Action_11( void ) { volatile uint64_t n; + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + n = UINT64_C( 0 ); T_eq_u64( __builtin_bswap64( n ), n ); @@ -406,6 +452,11 @@ static void CompilerUnitBuiltins_Action_12( void ) volatile int64_t a; volatile int64_t b; + a = 0; + RTEMS_OBFUSCATE_VARIABLE( a ); + b = 0; + RTEMS_OBFUSCATE_VARIABLE( b ); + a = INT64_C( 0 ); b = INT64_C( 0 ); T_false( a < b ); @@ -431,6 +482,11 @@ static void CompilerUnitBuiltins_Action_13( void ) volatile uint64_t a; volatile uint64_t b; + a = 0; + RTEMS_OBFUSCATE_VARIABLE( a ); + b = 0; + RTEMS_OBFUSCATE_VARIABLE( b ); + a = UINT64_C( 0 ); b = UINT64_C( 0 ); T_false( a < b ); @@ -456,6 +512,11 @@ static void CompilerUnitBuiltins_Action_14( void ) volatile int64_t i; volatile int s; + i = 0; + RTEMS_OBFUSCATE_VARIABLE( i ); + s = 0; + RTEMS_OBFUSCATE_VARIABLE( s ); + i = INT64_C( 1 ); s = 0; T_eq_i64( i << s, INT64_C( 1 ) ); @@ -482,6 +543,11 @@ static void CompilerUnitBuiltins_Action_15( void ) volatile int64_t i; volatile int s; + i = 0; + RTEMS_OBFUSCATE_VARIABLE( i ); + s = 0; + RTEMS_OBFUSCATE_VARIABLE( s ); + i = INT64_C( 1 ); s = 0; T_eq_i64( i >> s, INT64_C( 1 ) ); @@ -507,6 +573,11 @@ static void CompilerUnitBuiltins_Action_16( void ) volatile uint64_t i; volatile int s; + i = 0; + RTEMS_OBFUSCATE_VARIABLE( i ); + s = 0; + RTEMS_OBFUSCATE_VARIABLE( s ); + i = UINT64_C( 1 ); s = 0; T_eq_u64( i >> s, UINT64_C( 1 ) ); @@ -532,6 +603,11 @@ static void CompilerUnitBuiltins_Action_17( void ) volatile int64_t a; volatile int64_t b; + a = 0; + RTEMS_OBFUSCATE_VARIABLE( a ); + b = 0; + RTEMS_OBFUSCATE_VARIABLE( b ); + a = INT64_C( 1 ); b = INT64_C( 1 ); T_eq_i64( a * b, INT64_C( 1 ) ); @@ -552,6 +628,9 @@ static void CompilerUnitBuiltins_Action_18( void ) { volatile int64_t i; + i = 0; + RTEMS_OBFUSCATE_VARIABLE( i ); + i = INT64_C( 1 ); T_eq_i64( -i, -INT64_C( 1 ) ); @@ -566,13 +645,21 @@ static void CompilerUnitBuiltins_Action_19( void ) { volatile int64_t n; volatile int64_t d; + volatile int64_t x; + + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + d = 0; + RTEMS_OBFUSCATE_VARIABLE( d ); + x = 0; + RTEMS_OBFUSCATE_VARIABLE( x ); n = INT64_C( 0 ); d = INT64_C( 0 ); do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n / d; + x = n / d; } n = INT64_C( 1 ); @@ -580,7 +667,7 @@ static void CompilerUnitBuiltins_Action_19( void ) do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n / d; + x = n / d; } n = INT64_C( 0x7fffffffffffffff ); @@ -588,7 +675,7 @@ static void CompilerUnitBuiltins_Action_19( void ) do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n / d; + x = n / d; } n = INT64_C( 0x7fffffff00000000 ); @@ -596,7 +683,7 @@ static void CompilerUnitBuiltins_Action_19( void ) do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n / d; + x = n / d; } n = INT64_C( 0 ); @@ -675,74 +762,164 @@ static void CompilerUnitBuiltins_Action_20( void ) { volatile uint64_t n; volatile uint64_t d; + volatile uint64_t x; + + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + d = 0; + RTEMS_OBFUSCATE_VARIABLE( d ); + x = 0; + RTEMS_OBFUSCATE_VARIABLE( x ); n = UINT64_C( 0 ); d = UINT64_C( 0 ); do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n / d; + x = n / d; } + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + do_longjmp = true; + + if ( setjmp( exception_return_context ) == 0 ) { + __udivmoddi4( n, d, NULL ); + } + #endif + n = UINT64_C( 1 ); d = UINT64_C( 0 ); do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n / d; + x = n / d; + } + + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + do_longjmp = true; + + if ( setjmp( exception_return_context ) == 0 ) { + __udivmoddi4( n, d, NULL ); } + #endif n = UINT64_C( 0x7fffffffffffffff ); d = UINT64_C( 0 ); do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n / d; + x = n / d; + } + + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + do_longjmp = true; + + if ( setjmp( exception_return_context ) == 0 ) { + __udivmoddi4( n, d, NULL ); } + #endif n = UINT64_C( 0x7fffffff00000000 ); d = UINT64_C( 0 ); do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n / d; + x = n / d; + } + + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + do_longjmp = true; + + if ( setjmp( exception_return_context ) == 0 ) { + __udivmoddi4( n, d, NULL ); + } + #endif + + n = UINT64_C( 0x7fffffff00000000 ); + d = UINT64_C( 0x7fffffff00000000 ); + do_longjmp = true; + + if ( setjmp( exception_return_context ) == 0 ) { + x = n / d; } + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + do_longjmp = true; + + if ( setjmp( exception_return_context ) == 0 ) { + __udivmoddi4( n, d, NULL ); + } + #endif + n = UINT64_C( 0 ); d = UINT64_C( 1 ); T_eq_u64( n / d, UINT64_C( 0 ) ); + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 0 ) ); + #endif n = UINT64_C( 1 ); d = UINT64_C( 1 ); T_eq_u64( n / d, UINT64_C( 1 ) ); + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 1 ) ); + #endif n = UINT64_C( 0xffffffffffffffff ); d = UINT64_C( 1 ); T_eq_u64( n / d, UINT64_C( 0xffffffffffffffff ) ); + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 0xffffffffffffffff ) ); + #endif n = UINT64_C( 2 ); d = UINT64_C( 1 ); T_eq_u64( n / d, UINT64_C( 2 ) ); + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 2 ) ); + #endif n = UINT64_C( 1 ); d = UINT64_C( 0xffffffffffffffff ); T_eq_u64( n / d, UINT64_C( 0 ) ); + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 0 ) ); + #endif n = UINT64_C( 0xffffffffffffffff ); d = UINT64_C( 0xffffffffffffffff ); T_eq_u64( n / d, UINT64_C( 1 ) ); + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 1 ) ); + #endif n = UINT64_C( 0xffffffffffffffff ); d = UINT64_C( 0x8000000000000000 ); T_eq_u64( n / d, UINT64_C( 1 ) ); + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 1 ) ); + #endif n = UINT64_C( 0x0000000100000001 ); d = UINT64_C( 0x0000000f00000000 ); T_eq_u64( n / d, UINT64_C( 0 ) ); + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 0 ) ); + #endif + + n = UINT64_C( 0x0000000100000000 ); + d = UINT64_C( 0x0000000f00000001 ); + T_eq_u64( n / d, UINT64_C( 0 ) ); + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 0 ) ); + #endif n = UINT64_C( 0xffffffff0000000f ); d = UINT64_C( 0x000000010000000f ); T_eq_u64( n / d, UINT64_C( 4294967280 ) ); + #if defined(TEST_UDIVMODDI4_WITHOUT_REMINDER) + T_eq_u64( __udivmoddi4( n, d, NULL ), UINT64_C( 4294967280 ) ); + #endif } /** @@ -752,13 +929,21 @@ static void CompilerUnitBuiltins_Action_21( void ) { volatile int64_t n; volatile int64_t d; + volatile int64_t x; + + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + d = 0; + RTEMS_OBFUSCATE_VARIABLE( d ); + x = 0; + RTEMS_OBFUSCATE_VARIABLE( x ); n = INT64_C( 0 ); d = INT64_C( 0 ); do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n % d; + x = n % d; } n = INT64_C( 1 ); @@ -766,7 +951,7 @@ static void CompilerUnitBuiltins_Action_21( void ) do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n % d; + x = n % d; } n = INT64_C( 0x7fffffffffffffff ); @@ -774,7 +959,7 @@ static void CompilerUnitBuiltins_Action_21( void ) do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n % d; + x = n % d; } n = INT64_C( 0x7fffffff00000000 ); @@ -782,7 +967,7 @@ static void CompilerUnitBuiltins_Action_21( void ) do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n % d; + x = n % d; } n = INT64_C( 0 ); @@ -873,13 +1058,21 @@ static void CompilerUnitBuiltins_Action_22( void ) { volatile uint64_t n; volatile uint64_t d; + volatile uint64_t x; + + n = 0; + RTEMS_OBFUSCATE_VARIABLE( n ); + d = 0; + RTEMS_OBFUSCATE_VARIABLE( d ); + x = 0; + RTEMS_OBFUSCATE_VARIABLE( x ); n = UINT64_C( 0 ); d = UINT64_C( 0 ); do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n % d; + x = n % d; } n = UINT64_C( 1 ); @@ -887,7 +1080,7 @@ static void CompilerUnitBuiltins_Action_22( void ) do_longjmp = true; if ( setjmp( exception_return_context ) == 0 ) { - n = n % d; + x = n % d; } n = UINT64_C( 0 ); diff --git a/testsuites/validation/bsps/tr-fatal-clock-xil-ttc-irq-install.c b/testsuites/validation/bsps/tr-fatal-clock-xil-ttc-irq-install.c new file mode 100644 index 0000000000..731b454ee4 --- /dev/null +++ b/testsuites/validation/bsps/tr-fatal-clock-xil-ttc-irq-install.c @@ -0,0 +1,187 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup DevClockXilTtcValFatalIrqInstall + */ + +/* + * Copyright (C) 2024 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * This file is part of the RTEMS quality process and was automatically + * generated. If you find something that needs to be fixed or + * worded better please post a report or patch to an RTEMS mailing list + * or raise a bug report: + * + * https://www.rtems.org/bugs.html + * + * For information on updating and regenerating please refer to the How-To + * section in the Software Requirements Engineering chapter of the + * RTEMS Software Engineering manual. The manual is provided as a part of + * a release. For development sources please refer to the online + * documentation at: + * + * https://docs.rtems.org + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <bsp.h> +#include <rtems.h> +#include <bsp/fatal.h> +#include <rtems/sysinit.h> + +#include "tr-fatal-clock-xil-ttc-irq-install.h" + +#include <rtems/test.h> + +/** + * @defgroup DevClockXilTtcValFatalIrqInstall \ + * spec:/dev/clock/xil-ttc/val/fatal-irq-install + * + * @ingroup TestsuitesBspsFatalClockXilTtcIrqInstall + * + * @brief Tests a fatal error. + * + * This test case performs the following actions: + * + * - The test action is carried out by the OccupyClockInterrupt() system + * initialization handler. + * + * - Check that the expected fatal source is present. + * + * - Check that the expected fatal code is present. + * + * @{ + */ + +/** + * @brief Test context for spec:/dev/clock/xil-ttc/val/fatal-irq-install test + * case. + */ +typedef struct { + /** + * @brief This member contains a copy of the corresponding + * DevClockXilTtcValFatalIrqInstall_Run() parameter. + */ + rtems_fatal_source source; + + /** + * @brief This member contains a copy of the corresponding + * DevClockXilTtcValFatalIrqInstall_Run() parameter. + */ + rtems_fatal_code code; +} DevClockXilTtcValFatalIrqInstall_Context; + +static DevClockXilTtcValFatalIrqInstall_Context + DevClockXilTtcValFatalIrqInstall_Instance; + +static void ClockInterrupt( void *arg ) +{ + (void) arg; +} + +static rtems_interrupt_entry interrupt_entry = RTEMS_INTERRUPT_ENTRY_INITIALIZER( + ClockInterrupt, + NULL, + "Clock" +); + +static void OccupyClockInterrupt( void ) +{ + (void) rtems_interrupt_entry_install( + XIL_CLOCK_TTC_IRQ, + RTEMS_INTERRUPT_UNIQUE, + &interrupt_entry + ); +} + +RTEMS_SYSINIT_ITEM( + OccupyClockInterrupt, + RTEMS_SYSINIT_DEVICE_DRIVERS, + RTEMS_SYSINIT_ORDER_FIRST +); + +static T_fixture DevClockXilTtcValFatalIrqInstall_Fixture = { + .setup = NULL, + .stop = NULL, + .teardown = NULL, + .scope = NULL, + .initial_context = &DevClockXilTtcValFatalIrqInstall_Instance +}; + +/** + * @brief The test action is carried out by the OccupyClockInterrupt() system + * initialization handler. + */ +static void DevClockXilTtcValFatalIrqInstall_Action_0( + DevClockXilTtcValFatalIrqInstall_Context *ctx +) +{ + /* Nothing to do */ + + /* + * Check that the expected fatal source is present. + */ + T_step_eq_int( 0, ctx->source, RTEMS_FATAL_SOURCE_BSP ); + + /* + * Check that the expected fatal code is present. + */ + T_step_eq_ulong( + 1, + ctx->code, + XIL_FATAL_TTC_IRQ_INSTALL + ); +} + +void DevClockXilTtcValFatalIrqInstall_Run( + rtems_fatal_source source, + rtems_fatal_code code +) +{ + DevClockXilTtcValFatalIrqInstall_Context *ctx; + + ctx = &DevClockXilTtcValFatalIrqInstall_Instance; + ctx->source = source; + ctx->code = code; + + ctx = T_case_begin( + "DevClockXilTtcValFatalIrqInstall", + &DevClockXilTtcValFatalIrqInstall_Fixture + ); + + T_plan( 2 ); + + DevClockXilTtcValFatalIrqInstall_Action_0( ctx ); + + T_case_end(); +} + +/** @} */ diff --git a/testsuites/validation/bsps/tr-fatal-clock-xil-ttc-irq-install.h b/testsuites/validation/bsps/tr-fatal-clock-xil-ttc-irq-install.h new file mode 100644 index 0000000000..74021233a0 --- /dev/null +++ b/testsuites/validation/bsps/tr-fatal-clock-xil-ttc-irq-install.h @@ -0,0 +1,84 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup DevClockXilTtcValFatalIrqInstall + */ + +/* + * Copyright (C) 2024 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * This file is part of the RTEMS quality process and was automatically + * generated. If you find something that needs to be fixed or + * worded better please post a report or patch to an RTEMS mailing list + * or raise a bug report: + * + * https://www.rtems.org/bugs.html + * + * For information on updating and regenerating please refer to the How-To + * section in the Software Requirements Engineering chapter of the + * RTEMS Software Engineering manual. The manual is provided as a part of + * a release. For development sources please refer to the online + * documentation at: + * + * https://docs.rtems.org + */ + +#ifndef _TR_FATAL_CLOCK_XIL_TTC_IRQ_INSTALL_H +#define _TR_FATAL_CLOCK_XIL_TTC_IRQ_INSTALL_H + +#include <rtems.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @addtogroup DevClockXilTtcValFatalIrqInstall + * + * @{ + */ + +/** + * @brief Runs the parameterized test case. + * + * @param source is fatal source. + * + * @param code is fatal code. + */ +void DevClockXilTtcValFatalIrqInstall_Run( + rtems_fatal_source source, + rtems_fatal_code code +); + +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* _TR_FATAL_CLOCK_XIL_TTC_IRQ_INSTALL_H */ diff --git a/testsuites/validation/bsps/ts-fatal-clock-xil-ttc-irq-install.c b/testsuites/validation/bsps/ts-fatal-clock-xil-ttc-irq-install.c new file mode 100644 index 0000000000..e5c1062348 --- /dev/null +++ b/testsuites/validation/bsps/ts-fatal-clock-xil-ttc-irq-install.c @@ -0,0 +1,79 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup TestsuitesBspsFatalClockXilTtcIrqInstall + */ + +/* + * Copyright (C) 2024 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * This file is part of the RTEMS quality process and was automatically + * generated. If you find something that needs to be fixed or + * worded better please post a report or patch to an RTEMS mailing list + * or raise a bug report: + * + * https://www.rtems.org/bugs.html + * + * For information on updating and regenerating please refer to the How-To + * section in the Software Requirements Engineering chapter of the + * RTEMS Software Engineering manual. The manual is provided as a part of + * a release. For development sources please refer to the online + * documentation at: + * + * https://docs.rtems.org + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include "tr-fatal-clock-xil-ttc-irq-install.h" + +#include <rtems/test.h> + +/** + * @defgroup TestsuitesBspsFatalClockXilTtcIrqInstall \ + * spec:/testsuites/bsps/fatal-clock-xil-ttc-irq-install + * + * @ingroup RTEMSTestSuitesValidation + * + * @brief This validation test suite contains a test case which triggers a + * fatal error during system initialization. + * + * @{ + */ + +const char rtems_test_name[] = "TestsuitesBspsFatalClockXilTtcIrqInstall"; + +#define FATAL_SYSINIT_RUN DevClockXilTtcValFatalIrqInstall_Run + +#define CONFIGURE_APPLICATION_NEEDS_CLOCK_DRIVER + +#include "ts-fatal-sysinit.h" + +/** @} */ diff --git a/testsuites/validation/tc-dev-clock-xil-ttc.c b/testsuites/validation/tc-dev-clock-xil-ttc.c new file mode 100644 index 0000000000..70f49a4cc6 --- /dev/null +++ b/testsuites/validation/tc-dev-clock-xil-ttc.c @@ -0,0 +1,136 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup DevClockXilTtcValTickCatchUp + */ + +/* + * Copyright (C) 2024 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * This file is part of the RTEMS quality process and was automatically + * generated. If you find something that needs to be fixed or + * worded better please post a report or patch to an RTEMS mailing list + * or raise a bug report: + * + * https://www.rtems.org/bugs.html + * + * For information on updating and regenerating please refer to the How-To + * section in the Software Requirements Engineering chapter of the + * RTEMS Software Engineering manual. The manual is provided as a part of + * a release. For development sources please refer to the online + * documentation at: + * + * https://docs.rtems.org + */ + +#ifdef HAVE_CONFIG_H +#include "config.h" +#endif + +#include <rtems.h> +#include <sys/time.h> + +#include <rtems/test.h> + +/** + * @defgroup DevClockXilTtcValTickCatchUp \ + * spec:/dev/clock/xil-ttc/val/tick-catch-up + * + * @ingroup TestsuitesBspsValidationBsp0 + * + * @brief Tests some Xilinx TTC clock driver functions. + * + * This test case performs the following actions: + * + * - Synchronize with the clock tick. Disable interrupts. Busy wait three + * clock tick intervals. Enable interrupts. + * + * - Check that exactly three clock ticks happened once interrupts are + * enabled again. + * + * @{ + */ + +/** + * @brief Synchronize with the clock tick. Disable interrupts. Busy wait + * three clock tick intervals. Enable interrupts. + */ +static void DevClockXilTtcValTickCatchUp_Action_0( void ) +{ + uint32_t ns_per_tick; + uint64_t three_ticks_interval; + rtems_interrupt_level level; + rtems_interval t_0; + rtems_interval t_1; + rtems_interval t_2; + uint64_t m_0; + uint64_t m_1; + + ns_per_tick = rtems_configuration_get_nanoseconds_per_tick(); + three_ticks_interval = ( 7 * (uint64_t) nstosbt( ns_per_tick ) ) / 2; + t_0 = rtems_clock_get_ticks_since_boot(); + + /* Synchronize with clock tick */ + do { + t_1 = rtems_clock_get_ticks_since_boot(); + m_0 = (uint64_t) rtems_clock_get_monotonic_sbintime(); + } while ( t_0 == t_1 ); + + rtems_interrupt_local_disable( level ); + + do { + m_1 = (uint64_t) rtems_clock_get_monotonic_sbintime(); + } while ( m_1 - m_0 <= three_ticks_interval ); + + rtems_interrupt_local_enable( level ); + + /* + * Make sure the clock interrupt was serviced after the interrupt enable. + */ + do { + t_2 = rtems_clock_get_ticks_since_boot(); + } while ( t_1 == t_2 ); + + /* + * Check that exactly three clock ticks happened once interrupts are enabled + * again. + */ + T_step_eq_u32( 0, t_2 - t_1, 3 ); +} + +/** + * @fn void T_case_body_DevClockXilTtcValTickCatchUp( void ) + */ +T_TEST_CASE( DevClockXilTtcValTickCatchUp ) +{ + T_plan( 1 ); + + DevClockXilTtcValTickCatchUp_Action_0(); +} + +/** @} */ diff --git a/testsuites/validation/tc-score-fatal.c b/testsuites/validation/tc-score-fatal.c index dd61a87d80..b0a55f4664 100644 --- a/testsuites/validation/tc-score-fatal.c +++ b/testsuites/validation/tc-score-fatal.c @@ -7,7 +7,7 @@ */ /* - * Copyright (C) 2021 embedded brains GmbH & Co. KG + * Copyright (C) 2021, 2024 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -74,14 +74,21 @@ * This test case performs the following actions: * * - Construct a task with a task body which returns. Check that the right - * fatal error occurs. + * fatal error occurred. * - * - Construct a task which performs a thread dispatch with maskable interrupts - * disabled. Check that the right fatal error occurs or no fatal error - * occurs. + * - Construct a task which performs a direct thread dispatch with maskable + * interrupts disabled. Where robust thread dispatching is required, check + * that the right fatal error occurred, otherwise check that no fatal error + * occurred. + * + * - Construct a task which performs an on demand thread dispatch with maskable + * interrupts disabled. Where robust thread dispatching is required, check + * that the right fatal error occurred, otherwise check that no fatal error + * occurred. * * - Construct a task which performs a direct thread dispatch with a thread - * dispatch level not equal to one. Check that the right fatal error occurs. + * dispatch level not equal to one. Check that the right fatal error + * occurred. * * - Create a mutex and construct a task which produces a deadlock which * involves the allocator mutex. @@ -164,10 +171,11 @@ static void FatalBadThreadDispatchEnvironment( { Fatal( source, code, arg ); _ISR_Set_level( 0 ); - _Thread_Dispatch_direct_no_return( _Per_CPU_Get() ); + _Thread_Dispatch_unnest( _Per_CPU_Get() ); + rtems_task_exit(); } -static void ISRDisabledThreadDispatchTask( rtems_task_argument arg ) +static void ISRDisabledDirectThreadDispatchTask( rtems_task_argument arg ) { rtems_interrupt_level level; @@ -177,6 +185,16 @@ static void ISRDisabledThreadDispatchTask( rtems_task_argument arg ) rtems_task_exit(); } +static void ISRDisabledOnDemandThreadDispatchTask( rtems_task_argument arg ) +{ + rtems_interrupt_level level; + + (void) arg; + rtems_interrupt_local_disable( level ); + (void) level; + SetSelfPriority( PRIO_VERY_HIGH ); +} + static void FatalBadThreadDispatchDisableLevel( rtems_fatal_source source, rtems_fatal_code code, @@ -245,7 +263,7 @@ static T_fixture ScoreValFatal_Fixture = { /** * @brief Construct a task with a task body which returns. Check that the - * right fatal error occurs. + * right fatal error occurred. */ static void ScoreValFatal_Action_0( ScoreValFatal_Context *ctx ) { @@ -265,9 +283,10 @@ static void ScoreValFatal_Action_0( ScoreValFatal_Context *ctx ) } /** - * @brief Construct a task which performs a thread dispatch with maskable - * interrupts disabled. Check that the right fatal error occurs or no fatal - * error occurs. + * @brief Construct a task which performs a direct thread dispatch with + * maskable interrupts disabled. Where robust thread dispatching is + * required, check that the right fatal error occurred, otherwise check that + * no fatal error occurred. */ static void ScoreValFatal_Action_1( ScoreValFatal_Context *ctx ) { @@ -278,7 +297,40 @@ static void ScoreValFatal_Action_1( ScoreValFatal_Context *ctx ) SetSelfPriority( PRIO_NORMAL ); counter = ResetFatalInfo( ctx ); id = CreateTask( "BENV", PRIO_HIGH ); - StartTask( id, ISRDisabledThreadDispatchTask, NULL ); + StartTask( id, ISRDisabledDirectThreadDispatchTask, NULL ); + + #if CPU_ENABLE_ROBUST_THREAD_DISPATCH == FALSE + if ( rtems_configuration_get_maximum_processors() > 1 ) { + #endif + T_eq_uint( GetFatalCounter( ctx ), counter + 1 ); + T_eq_int( ctx->source, INTERNAL_ERROR_CORE ); + T_eq_ulong( ctx->code, INTERNAL_ERROR_BAD_THREAD_DISPATCH_ENVIRONMENT ); + #if CPU_ENABLE_ROBUST_THREAD_DISPATCH == FALSE + } else { + T_eq_uint( GetFatalCounter( ctx ), counter ); + } + #endif + + RestoreRunnerPriority(); + SetFatalHandler( NULL, NULL ); +} + +/** + * @brief Construct a task which performs an on demand thread dispatch with + * maskable interrupts disabled. Where robust thread dispatching is + * required, check that the right fatal error occurred, otherwise check that + * no fatal error occurred. + */ +static void ScoreValFatal_Action_2( ScoreValFatal_Context *ctx ) +{ + rtems_id id; + unsigned int counter; + + SetFatalHandler( FatalBadThreadDispatchEnvironment, ctx ); + SetSelfPriority( PRIO_NORMAL ); + counter = ResetFatalInfo( ctx ); + id = CreateTask( "BENV", PRIO_HIGH ); + StartTask( id, ISRDisabledOnDemandThreadDispatchTask, NULL ); #if CPU_ENABLE_ROBUST_THREAD_DISPATCH == FALSE if ( rtems_configuration_get_maximum_processors() > 1 ) { @@ -299,9 +351,9 @@ static void ScoreValFatal_Action_1( ScoreValFatal_Context *ctx ) /** * @brief Construct a task which performs a direct thread dispatch with a * thread dispatch level not equal to one. Check that the right fatal error - * occurs. + * occurred. */ -static void ScoreValFatal_Action_2( ScoreValFatal_Context *ctx ) +static void ScoreValFatal_Action_3( ScoreValFatal_Context *ctx ) { rtems_id id; unsigned int counter; @@ -322,7 +374,7 @@ static void ScoreValFatal_Action_2( ScoreValFatal_Context *ctx ) * @brief Create a mutex and construct a task which produces a deadlock which * involves the allocator mutex. */ -static void ScoreValFatal_Action_3( ScoreValFatal_Context *ctx ) +static void ScoreValFatal_Action_4( ScoreValFatal_Context *ctx ) { rtems_extensions_table extensions; rtems_status_code sc; @@ -374,7 +426,7 @@ static void ScoreValFatal_Action_3( ScoreValFatal_Context *ctx ) * SetFatalHandler() requires an initial extension this validates * CONFIGURE_INITIAL_EXTENSIONS. */ -static void ScoreValFatal_Action_4( ScoreValFatal_Context *ctx ) +static void ScoreValFatal_Action_5( ScoreValFatal_Context *ctx ) { unsigned int counter; @@ -404,6 +456,7 @@ T_TEST_CASE_FIXTURE( ScoreValFatal, &ScoreValFatal_Fixture ) ScoreValFatal_Action_2( ctx ); ScoreValFatal_Action_3( ctx ); ScoreValFatal_Action_4( ctx ); + ScoreValFatal_Action_5( ctx ); } /** @} */ diff --git a/testsuites/validation/tc-score-isr.c b/testsuites/validation/tc-score-isr.c index 9891829a84..b178541e72 100644 --- a/testsuites/validation/tc-score-isr.c +++ b/testsuites/validation/tc-score-isr.c @@ -221,7 +221,7 @@ static void ISRHandler( void *arg ) (void) arg; -#if defined(RTEMS_SMP) +#if defined(RTEMS_SMP) && !(defined(__PPC__) || (__powerpc64__)) Per_CPU_Control *cpu_self; cpu_self = _Per_CPU_Get(); diff --git a/testsuites/validation/tr-mtx-seize-wait.c b/testsuites/validation/tr-mtx-seize-wait.c index fa369e43db..2e2fe9d1ec 100644 --- a/testsuites/validation/tr-mtx-seize-wait.c +++ b/testsuites/validation/tr-mtx-seize-wait.c @@ -710,7 +710,7 @@ static void ScoreMtxReqSeizeWait_Post_Enqueued_Check( case ScoreMtxReqSeizeWait_Post_Enqueued_PriorityInherit: { /* - * The calling thread shall be enqueued in priority order with priorit + * The calling thread shall be enqueued in priority order with priority * inheritance. */ ScoreTqReqEnqueuePriorityInherit_Run( &ctx->tq_ctx->base ); |