diff options
Diffstat (limited to 'spec/build/bsps/powerpc/psim/optclkfastidle.yml')
| -rw-r--r-- | spec/build/bsps/powerpc/psim/optclkfastidle.yml | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/spec/build/bsps/powerpc/psim/optclkfastidle.yml b/spec/build/bsps/powerpc/psim/optclkfastidle.yml index d19f2605eb..1019af2630 100644 --- a/spec/build/bsps/powerpc/psim/optclkfastidle.yml +++ b/spec/build/bsps/powerpc/psim/optclkfastidle.yml @@ -4,13 +4,12 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-family: [] -default-by-variant: -- value: true - variants: - - powerpc/psim +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: powerpc/psim + value: true +- enabled-by: true + value: false description: | This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. enabled-by: true |