diff options
Diffstat (limited to 'spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml')
-rw-r--r-- | spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml b/spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml new file mode 100644 index 0000000000..44d2671eb6 --- /dev/null +++ b/spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml @@ -0,0 +1,30 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: +- Copyright (C) 2022 embedded brains GmbH & Co. KG +default: +- enabled-by: + - aarch64/a53_ilp32_qemu + - aarch64/a53_lp64_qemu + - aarch64/a72_ilp32_qemu + - aarch64/a72_lp64_qemu + - aarch64/raspberrypi4b + - aarch64/xilinx_versal_aiedge + - aarch64/xilinx_versal_qemu + - aarch64/xilinx_versal_vck190 + - bsps/aarch64/xilinx-zynqmp + value: null +- enabled-by: true + value: 0x00000002 +description: | + Defines the initial value of the ICC_BPR0 register of the ARM GIC CPU + Interface. The value is optional. If it is not defined, then the register + is not initialized. +enabled-by: true +format: '{:#010x}' +links: [] +name: BSP_ARM_GIC_ICC_BPR0 +type: build |