diff options
Diffstat (limited to 'spec/build/bsps/arm')
498 files changed, 5366 insertions, 2542 deletions
diff --git a/spec/build/bsps/arm/altera-cyclone-v/abi.yml b/spec/build/bsps/arm/altera-cyclone-v/abi.yml index a3a710c97d..280b42de1e 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/abi.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/abi.yml @@ -5,14 +5,15 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -- -mtune=cortex-a9 -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard + - -mtune=cortex-a9 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml b/spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml index 99117573de..74a917c533 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/bspalteracyclonev.yml @@ -4,7 +4,7 @@ bsp: altcycv_devkit build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: altera-cyclone-v @@ -13,7 +13,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/altera-cyclone-v/include/bsp.h - - bsps/arm/altera-cyclone-v/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/altera-cyclone-v/include/bsp/alt_16550_uart.h @@ -129,7 +128,7 @@ source: - bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c - bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c - bsps/arm/shared/start/bsp-start-memcpy.S -- bsps/shared/dev/btimer/btimer-stub.c +- bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c - bsps/shared/dev/irq/arm-gicv2.c - bsps/shared/dev/irq/arm-gicv2-get-attributes.c @@ -139,6 +138,8 @@ source: - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bsp-fdt.c - bsps/shared/start/gettargethash-default.c +- bsps/shared/start/mallocinitmulti.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c +- bsps/shared/start/wkspaceinitmulti.c type: build diff --git a/spec/build/bsps/arm/altera-cyclone-v/objsmp.yml b/spec/build/bsps/arm/altera-cyclone-v/objsmp.yml index bf0c99d21f..acbef94765 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/objsmp.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/objsmp.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: diff --git a/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml b/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml index e67ddc129b..205be52863 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/opta9periphclk.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | define to set ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz, otherwise alt_clk_freq_get() is used enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml b/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml index 77dac09116..f47823b41f 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optcachedata.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | enable data cache enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml b/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml index a59db43f31..d997b69897 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optcacheinst.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | enable instruction cache enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml b/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml index b800b20428..f0b83e1402 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/.*qemu +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: true +- enabled-by: true + value: false description: | This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml b/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml index 635697cc8a..1033640bcc 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optconcfg.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | configuration for console (UART 0) enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml b/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml index f5c588a330..acf97aa2de 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optconuart1.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | configuration for UART 1 enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml b/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml index f2fc473967..734b52f668 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optfdten.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | define if FDT is supported enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml b/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml index ee8097aa3b..49af6b2aac 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/opti2cspeed.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 100000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 100000 description: | speed for I2C0 in HZ enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml b/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml index 2d36d5f930..2e17fb9deb 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optnoi2c.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | Number of configured I2C buses. Note that each bus has to be configured in an apropriate i2cdrv_config array. enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml b/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml index efd1ea2b2a..206a6f2801 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optresetvec.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml b/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml index b5f577ffc3..64f17b68f0 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optuartbaud.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 115200 description: | baud for UARTs enabled-by: true diff --git a/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml b/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml index 152668b2d9..0dfc3c7a0a 100644 --- a/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml +++ b/spec/build/bsps/arm/altera-cyclone-v/optuartirq.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | enable usage of interrupts for the UART modules enabled-by: true diff --git a/spec/build/bsps/arm/atsam/abi.yml b/spec/build/bsps/arm/atsam/abi.yml index 7a95742c36..00dd2cbac3 100644 --- a/spec/build/bsps/arm/atsam/abi.yml +++ b/spec/build/bsps/arm/atsam/abi.yml @@ -5,13 +5,14 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mthumb -- -mcpu=cortex-m7 -- -mfpu=fpv5-d16 -- -mfloat-abi=hard -default-by-variant: [] +- enabled-by: true + value: + - -mthumb + - -mcpu=cortex-m7 + - -mfpu=fpv5-d16 + - -mfloat-abi=hard description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/atsam/bspatsam.yml b/spec/build/bsps/arm/atsam/bspatsam.yml index 94a2bb32bc..6fd7c4e0db 100644 --- a/spec/build/bsps/arm/atsam/bspatsam.yml +++ b/spec/build/bsps/arm/atsam/bspatsam.yml @@ -4,7 +4,7 @@ bsp: atsamv build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: atsam @@ -19,7 +19,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/atsam/include/bsp.h - - bsps/arm/atsam/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/atsam/include/bsp/atsam-clock-config.h @@ -298,6 +297,8 @@ links: - role: build-dependency uid: optnocachesz - role: build-dependency + uid: optnullsz +- role: build-dependency uid: optoscmain - role: build-dependency uid: optqspiflashsz @@ -318,6 +319,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../opto2 - role: build-dependency uid: linkcmds @@ -398,12 +401,11 @@ source: - bsps/arm/shared/irq/irq-dispatch-armv7m.c - bsps/arm/shared/start/bsp-start-memcpy.S - bsps/arm/shared/start/bspreset-armv7m.c -- bsps/shared/dev/btimer/btimer-stub.c +- bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/rtc/rtc-support.c - bsps/shared/dev/serial/console-termios.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/atsam/linkcmds.yml b/spec/build/bsps/arm/atsam/linkcmds.yml index fe6211f82f..8e3d41928b 100644 --- a/spec/build/bsps/arm/atsam/linkcmds.yml +++ b/spec/build/bsps/arm/atsam/linkcmds.yml @@ -2,7 +2,8 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: config-file content: | MEMORY { - ITCM : ORIGIN = 0x00000000, LENGTH = ${ATSAM_MEMORY_TCM_SIZE} + NULL : ORIGIN = 0x00000000, LENGTH = ${ATSAM_MEMORY_NULL_SIZE} + ITCM : ORIGIN = ${ATSAM_MEMORY_NULL_SIZE}, LENGTH = ((${ATSAM_MEMORY_TCM_SIZE} > ${ATSAM_MEMORY_NULL_SIZE}) ? (${ATSAM_MEMORY_TCM_SIZE} - ${ATSAM_MEMORY_NULL_SIZE}) : 0) INTFLASH : ORIGIN = 0x00400000, LENGTH = ${ATSAM_MEMORY_INTFLASH_SIZE} DTCM : ORIGIN = 0x20000000, LENGTH = ${ATSAM_MEMORY_TCM_SIZE} INTSRAM : ORIGIN = 0x20400000, LENGTH = ${ATSAM_MEMORY_INTSRAM_SIZE} - 2 * ${ATSAM_MEMORY_TCM_SIZE} - ${ATSAM_MEMORY_NOCACHE_SIZE} @@ -13,6 +14,10 @@ content: | /* Must be used only for MPU definitions */ + atsam_memory_null_begin = ORIGIN (NULL); + atsam_memory_null_end = ORIGIN (NULL) + LENGTH (NULL); + atsam_memory_null_size = LENGTH (NULL); + atsam_memory_itcm_begin = ORIGIN (ITCM); atsam_memory_itcm_end = ORIGIN (ITCM) + LENGTH (ITCM); atsam_memory_itcm_size = LENGTH (ITCM); @@ -41,7 +46,7 @@ content: | atsam_memory_qspiflash_end = ORIGIN (QSPIFLASH) + LENGTH (QSPIFLASH); atsam_memory_qspiflash_size = LENGTH (QSPIFLASH); copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG enabled-by: true install-path: ${BSP_LIBDIR} links: [] diff --git a/spec/build/bsps/arm/atsam/optchgclksram.yml b/spec/build/bsps/arm/atsam/optchgclksram.yml index 58dca377d7..564ace9513 100644 --- a/spec/build/bsps/arm/atsam/optchgclksram.yml +++ b/spec/build/bsps/arm/atsam/optchgclksram.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | Move the functions that set up the clock into the SRAM. This allows to change the clock frequency even if the application is started from SDRAM. Requires a TCM_SIZE > 0. enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optchip.yml b/spec/build/bsps/arm/atsam/optchip.yml index 16998e6c2a..27b5f86366 100644 --- a/spec/build/bsps/arm/atsam/optchip.yml +++ b/spec/build/bsps/arm/atsam/optchip.yml @@ -42,9 +42,10 @@ actions: conf.env["ATSAM_MEMORY_INTSRAM_SIZE"] = c[2] build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: samv71q21 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: samv71q21 description: | Chip variant enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optconbaud.yml b/spec/build/bsps/arm/atsam/optconbaud.yml index b0e34e7505..0e8cbe6c16 100644 --- a/spec/build/bsps/arm/atsam/optconbaud.yml +++ b/spec/build/bsps/arm/atsam/optconbaud.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 115200 description: | initial baud for console devices (default 115200) enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optconidx.yml b/spec/build/bsps/arm/atsam/optconidx.yml index 42fb3b142a..c2f374f7dc 100644 --- a/spec/build/bsps/arm/atsam/optconidx.yml +++ b/spec/build/bsps/arm/atsam/optconidx.yml @@ -1,15 +1,17 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: -- get-boolean: null -- define-condition: null +- get-integer: null +- define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 1 description: | device index for /dev/console (default 1, e.g. USART1) enabled-by: true +format: '{}' links: [] name: ATSAM_CONSOLE_DEVICE_INDEX type: build diff --git a/spec/build/bsps/arm/atsam/optconirq.yml b/spec/build/bsps/arm/atsam/optconirq.yml index a410e05060..de8b5339ca 100644 --- a/spec/build/bsps/arm/atsam/optconirq.yml +++ b/spec/build/bsps/arm/atsam/optconirq.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | use interrupt driven mode for console devices (used by default) enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optcontype.yml b/spec/build/bsps/arm/atsam/optcontype.yml index eddbee1063..5b160bfc7c 100644 --- a/spec/build/bsps/arm/atsam/optcontype.yml +++ b/spec/build/bsps/arm/atsam/optcontype.yml @@ -1,15 +1,17 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: -- get-boolean: null -- define-condition: null +- get-integer: null +- define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0 description: | device type for /dev/console, use 0 for USART and 1 for UART (default USART) enabled-by: true +format: '{}' links: [] name: ATSAM_CONSOLE_DEVICE_TYPE type: build diff --git a/spec/build/bsps/arm/atsam/optmck.yml b/spec/build/bsps/arm/atsam/optmck.yml index d216542285..d6332b30bb 100644 --- a/spec/build/bsps/arm/atsam/optmck.yml +++ b/spec/build/bsps/arm/atsam/optmck.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 123000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 123000000 description: | Frequency of the MCK in Hz. Set to 0 to force application defined speed. See start/pmc-config.c for available clock configurations. enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optnocachesz.yml b/spec/build/bsps/arm/atsam/optnocachesz.yml index 433633d3b0..cd803c1652 100644 --- a/spec/build/bsps/arm/atsam/optnocachesz.yml +++ b/spec/build/bsps/arm/atsam/optnocachesz.yml @@ -5,9 +5,10 @@ actions: - env-assign: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 4096 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00001000 description: | size of NOCACHE section in bytes enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optnullsz.yml b/spec/build/bsps/arm/atsam/optnullsz.yml new file mode 100644 index 0000000000..2182f51011 --- /dev/null +++ b/spec/build/bsps/arm/atsam/optnullsz.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- env-assign: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00000000 +description: | + Size of the NULL pointer protection area in bytes. This memory area reduces + the size of the ITCM available to the application. +enabled-by: true +format: '{:#010x}' +links: [] +name: ATSAM_MEMORY_NULL_SIZE +type: build diff --git a/spec/build/bsps/arm/atsam/optoscmain.yml b/spec/build/bsps/arm/atsam/optoscmain.yml index 4cafffea37..2d8c0bf5c1 100644 --- a/spec/build/bsps/arm/atsam/optoscmain.yml +++ b/spec/build/bsps/arm/atsam/optoscmain.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 12000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 12000000 description: | Main oscillator frequency in Hz (default 12MHz) enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optqspiflashsz.yml b/spec/build/bsps/arm/atsam/optqspiflashsz.yml index a9a71b049f..62cdbd219b 100644 --- a/spec/build/bsps/arm/atsam/optqspiflashsz.yml +++ b/spec/build/bsps/arm/atsam/optqspiflashsz.yml @@ -5,9 +5,10 @@ actions: - env-assign: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 2097152 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00200000 description: | size of QSPI flash in bytes enabled-by: true diff --git a/spec/build/bsps/arm/atsam/optsdram.yml b/spec/build/bsps/arm/atsam/optsdram.yml index c07edd9ba5..bc65280a11 100644 --- a/spec/build/bsps/arm/atsam/optsdram.yml +++ b/spec/build/bsps/arm/atsam/optsdram.yml @@ -9,19 +9,31 @@ actions: "mt48lc16m16a2p-6a": ("ATSAM_SDRAM_MT48LC16M16A2P_6A", 0x02000000), } if value: - try: - s = sdram[value] - except: - conf.fatal("Unkown SDRAM variant '{}'".format(value)) + if value.startswith("custom-"): + name = "ATSAM_SDRAM_CUSTOM" + try: + size = int(value[len("custom-"):], base=0) + s = (name, size) + except Exception as e: + conf.fatal("Invalid SDRAM size '{}': {}".format(value, e)) + else: + try: + s = sdram[value] + except: + conf.fatal("Unkown SDRAM variant '{}'".format(value)) conf.define_cond(s[0], True) conf.env["ATSAM_MEMORY_SDRAM_SIZE"] = s[1] build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: is42s16100e-7bli -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: is42s16100e-7bli description: | - SDRAM variant + SDRAM variant. Known chips are "is42s16100e-7bli", "is42s16320f-7bl", + "mt48lc16m16a2p-6a". You can also set this to "custom-<RAM_SIZE>" (for example + "custom-0x1000000" for a 16MiB RAM). In that case the BOARD_Sdram_Config has + to be overwritten by the application to get working applications. enabled-by: true format: '{}' links: [] diff --git a/spec/build/bsps/arm/atsam/opttcmsz.yml b/spec/build/bsps/arm/atsam/opttcmsz.yml index 7e8b1121e8..ad3b71d8a5 100644 --- a/spec/build/bsps/arm/atsam/opttcmsz.yml +++ b/spec/build/bsps/arm/atsam/opttcmsz.yml @@ -5,11 +5,13 @@ actions: - env-assign: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00000000 description: | - size of tightly coupled memories (TCM) in bytes + Size of tightly coupled memories (TCM) in bytes. Note that the ITCM is + reduced by the ATSAM_MEMORY_NULL_SIZE option. DTCM is unaffected. enabled-by: true format: '{:#010x}' links: [] diff --git a/spec/build/bsps/arm/atsam/optusextal.yml b/spec/build/bsps/arm/atsam/optusextal.yml index 6353956d15..bf4d8e6e98 100644 --- a/spec/build/bsps/arm/atsam/optusextal.yml +++ b/spec/build/bsps/arm/atsam/optusextal.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | Use the external crystal as source for the slow clock instead of the internal RC oscillator. Note that on the ATSAM the NRST pin seems to depend on the slow clock as well as all watchdogs. If ATSAM_SLOWCLOCK_USE_XTAL is set to 1 without a external crystal connected, the controller might hang in the switching process without a working NRST pin. enabled-by: true diff --git a/spec/build/bsps/arm/atsam/tstatsamv.yml b/spec/build/bsps/arm/atsam/tstatsamv.yml index 41d28657e9..2860cfa51e 100644 --- a/spec/build/bsps/arm/atsam/tstatsamv.yml +++ b/spec/build/bsps/arm/atsam/tstatsamv.yml @@ -1,34 +1,42 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - fileio: exclude - flashdisk01: exclude - fsdosfsname01: exclude - ftp01: exclude - jffs2fserror: exclude - jffs2fslink: exclude - jffs2fspatheval: exclude - jffs2fspermission: exclude - jffs2fsrdwr: exclude - jffs2fsscandir01: exclude - jffs2fssymlink: exclude - jffs2fstime: exclude - linpack: exclude - mghttpd01: exclude - pppd: exclude - psxconfig01: exclude - record02: exclude - sp16: exclude - sp25: exclude - sp48: exclude - spregionerr01: exclude - spstkalloc02: exclude - tmfine01: exclude + reason: null + state: exclude + tests: + - fileio + - flashdisk01 + - fsdosfsname01 + - fsjffs2empty01 + - jffs2fserror + - jffs2fslink + - jffs2fspatheval + - jffs2fspermission + - jffs2fsrdwr + - jffs2fsscandir01 + - jffs2fssymlink + - jffs2fstime + - jffs2nandfserror + - jffs2nandfslink + - jffs2nandfspatheval + - jffs2nandfspermission + - jffs2nandfsrdwr + - jffs2nandfsscandir01 + - jffs2nandfssymlink + - jffs2nandfstime + - linpack + - psxconfig01 + - record02 + - sp16 + - sp25 + - sp48 + - spregionerr01 + - spstkalloc02 + - tmfine01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: [] diff --git a/spec/build/bsps/arm/beagle/abi.yml b/spec/build/bsps/arm/beagle/abi.yml index 80b94605e7..4d11c70ee1 100644 --- a/spec/build/bsps/arm/beagle/abi.yml +++ b/spec/build/bsps/arm/beagle/abi.yml @@ -5,10 +5,11 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mcpu=cortex-a8 -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=cortex-a8 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/beagle/bspboardorig.yml b/spec/build/bsps/arm/beagle/bspboardorig.yml index 92eb7001fd..5a823f41ac 100644 --- a/spec/build/bsps/arm/beagle/bspboardorig.yml +++ b/spec/build/bsps/arm/beagle/bspboardorig.yml @@ -4,7 +4,7 @@ bsp: beagleboardorig build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: beagle @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/beagle/bspboardxm.yml b/spec/build/bsps/arm/beagle/bspboardxm.yml index b0869cfbce..338f1c422c 100644 --- a/spec/build/bsps/arm/beagle/bspboardxm.yml +++ b/spec/build/bsps/arm/beagle/bspboardxm.yml @@ -4,7 +4,7 @@ bsp: beagleboardxm build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: beagle @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/beagle/bspboneblack.yml b/spec/build/bsps/arm/beagle/bspboneblack.yml index 7818fdebfa..31a76e9f38 100644 --- a/spec/build/bsps/arm/beagle/bspboneblack.yml +++ b/spec/build/bsps/arm/beagle/bspboneblack.yml @@ -4,7 +4,7 @@ bsp: beagleboneblack build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: beagle @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/beagle/bspbonewhite.yml b/spec/build/bsps/arm/beagle/bspbonewhite.yml index 85ae13cea5..0d1693fd54 100644 --- a/spec/build/bsps/arm/beagle/bspbonewhite.yml +++ b/spec/build/bsps/arm/beagle/bspbonewhite.yml @@ -4,7 +4,7 @@ bsp: beaglebonewhite build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: beagle @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/beagle/grp.yml b/spec/build/bsps/arm/beagle/grp.yml index 3452c3e5c8..16a33f32c8 100644 --- a/spec/build/bsps/arm/beagle/grp.yml +++ b/spec/build/bsps/arm/beagle/grp.yml @@ -1,7 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] @@ -38,6 +41,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../bspopts type: build use-after: [] diff --git a/spec/build/bsps/arm/beagle/obj.yml b/spec/build/bsps/arm/beagle/obj.yml index 5ad859ad8d..0f2f354ab9 100644 --- a/spec/build/bsps/arm/beagle/obj.yml +++ b/spec/build/bsps/arm/beagle/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -11,7 +11,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/beagle/include/bsp.h - - bsps/arm/beagle/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/beagle/include/bsp/bbb-gpio.h @@ -21,6 +20,7 @@ install: - bsps/arm/beagle/include/bsp/irq.h - bsps/arm/beagle/include/bsp/pwmss.h - bsps/arm/beagle/include/bsp/qep.h + - bsps/arm/beagle/include/bsp/spi.h - destination: ${BSP_LIBDIR} source: - bsps/arm/beagle/start/linkcmds @@ -47,7 +47,8 @@ source: - bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c - bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c - bsps/arm/shared/start/bsp-start-memcpy.S -- bsps/shared/dev/btimer/btimer-stub.c +- bsps/arm/shared/start/bspstarthook0-empty.c +- bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/cpucounter/cpucounterfrequency.c - bsps/shared/dev/cpucounter/cpucounterread.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c @@ -59,7 +60,6 @@ source: - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bsp-fdt.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/beagle/optam335x.yml b/spec/build/bsps/arm/beagle/optam335x.yml index 2453aae088..c7b8978950 100644 --- a/spec/build/bsps/arm/beagle/optam335x.yml +++ b/spec/build/bsps/arm/beagle/optam335x.yml @@ -4,12 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/beaglebone.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/beagleboneblack + - arm/beaglebonewhite + value: true +- enabled-by: true + value: false description: | true if SOC is AM335X enabled-by: true diff --git a/spec/build/bsps/arm/beagle/optconbaud.yml b/spec/build/bsps/arm/beagle/optconbaud.yml index 9c3eaff15b..a39a7500bb 100644 --- a/spec/build/bsps/arm/beagle/optconbaud.yml +++ b/spec/build/bsps/arm/beagle/optconbaud.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 115200 description: | initial baud for console UART enabled-by: true diff --git a/spec/build/bsps/arm/beagle/optconpoll.yml b/spec/build/bsps/arm/beagle/optconpoll.yml index 1717792bb8..59973f26ff 100644 --- a/spec/build/bsps/arm/beagle/optconpoll.yml +++ b/spec/build/bsps/arm/beagle/optconpoll.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | polled console i/o (e.g. to run testsuite) enabled-by: true diff --git a/spec/build/bsps/arm/beagle/optdebug.yml b/spec/build/bsps/arm/beagle/optdebug.yml index 54f6c55f9a..b426eca47d 100644 --- a/spec/build/bsps/arm/beagle/optdebug.yml +++ b/spec/build/bsps/arm/beagle/optdebug.yml @@ -4,12 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: false - variants: - - arm/beaglebone.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | Enable BBB debug enabled-by: true diff --git a/spec/build/bsps/arm/beagle/optdm3730.yml b/spec/build/bsps/arm/beagle/optdm3730.yml index 3dd60260f3..d685488341 100644 --- a/spec/build/bsps/arm/beagle/optdm3730.yml +++ b/spec/build/bsps/arm/beagle/optdm3730.yml @@ -4,12 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/beagleboard.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/beagleboardorig + - arm/beagleboardxm + value: true +- enabled-by: true + value: false description: | true if SOC is DM3730 enabled-by: true diff --git a/spec/build/bsps/arm/csb336/abi.yml b/spec/build/bsps/arm/csb336/abi.yml index ccf0bc7ea2..58f541b46b 100644 --- a/spec/build/bsps/arm/csb336/abi.yml +++ b/spec/build/bsps/arm/csb336/abi.yml @@ -5,10 +5,11 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mcpu=arm920 -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=arm920 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/csb336/bspcsb336.yml b/spec/build/bsps/arm/csb336/bspcsb336.yml index ac238c81dd..edfd813227 100644 --- a/spec/build/bsps/arm/csb336/bspcsb336.yml +++ b/spec/build/bsps/arm/csb336/bspcsb336.yml @@ -4,7 +4,7 @@ bsp: csb336 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: csb336 @@ -14,7 +14,6 @@ install: source: - bsps/arm/csb336/include/bsp.h - bsps/arm/csb336/include/mc9328mxl.h - - bsps/arm/csb336/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/csb336/include/bsp/irq.h @@ -34,6 +33,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../opto2 - role: build-dependency uid: ../../bspopts @@ -51,7 +52,6 @@ source: - bsps/shared/dev/getentropy/getentropy-cpucounter.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/bspreset-empty.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c diff --git a/spec/build/bsps/arm/csb336/start.yml b/spec/build/bsps/arm/csb336/start.yml index 7791d5b557..3f037e9291 100644 --- a/spec/build/bsps/arm/csb336/start.yml +++ b/spec/build/bsps/arm/csb336/start.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause asflags: [] build-type: start-file copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true includes: [] diff --git a/spec/build/bsps/arm/csb337/abi.yml b/spec/build/bsps/arm/csb337/abi.yml index ccf0bc7ea2..58f541b46b 100644 --- a/spec/build/bsps/arm/csb337/abi.yml +++ b/spec/build/bsps/arm/csb337/abi.yml @@ -5,10 +5,11 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mcpu=arm920 -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=arm920 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/csb337/bspcsb337.yml b/spec/build/bsps/arm/csb337/bspcsb337.yml index 5665a29ef2..8c77004264 100644 --- a/spec/build/bsps/arm/csb337/bspcsb337.yml +++ b/spec/build/bsps/arm/csb337/bspcsb337.yml @@ -4,7 +4,7 @@ bsp: csb337 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: csb337 @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/csb337/bspcsb637.yml b/spec/build/bsps/arm/csb337/bspcsb637.yml index dd8a4e1659..4c44bacf4f 100644 --- a/spec/build/bsps/arm/csb337/bspcsb637.yml +++ b/spec/build/bsps/arm/csb337/bspcsb637.yml @@ -4,7 +4,7 @@ bsp: csb637 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: csb337 @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/csb337/bspkit637v6.yml b/spec/build/bsps/arm/csb337/bspkit637v6.yml index 375c264880..72ec467eca 100644 --- a/spec/build/bsps/arm/csb337/bspkit637v6.yml +++ b/spec/build/bsps/arm/csb337/bspkit637v6.yml @@ -4,7 +4,7 @@ bsp: kit637_v6 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: csb337 @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/csb337/grp.yml b/spec/build/bsps/arm/csb337/grp.yml index b14f74761a..47c3b68a26 100644 --- a/spec/build/bsps/arm/csb337/grp.yml +++ b/spec/build/bsps/arm/csb337/grp.yml @@ -1,7 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] @@ -44,6 +47,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../bspopts type: build use-after: [] diff --git a/spec/build/bsps/arm/csb337/obj.yml b/spec/build/bsps/arm/csb337/obj.yml index 0c4bbfa51a..3858e4f00d 100644 --- a/spec/build/bsps/arm/csb337/obj.yml +++ b/spec/build/bsps/arm/csb337/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -22,7 +22,6 @@ install: - bsps/arm/csb337/include/font8x16.h - bsps/arm/csb337/include/sed1356.h - bsps/arm/csb337/include/sed1356_16bit.h - - bsps/arm/csb337/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/csb337/include/bsp/irq.h @@ -52,7 +51,6 @@ source: - bsps/shared/dev/serial/legacy-console.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c type: build diff --git a/spec/build/bsps/arm/csb337/objlcd.yml b/spec/build/bsps/arm/csb337/objlcd.yml index 6db16816cd..ffdb42ef46 100644 --- a/spec/build/bsps/arm/csb337/objlcd.yml +++ b/spec/build/bsps/arm/csb337/objlcd.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: diff --git a/spec/build/bsps/arm/csb337/objumon.yml b/spec/build/bsps/arm/csb337/objumon.yml index e7d8c38a96..ccdf6b37d9 100644 --- a/spec/build/bsps/arm/csb337/objumon.yml +++ b/spec/build/bsps/arm/csb337/objumon.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: diff --git a/spec/build/bsps/arm/csb337/objumoncon.yml b/spec/build/bsps/arm/csb337/objumoncon.yml index 93e42a8058..19520a4f11 100644 --- a/spec/build/bsps/arm/csb337/objumoncon.yml +++ b/spec/build/bsps/arm/csb337/objumoncon.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: diff --git a/spec/build/bsps/arm/csb337/optcsb637.yml b/spec/build/bsps/arm/csb337/optcsb637.yml index 5db48e1f0a..2f7bf8dad0 100644 --- a/spec/build/bsps/arm/csb337/optcsb637.yml +++ b/spec/build/bsps/arm/csb337/optcsb637.yml @@ -4,15 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: - arm/kit637_v6 -- value: true - variants: - arm/csb637 + value: true +- enabled-by: true + value: false description: | If defined, this indicates that the BSP is being built for the csb637 variant. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenlcd.yml b/spec/build/bsps/arm/csb337/optenlcd.yml index 40617f7c2f..583112d849 100644 --- a/spec/build/bsps/arm/csb337/optenlcd.yml +++ b/spec/build/bsps/arm/csb337/optenlcd.yml @@ -5,12 +5,10 @@ actions: - env-enable: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: false - variants: - - arm/kit637_v6 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | If defined, enable use of the SED1356 controller and LCD. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenumon.yml b/spec/build/bsps/arm/csb337/optenumon.yml index 8286e0fa4b..54b85fd563 100644 --- a/spec/build/bsps/arm/csb337/optenumon.yml +++ b/spec/build/bsps/arm/csb337/optenumon.yml @@ -5,9 +5,10 @@ actions: - env-enable: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | If defined, enable use of the uMon console. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenumoncon.yml b/spec/build/bsps/arm/csb337/optenumoncon.yml index e2ca577184..9510fdf809 100644 --- a/spec/build/bsps/arm/csb337/optenumoncon.yml +++ b/spec/build/bsps/arm/csb337/optenumoncon.yml @@ -5,9 +5,10 @@ actions: - env-enable: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | If defined, enable use of the MicroMonitor console device. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenusart0.yml b/spec/build/bsps/arm/csb337/optenusart0.yml index cd968f8dbc..331cfcdc53 100644 --- a/spec/build/bsps/arm/csb337/optenusart0.yml +++ b/spec/build/bsps/arm/csb337/optenusart0.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | If defined, enable use of the USART 0. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenusart1.yml b/spec/build/bsps/arm/csb337/optenusart1.yml index 963d2a9742..77879aebbc 100644 --- a/spec/build/bsps/arm/csb337/optenusart1.yml +++ b/spec/build/bsps/arm/csb337/optenusart1.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | If defined, enable use of the USART 1. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenusart2.yml b/spec/build/bsps/arm/csb337/optenusart2.yml index d4ae1fe756..06d4426770 100644 --- a/spec/build/bsps/arm/csb337/optenusart2.yml +++ b/spec/build/bsps/arm/csb337/optenusart2.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | If defined, enable use of the USART 2. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/optenusart3.yml b/spec/build/bsps/arm/csb337/optenusart3.yml index 200824f3e3..db224b2e8c 100644 --- a/spec/build/bsps/arm/csb337/optenusart3.yml +++ b/spec/build/bsps/arm/csb337/optenusart3.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | If defined, enable use of the USART 3. enabled-by: true diff --git a/spec/build/bsps/arm/csb337/start.yml b/spec/build/bsps/arm/csb337/start.yml index 7dd6661d98..7e9de6edcd 100644 --- a/spec/build/bsps/arm/csb337/start.yml +++ b/spec/build/bsps/arm/csb337/start.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause asflags: [] build-type: start-file copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true includes: [] diff --git a/spec/build/bsps/arm/edb7312/abi.yml b/spec/build/bsps/arm/edb7312/abi.yml index ab6ef203fa..562a59aa79 100644 --- a/spec/build/bsps/arm/edb7312/abi.yml +++ b/spec/build/bsps/arm/edb7312/abi.yml @@ -5,10 +5,11 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mcpu=arm7tdmi -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=arm7tdmi description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/edb7312/bspedb7312.yml b/spec/build/bsps/arm/edb7312/bspedb7312.yml index 7587cc9eaa..a86000cbc5 100644 --- a/spec/build/bsps/arm/edb7312/bspedb7312.yml +++ b/spec/build/bsps/arm/edb7312/bspedb7312.yml @@ -4,7 +4,7 @@ bsp: edb7312 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: edb7312 @@ -14,7 +14,6 @@ install: source: - bsps/arm/edb7312/include/bsp.h - bsps/arm/edb7312/include/ep7312.h - - bsps/arm/edb7312/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/edb7312/include/bsp/irq.h @@ -35,6 +34,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../opto2 - role: build-dependency uid: ../../bspopts @@ -55,7 +56,6 @@ source: - bsps/shared/dev/serial/legacy-console.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c type: build diff --git a/spec/build/bsps/arm/edb7312/optskyeye.yml b/spec/build/bsps/arm/edb7312/optskyeye.yml index be55a98c3a..7411775a3e 100644 --- a/spec/build/bsps/arm/edb7312/optskyeye.yml +++ b/spec/build/bsps/arm/edb7312/optskyeye.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | If defined, enable options which optimize executingon the Skyeye simulator. Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized. This significantly reduces the wall time required to execute the RTEMS test suites. enabled-by: true diff --git a/spec/build/bsps/arm/edb7312/start.yml b/spec/build/bsps/arm/edb7312/start.yml index b1270224f1..e19bdd212c 100644 --- a/spec/build/bsps/arm/edb7312/start.yml +++ b/spec/build/bsps/arm/edb7312/start.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause asflags: [] build-type: start-file copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true includes: [] diff --git a/spec/build/bsps/arm/fvp/abi.yml b/spec/build/bsps/arm/fvp/abi.yml index 8cfbb744be..c975163d32 100644 --- a/spec/build/bsps/arm/fvp/abi.yml +++ b/spec/build/bsps/arm/fvp/abi.yml @@ -5,13 +5,14 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mcpu=cortex-r52 -- -mthumb -- -mfloat-abi=hard -- -mfpu=auto -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=cortex-r52 + - -mthumb + - -mfloat-abi=hard + - -mfpu=auto description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/fvp/bspcortexr52.yml b/spec/build/bsps/arm/fvp/bspcortexr52.yml index 01a3d7c3bd..a61cd11cac 100644 --- a/spec/build/bsps/arm/fvp/bspcortexr52.yml +++ b/spec/build/bsps/arm/fvp/bspcortexr52.yml @@ -4,7 +4,7 @@ bsp: fvp_cortex_r52 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: fvp @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/fvp/grp.yml b/spec/build/bsps/arm/fvp/grp.yml index 3759f5e10c..2c11c39dc0 100644 --- a/spec/build/bsps/arm/fvp/grp.yml +++ b/spec/build/bsps/arm/fvp/grp.yml @@ -1,7 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] @@ -22,6 +25,10 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../dev/irq/objarmgicv3 +- role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../optgicspicount - role: build-dependency uid: ../optgicdist diff --git a/spec/build/bsps/arm/fvp/linkcmds.yml b/spec/build/bsps/arm/fvp/linkcmds.yml index 1812866d2d..0729f02f4c 100644 --- a/spec/build/bsps/arm/fvp/linkcmds.yml +++ b/spec/build/bsps/arm/fvp/linkcmds.yml @@ -43,9 +43,11 @@ content: | bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024; + bsp_vector_table_in_start_section = 1; + INCLUDE linkcmds.armv4 copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG enabled-by: true install-path: ${BSP_LIBDIR} links: [] diff --git a/spec/build/bsps/arm/fvp/obj.yml b/spec/build/bsps/arm/fvp/obj.yml index 9e5582ce85..853396cef1 100644 --- a/spec/build/bsps/arm/fvp/obj.yml +++ b/spec/build/bsps/arm/fvp/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -11,7 +11,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/fvp/include/bsp.h - - bsps/arm/fvp/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/fvp/include/bsp/irq.h @@ -34,11 +33,9 @@ source: - bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/clock/arm-generic-timer.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c -- bsps/shared/dev/irq/arm-gicv3.c - bsps/shared/dev/serial/console-termios.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/fvp/objsmp.yml b/spec/build/bsps/arm/fvp/objsmp.yml index b0e58c64d5..ee8bbbed35 100644 --- a/spec/build/bsps/arm/fvp/objsmp.yml +++ b/spec/build/bsps/arm/fvp/objsmp.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: diff --git a/spec/build/bsps/arm/fvp/optdevbegin.yml b/spec/build/bsps/arm/fvp/optdevbegin.yml index d7522d0fd7..bd950e5d50 100644 --- a/spec/build/bsps/arm/fvp/optdevbegin.yml +++ b/spec/build/bsps/arm/fvp/optdevbegin.yml @@ -7,12 +7,12 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 436207616 -default-by-variant: -- value: 2583691264 - variants: - - arm/fvp_cortex_r52 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0x9a000000 +- enabled-by: true + value: 0x1a000000 description: | Defines the begin address of the device area. enabled-by: true diff --git a/spec/build/bsps/arm/fvp/optdevsize.yml b/spec/build/bsps/arm/fvp/optdevsize.yml index ca6468510c..e206db80b0 100644 --- a/spec/build/bsps/arm/fvp/optdevsize.yml +++ b/spec/build/bsps/arm/fvp/optdevsize.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 354418688 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x15200000 description: | Defines the size in bytes of the device area. enabled-by: true diff --git a/spec/build/bsps/arm/fvp/optdrambegin.yml b/spec/build/bsps/arm/fvp/optdrambegin.yml index 7a44b2086f..3d2aa20dc7 100644 --- a/spec/build/bsps/arm/fvp/optdrambegin.yml +++ b/spec/build/bsps/arm/fvp/optdrambegin.yml @@ -6,12 +6,12 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 2147483648 -default-by-variant: -- value: 1024 - variants: - - arm/fvp_cortex_r52 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0x00000400 +- enabled-by: true + value: 0x80000000 description: | Defines the begin address of the DRAM. The begin address must take the size of the NULL pointer protection area into account (ARM_FVP_MEMORY_NULL_SIZE). diff --git a/spec/build/bsps/arm/fvp/optdramsize.yml b/spec/build/bsps/arm/fvp/optdramsize.yml index 9ae2a8afe8..60d03e7d71 100644 --- a/spec/build/bsps/arm/fvp/optdramsize.yml +++ b/spec/build/bsps/arm/fvp/optdramsize.yml @@ -6,12 +6,12 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 33554432 -default-by-variant: -- value: 33553408 - variants: - - arm/fvp_cortex_r52 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0x01fffc00 +- enabled-by: true + value: 0x02000000 description: | Defines the size in bytes of the DRAM. Increasing the size may increase the startup time of the FVP. The size must take the size of the NULL pointer diff --git a/spec/build/bsps/arm/fvp/optnullsize.yml b/spec/build/bsps/arm/fvp/optnullsize.yml index 3d6b60b7eb..9a69cb4c0b 100644 --- a/spec/build/bsps/arm/fvp/optnullsize.yml +++ b/spec/build/bsps/arm/fvp/optnullsize.yml @@ -6,12 +6,12 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1048576 -default-by-variant: -- value: 1024 - variants: - - arm/fvp_cortex_r52 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0x00000400 +- enabled-by: true + value: 0x00100000 description: | Defines the size in bytes of the NULL pointer protection area. enabled-by: true diff --git a/spec/build/bsps/arm/grp.yml b/spec/build/bsps/arm/grp.yml index dbd21638fd..a48cd80d74 100644 --- a/spec/build/bsps/arm/grp.yml +++ b/spec/build/bsps/arm/grp.yml @@ -1,17 +1,22 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: - destination: ${BSP_INCLUDEDIR} source: + - bsps/arm/include/cachel1_armv7.h + - bsps/arm/include/cmsis_compiler.h - bsps/arm/include/cmsis_gcc.h + - bsps/arm/include/cmsis_version.h - bsps/arm/include/core_cm7.h - - bsps/arm/include/core_cmFunc.h - - bsps/arm/include/core_cmInstr.h - - bsps/arm/include/core_cmSimd.h + - bsps/arm/include/core_cm4.h + - bsps/arm/include/mpu_armv7.h - bsps/arm/include/uart.h - destination: ${BSP_INCLUDEDIR}/bsp source: diff --git a/spec/build/bsps/arm/gumstix/abi.yml b/spec/build/bsps/arm/gumstix/abi.yml index 41a3903894..2338e871ef 100644 --- a/spec/build/bsps/arm/gumstix/abi.yml +++ b/spec/build/bsps/arm/gumstix/abi.yml @@ -5,10 +5,11 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mcpu=xscale -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=xscale description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/gumstix/bspgumstix.yml b/spec/build/bsps/arm/gumstix/bspgumstix.yml index 4d0c380860..7946a64ed4 100644 --- a/spec/build/bsps/arm/gumstix/bspgumstix.yml +++ b/spec/build/bsps/arm/gumstix/bspgumstix.yml @@ -4,7 +4,7 @@ bsp: gumstix build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: gumstix @@ -15,7 +15,6 @@ install: - bsps/arm/gumstix/include/bsp.h - bsps/arm/gumstix/include/ffuart.h - bsps/arm/gumstix/include/pxa255.h - - bsps/arm/gumstix/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/gumstix/include/bsp/irq.h @@ -36,6 +35,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../opto2 - role: build-dependency uid: ../../bspopts @@ -59,7 +60,6 @@ source: - bsps/shared/dev/serial/legacy-console.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c type: build diff --git a/spec/build/bsps/arm/gumstix/optskyeye.yml b/spec/build/bsps/arm/gumstix/optskyeye.yml index be55a98c3a..7411775a3e 100644 --- a/spec/build/bsps/arm/gumstix/optskyeye.yml +++ b/spec/build/bsps/arm/gumstix/optskyeye.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | If defined, enable options which optimize executingon the Skyeye simulator. Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized. This significantly reduces the wall time required to execute the RTEMS test suites. enabled-by: true diff --git a/spec/build/bsps/arm/gumstix/start.yml b/spec/build/bsps/arm/gumstix/start.yml index e663028666..574c018b77 100644 --- a/spec/build/bsps/arm/gumstix/start.yml +++ b/spec/build/bsps/arm/gumstix/start.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause asflags: [] build-type: start-file copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true includes: [] diff --git a/spec/build/bsps/arm/imx/abi.yml b/spec/build/bsps/arm/imx/abi.yml index 169a5e6584..2bd1f0e038 100644 --- a/spec/build/bsps/arm/imx/abi.yml +++ b/spec/build/bsps/arm/imx/abi.yml @@ -5,14 +5,15 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -- -mtune=cortex-a7 -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard + - -mtune=cortex-a7 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/imx/bspimx.yml b/spec/build/bsps/arm/imx/bspimx.yml index 79d09a3eb4..51c2413409 100644 --- a/spec/build/bsps/arm/imx/bspimx.yml +++ b/spec/build/bsps/arm/imx/bspimx.yml @@ -4,7 +4,7 @@ bsp: imx7 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: imx @@ -13,7 +13,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/imx/include/bsp.h - - bsps/arm/imx/include/tm27.h - destination: ${BSP_INCLUDEDIR}/arm/freescale/imx source: - bsps/arm/imx/include/arm/freescale/imx/imx_ccmvar.h @@ -23,6 +22,7 @@ install: - bsps/arm/imx/include/arm/freescale/imx/imx_srcreg.h - bsps/arm/imx/include/arm/freescale/imx/imx_uartreg.h - bsps/arm/imx/include/arm/freescale/imx/imx_wdogreg.h + - bsps/arm/imx/include/arm/freescale/imx/imx6ul_ccmreg.h - bsps/arm/include/arm/freescale/imx/imx_iomuxreg.h - bsps/arm/include/arm/freescale/imx/imx_iomuxvar.h - destination: ${BSP_INCLUDEDIR}/bsp @@ -80,6 +80,8 @@ links: uid: ../../opto2 - role: build-dependency uid: ../../bspopts +- role: build-dependency + uid: ../../tst-xfail-dl06 source: - bsps/arm/imx/console/console-config.c - bsps/arm/imx/i2c/imx-i2c.c @@ -96,16 +98,19 @@ source: - bsps/arm/shared/pins/imx-gpio.c - bsps/arm/shared/pins/imx_iomux.c - bsps/arm/shared/start/bsp-start-memcpy.S -- bsps/shared/dev/btimer/btimer-stub.c +- bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/clock/arm-generic-timer.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c - bsps/shared/dev/irq/arm-gicv2.c - bsps/shared/dev/irq/arm-gicv2-get-attributes.c +- bsps/shared/dev/rtc/rtc-support.c - bsps/shared/dev/serial/console-termios.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bsp-fdt.c - bsps/shared/start/bspfatal-default.c - bsps/shared/start/gettargethash-default.c +- bsps/shared/start/mallocinitone.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c +- bsps/shared/start/wkspaceinitone.c type: build diff --git a/spec/build/bsps/arm/imx/objsmp.yml b/spec/build/bsps/arm/imx/objsmp.yml index 80dd811ddc..c0c76fdf88 100644 --- a/spec/build/bsps/arm/imx/objsmp.yml +++ b/spec/build/bsps/arm/imx/objsmp.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: diff --git a/spec/build/bsps/arm/imx/optcachedata.yml b/spec/build/bsps/arm/imx/optcachedata.yml index 1664b0fc31..01b4959995 100644 --- a/spec/build/bsps/arm/imx/optcachedata.yml +++ b/spec/build/bsps/arm/imx/optcachedata.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: - - arm/.*qemu +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable data cache enabled-by: true diff --git a/spec/build/bsps/arm/imx/optcacheinst.yml b/spec/build/bsps/arm/imx/optcacheinst.yml index b191133af9..62607fb235 100644 --- a/spec/build/bsps/arm/imx/optcacheinst.yml +++ b/spec/build/bsps/arm/imx/optcacheinst.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: - - arm/.*qemu +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable instruction cache enabled-by: true diff --git a/spec/build/bsps/arm/imx/optccmahb.yml b/spec/build/bsps/arm/imx/optccmahb.yml index a515a44204..e5a4346836 100644 --- a/spec/build/bsps/arm/imx/optccmahb.yml +++ b/spec/build/bsps/arm/imx/optccmahb.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 135000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 135000000 description: | AHB clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/imx/optcmmecspi.yml b/spec/build/bsps/arm/imx/optcmmecspi.yml index 1f32305aef..0ed3d6d7f4 100644 --- a/spec/build/bsps/arm/imx/optcmmecspi.yml +++ b/spec/build/bsps/arm/imx/optcmmecspi.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 67500000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 67500000 description: | ECSPI clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/imx/optcmmipg.yml b/spec/build/bsps/arm/imx/optcmmipg.yml index 8c62921ef6..87234ccc2c 100644 --- a/spec/build/bsps/arm/imx/optcmmipg.yml +++ b/spec/build/bsps/arm/imx/optcmmipg.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 67500000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 67500000 description: | IPG clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/imx/optcmmsdhci.yml b/spec/build/bsps/arm/imx/optcmmsdhci.yml index fa06f8111a..0636a068d5 100644 --- a/spec/build/bsps/arm/imx/optcmmsdhci.yml +++ b/spec/build/bsps/arm/imx/optcmmsdhci.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 196363000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 196363000 description: | SDHCI clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/imx/optcmmuart.yml b/spec/build/bsps/arm/imx/optcmmuart.yml index ab69c87323..8dcc260d59 100644 --- a/spec/build/bsps/arm/imx/optcmmuart.yml +++ b/spec/build/bsps/arm/imx/optcmmuart.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 24000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 24000000 description: | UART clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/imx/optconirq.yml b/spec/build/bsps/arm/imx/optconirq.yml index d94a5d20d9..28c4e02e1d 100644 --- a/spec/build/bsps/arm/imx/optconirq.yml +++ b/spec/build/bsps/arm/imx/optconirq.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 1 description: | use interrupt driven mode for console devices (used by default) enabled-by: true diff --git a/spec/build/bsps/arm/imx/optresetvec.yml b/spec/build/bsps/arm/imx/optresetvec.yml index efd1ea2b2a..206a6f2801 100644 --- a/spec/build/bsps/arm/imx/optresetvec.yml +++ b/spec/build/bsps/arm/imx/optresetvec.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/imxrt/abi.yml b/spec/build/bsps/arm/imxrt/abi.yml index 7a95742c36..00dd2cbac3 100644 --- a/spec/build/bsps/arm/imxrt/abi.yml +++ b/spec/build/bsps/arm/imxrt/abi.yml @@ -5,13 +5,14 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mthumb -- -mcpu=cortex-m7 -- -mfpu=fpv5-d16 -- -mfloat-abi=hard -default-by-variant: [] +- enabled-by: true + value: + - -mthumb + - -mcpu=cortex-m7 + - -mfpu=fpv5-d16 + - -mfloat-abi=hard description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/imxrt/bspimxrt.yml b/spec/build/bsps/arm/imxrt/bspimxrt.yml deleted file mode 100644 index 30d690e0e2..0000000000 --- a/spec/build/bsps/arm/imxrt/bspimxrt.yml +++ /dev/null @@ -1,268 +0,0 @@ -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -arch: arm -bsp: imxrt1052 -build-type: bsp -cflags: [] -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -cppflags: [] -enabled-by: true -family: imxrt -includes: [] -install: -- destination: ${BSP_INCLUDEDIR} - source: - - bsps/arm/imxrt/include/bsp.h - - bsps/arm/imxrt/include/chip.h - - bsps/arm/imxrt/include/fsl_adc_etc.h - - bsps/arm/imxrt/include/fsl_adc.h - - bsps/arm/imxrt/include/fsl_aipstz.h - - bsps/arm/imxrt/include/fsl_aoi.h - - bsps/arm/imxrt/include/fsl_bee.h - - bsps/arm/imxrt/include/fsl_cache.h - - bsps/arm/imxrt/include/fsl_clock.h - - bsps/arm/imxrt/include/fsl_clock_config.h - - bsps/arm/imxrt/include/fsl_cmp.h - - bsps/arm/imxrt/include/fsl_common.h - - bsps/arm/imxrt/include/fsl_csi.h - - bsps/arm/imxrt/include/fsl_dcdc.h - - bsps/arm/imxrt/include/fsl_dcp.h - - bsps/arm/imxrt/include/fsl_device_registers.h - - bsps/arm/imxrt/include/fsl_dmamux.h - - bsps/arm/imxrt/include/fsl_edma.h - - bsps/arm/imxrt/include/fsl_elcdif.h - - bsps/arm/imxrt/include/fsl_enc.h - - bsps/arm/imxrt/include/fsl_enet.h - - bsps/arm/imxrt/include/fsl_ewm.h - - bsps/arm/imxrt/include/fsl_flexcan.h - - bsps/arm/imxrt/include/fsl_flexio_camera_edma.h - - bsps/arm/imxrt/include/fsl_flexio_camera.h - - bsps/arm/imxrt/include/fsl_flexio.h - - bsps/arm/imxrt/include/fsl_flexio_i2c_master.h - - bsps/arm/imxrt/include/fsl_flexio_i2s_edma.h - - bsps/arm/imxrt/include/fsl_flexio_i2s.h - - bsps/arm/imxrt/include/fsl_flexio_mculcd_edma.h - - bsps/arm/imxrt/include/fsl_flexio_mculcd.h - - bsps/arm/imxrt/include/fsl_flexio_spi_edma.h - - bsps/arm/imxrt/include/fsl_flexio_spi.h - - bsps/arm/imxrt/include/fsl_flexio_uart_edma.h - - bsps/arm/imxrt/include/fsl_flexio_uart.h - - bsps/arm/imxrt/include/fsl_flexram_allocate.h - - bsps/arm/imxrt/include/fsl_flexram.h - - bsps/arm/imxrt/include/fsl_flexspi.h - - bsps/arm/imxrt/include/fsl_flexspi_nor_boot.h - - bsps/arm/imxrt/include/fsl_gpc.h - - bsps/arm/imxrt/include/fsl_gpio.h - - bsps/arm/imxrt/include/fsl_gpt.h - - bsps/arm/imxrt/include/fsl_iomuxc.h - - bsps/arm/imxrt/include/fsl_kpp.h - - bsps/arm/imxrt/include/fsl_lpi2c_edma.h - - bsps/arm/imxrt/include/fsl_lpi2c.h - - bsps/arm/imxrt/include/fsl_lpspi_edma.h - - bsps/arm/imxrt/include/fsl_lpspi.h - - bsps/arm/imxrt/include/fsl_lpuart_edma.h - - bsps/arm/imxrt/include/fsl_lpuart.h - - bsps/arm/imxrt/include/fsl_ocotp.h - - bsps/arm/imxrt/include/fsl_pin_mux.h - - bsps/arm/imxrt/include/fsl_pit.h - - bsps/arm/imxrt/include/fsl_pmu.h - - bsps/arm/imxrt/include/fsl_pwm.h - - bsps/arm/imxrt/include/fsl_pxp.h - - bsps/arm/imxrt/include/fsl_qtmr.h - - bsps/arm/imxrt/include/fsl_rtwdog.h - - bsps/arm/imxrt/include/fsl_sai_edma.h - - bsps/arm/imxrt/include/fsl_sai.h - - bsps/arm/imxrt/include/fsl_semc.h - - bsps/arm/imxrt/include/fsl_snvs_hp.h - - bsps/arm/imxrt/include/fsl_snvs_lp.h - - bsps/arm/imxrt/include/fsl_spdif_edma.h - - bsps/arm/imxrt/include/fsl_spdif.h - - bsps/arm/imxrt/include/fsl_src.h - - bsps/arm/imxrt/include/fsl_tempmon.h - - bsps/arm/imxrt/include/fsl_trng.h - - bsps/arm/imxrt/include/fsl_tsc.h - - bsps/arm/imxrt/include/fsl_usdhc.h - - bsps/arm/imxrt/include/fsl_wdog.h - - bsps/arm/imxrt/include/fsl_xbara.h - - bsps/arm/imxrt/include/fsl_xbarb.h - - bsps/arm/imxrt/include/MIMXRT1052_features.h - - bsps/arm/imxrt/include/MIMXRT1052.h - - bsps/arm/imxrt/include/system_MIMXRT1052.h - - bsps/arm/imxrt/include/tm27.h -- destination: ${BSP_INCLUDEDIR}/arm/freescale/imx - source: - - bsps/arm/include/arm/freescale/imx/imx_iomuxreg.h - - bsps/arm/include/arm/freescale/imx/imx_iomuxvar.h -- destination: ${BSP_INCLUDEDIR}/bsp - source: - - bsps/arm/imxrt/include/bsp/flash-headers.h - - bsps/arm/imxrt/include/bsp/irq.h - - bsps/arm/include/bsp/imx-gpio.h - - bsps/arm/include/bsp/imx-iomux.h -- destination: ${BSP_INCLUDEDIR}/imxrt - source: - - bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi - - bsps/arm/imxrt/include/imxrt/imxrt1050-pinfunc.h - - bsps/arm/imxrt/include/imxrt/lpspi.h - - bsps/arm/imxrt/include/imxrt/memory.h - - bsps/arm/imxrt/include/imxrt/mpu-config.h -- destination: ${BSP_LIBDIR} - source: - - bsps/arm/imxrt/start/linkcmds.flexspi - - bsps/arm/imxrt/start/linkcmds.ocram - - bsps/arm/imxrt/start/linkcmds.sdram -links: -- role: build-dependency - uid: ../grp -- role: build-dependency - uid: abi -- role: build-dependency - uid: ../../optconsolebaud -- role: build-dependency - uid: ../../optconsoleirq -- role: build-dependency - uid: optfsledmaemlm -- role: build-dependency - uid: optlinkcmds -- role: build-dependency - uid: optmemdtcmsz -- role: build-dependency - uid: optmemextramnocachesz -- role: build-dependency - uid: optmemextramorigin -- role: build-dependency - uid: optmemextramsz -- role: build-dependency - uid: optmemflashcfgsz -- role: build-dependency - uid: optmemflashivtsz -- role: build-dependency - uid: optmemflashorigin -- role: build-dependency - uid: optmemflashsz -- role: build-dependency - uid: optmemitcmsz -- role: build-dependency - uid: optmemnullsz -- role: build-dependency - uid: optmemocramnocachesz -- role: build-dependency - uid: optmemocramsz -- role: build-dependency - uid: ../start -- role: build-dependency - uid: ../../obj -- role: build-dependency - uid: ../../objirq -- role: build-dependency - uid: ../../objdevfsledma -- role: build-dependency - uid: ../../opto2 -- role: build-dependency - uid: linkcmds -- role: build-dependency - uid: linkcmdsmemory -- role: build-dependency - uid: ../../bspopts -source: -- bsps/arm/imxrt/console/console.c -- bsps/arm/imxrt/dts/imxrt1050-evkb.c -- bsps/arm/imxrt/i2c/imxrt-lpi2c.c -- bsps/arm/imxrt/nxp/boards/evkbimxrt1050/clock_config.c -- bsps/arm/imxrt/nxp/boards/evkbimxrt1050/pin_mux.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_adc.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_adc_etc.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_aipstz.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_aoi.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_bee.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_cache.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_clock.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_cmp.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_common.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_csi.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_dcdc.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_dcp.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_dmamux.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_edma.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_elcdif.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_enc.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_enet.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_ewm.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexcan.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexio.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexio_camera.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexio_camera_edma.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexio_i2c_master.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexio_i2s.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexio_i2s_edma.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexio_mculcd.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexio_mculcd_edma.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexio_spi.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexio_spi_edma.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexio_uart.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexio_uart_edma.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexram.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexram_allocate.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_flexspi.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_gpc.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_gpio.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_gpt.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_kpp.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpi2c.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpi2c_edma.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpspi.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpspi_edma.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpuart.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_lpuart_edma.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_ocotp.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_pit.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_pmu.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_pwm.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_pxp.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_qtmr.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_rtwdog.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_sai.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_sai_edma.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_semc.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_snvs_hp.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_snvs_lp.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_spdif.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_spdif_edma.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_src.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_tempmon.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_trng.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_tsc.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_usdhc.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_wdog.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_xbara.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/drivers/fsl_xbarb.c -- bsps/arm/imxrt/nxp/devices/MIMXRT1052/xip/fsl_flexspi_nor_boot.c -- bsps/arm/imxrt/spi/imxrt-lpspi.c -- bsps/arm/imxrt/start/bspstart.c -- bsps/arm/imxrt/start/bspstarthooks.c -- bsps/arm/imxrt/start/clock-arm-pll-config.c -- bsps/arm/imxrt/start/flash-boot-data.c -- bsps/arm/imxrt/start/flash-dcd.c -- bsps/arm/imxrt/start/flash-flexspi-config.c -- bsps/arm/imxrt/start/flash-ivt.c -- bsps/arm/imxrt/start/imxrt-ffec-init.c -- bsps/arm/imxrt/start/mpu-config.c -- bsps/arm/shared/cache/cache-v7m.c -- bsps/arm/shared/clock/clock-armv7m.c -- bsps/arm/shared/cpucounter/cpucounter-armv7m.c -- bsps/arm/shared/irq/irq-armv7m.c -- bsps/arm/shared/irq/irq-dispatch-armv7m.c -- bsps/arm/shared/pins/imx-gpio.c -- bsps/arm/shared/pins/imx_iomux.c -- bsps/arm/shared/start/bsp-start-memcpy.S -- bsps/arm/shared/start/bspreset-armv7m.c -- bsps/shared/dev/btimer/btimer-stub.c -- bsps/shared/dev/getentropy/getentropy-cpucounter.c -- bsps/shared/dev/serial/console-termios.c -- bsps/shared/irq/irq-default-handler.c -- bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c -- bsps/shared/start/gettargethash-default.c -- bsps/shared/start/sbrk.c -- bsps/shared/start/stackalloc.c -type: build diff --git a/spec/build/bsps/arm/imxrt/bspimxrt1052.yml b/spec/build/bsps/arm/imxrt/bspimxrt1052.yml new file mode 100644 index 0000000000..8413b4bef1 --- /dev/null +++ b/spec/build/bsps/arm/imxrt/bspimxrt1052.yml @@ -0,0 +1,32 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: imxrt1052 +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2020, 2023 embedded brains GmbH & Co. KG +cppflags: [] +enabled-by: true +family: imxrt +includes: +- bsps/arm/imxrt/mcux-sdk/drivers/common +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052 +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/drivers +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/xip +install: +- destination: ${BSP_INCLUDEDIR}/imxrt + source: + - bsps/arm/imxrt/dts/imxrt1050-evkb.dts + - bsps/arm/imxrt/include/imxrt/imxrt1050.dtsi + - bsps/arm/imxrt/include/imxrt/imxrt1050-pinfunc.h +links: +- role: build-dependency + uid: obj-mimxrt1052 +source: +- bsps/arm/imxrt/boards/evkbimxrt1050/clock_config.c +- bsps/arm/imxrt/boards/evkbimxrt1050/flash-dcd.c +- bsps/arm/imxrt/boards/evkbimxrt1050/flash-flexspi-config.c +- bsps/arm/imxrt/boards/evkbimxrt1050/pin_mux.c +- bsps/arm/imxrt/boards/evkbimxrt1050/clock-arm-pll-config.c +- bsps/arm/imxrt/dts/imxrt1050-evkb.c +type: build diff --git a/spec/build/bsps/arm/imxrt/bspimxrt1166-cm7-saltshaker.yml b/spec/build/bsps/arm/imxrt/bspimxrt1166-cm7-saltshaker.yml new file mode 100644 index 0000000000..d0b1f51741 --- /dev/null +++ b/spec/build/bsps/arm/imxrt/bspimxrt1166-cm7-saltshaker.yml @@ -0,0 +1,32 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: imxrt1166-cm7-saltshaker +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +cppflags: [] +enabled-by: true +family: imxrt +includes: +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166 +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/xip +- bsps/arm/imxrt/mcux-sdk/drivers/common +- bsps/arm/imxrt/mcux-sdk/drivers/semc +install: +- destination: ${BSP_INCLUDEDIR}/imxrt + source: + - bsps/arm/imxrt/dts/imxrt1166-cm7-saltshaker.dts + - bsps/arm/imxrt/include/imxrt/imxrt1166.dtsi + - bsps/arm/imxrt/include/imxrt/imxrt1166-pinfunc.h +links: +- role: build-dependency + uid: obj-mimxrt1166-cm7 +source: +- bsps/arm/imxrt/boards/saltshaker/clock_config.c +- bsps/arm/imxrt/boards/saltshaker/dcd.c +- bsps/arm/imxrt/boards/saltshaker/flash-flexspi-config.c +- bsps/arm/imxrt/boards/saltshaker/pin_mux.c +- bsps/arm/imxrt/dts/imxrt1166-cm7-saltshaker.c +type: build diff --git a/spec/build/bsps/arm/imxrt/grp.yml b/spec/build/bsps/arm/imxrt/grp.yml new file mode 100644 index 0000000000..12e50c5376 --- /dev/null +++ b/spec/build/bsps/arm/imxrt/grp.yml @@ -0,0 +1,81 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: group +cflags: [] +copyrights: +- Copyright (C) 2020, 2023 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] +enabled-by: true +includes: [] +install: [] +ldflags: [] +links: +- role: build-dependency + uid: ../grp +- role: build-dependency + uid: abi +- role: build-dependency + uid: obj +- role: build-dependency + uid: ../../optconsolebaud +- role: build-dependency + uid: ../../optconsoleirq +- role: build-dependency + uid: optfsledmaemlm +- role: build-dependency + uid: optlinkcmds +- role: build-dependency + uid: optlpspimaxcs +- role: build-dependency + uid: optmemdtcmsz +- role: build-dependency + uid: optmemextramnocachesz +- role: build-dependency + uid: optmemextramorigin +- role: build-dependency + uid: optmemextramsz +- role: build-dependency + uid: optmemflashcfgoffset +- role: build-dependency + uid: optmemflashivtoffset +- role: build-dependency + uid: optmemflashivtsz +- role: build-dependency + uid: optmemflashorigin +- role: build-dependency + uid: optmemflashsz +- role: build-dependency + uid: optmemitcmsz +- role: build-dependency + uid: optmemnullsz +- role: build-dependency + uid: optmemocramnocachesz +- role: build-dependency + uid: optmemocramorigin +- role: build-dependency + uid: optmemocramsz +- role: build-dependency + uid: optvariant +- role: build-dependency + uid: ../start +- role: build-dependency + uid: ../../obj +- role: build-dependency + uid: ../../objirq +- role: build-dependency + uid: ../../objdevfsledma +- role: build-dependency + uid: ../../objmem +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: linkcmds +- role: build-dependency + uid: linkcmdsmemory +- role: build-dependency + uid: ../optmpuctrl +- role: build-dependency + uid: ../../bspopts +type: build +use-after: [] +use-before: [] diff --git a/spec/build/bsps/arm/imxrt/linkcmds.yml b/spec/build/bsps/arm/imxrt/linkcmds.yml index 3e57b9fd7c..b04e5a7f89 100644 --- a/spec/build/bsps/arm/imxrt/linkcmds.yml +++ b/spec/build/bsps/arm/imxrt/linkcmds.yml @@ -1,11 +1,11 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: config-file content: | INCLUDE ${IMXRT_DEFAULT_LINKCMDS} +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG enabled-by: true install-path: ${BSP_LIBDIR} links: [] target: linkcmds type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/linkcmdsmemory.yml b/spec/build/bsps/arm/imxrt/linkcmdsmemory.yml index 6b4a36955a..967423ed6b 100644 --- a/spec/build/bsps/arm/imxrt/linkcmdsmemory.yml +++ b/spec/build/bsps/arm/imxrt/linkcmdsmemory.yml @@ -1,15 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: config-file content: | MEMORY { NULL : ORIGIN = 0x00000000, LENGTH = ${IMXRT_MEMORY_NULL_SIZE:#010x} ITCM : ORIGIN = ${IMXRT_MEMORY_NULL_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_ITCM_SIZE:#010x} DTCM : ORIGIN = 0x20000000, LENGTH = ${IMXRT_MEMORY_DTCM_SIZE:#010x} - OCRAM : ORIGIN = 0x20200000, LENGTH = ${IMXRT_MEMORY_OCRAM_SIZE:#010x} - ${IMXRT_MEMORY_OCRAM_NOCACHE_SIZE:#010x} - OCRAM_NOCACHE : ORIGIN = 0x20200000 + ${IMXRT_MEMORY_OCRAM_SIZE:#010x} - ${IMXRT_MEMORY_OCRAM_NOCACHE_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_OCRAM_NOCACHE_SIZE:#010x} + OCRAM : ORIGIN = ${IMXRT_MEMORY_OCRAM_ORIGIN:#010x}, LENGTH = ${IMXRT_MEMORY_OCRAM_SIZE:#010x} - ${IMXRT_MEMORY_OCRAM_NOCACHE_SIZE:#010x} + OCRAM_NOCACHE : ORIGIN = ${IMXRT_MEMORY_OCRAM_ORIGIN:#010x} + ${IMXRT_MEMORY_OCRAM_SIZE:#010x} - ${IMXRT_MEMORY_OCRAM_NOCACHE_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_OCRAM_NOCACHE_SIZE:#010x} PERIPHERAL : ORIGIN = 0x40000000, LENGTH = 0x20000000 - FLASH_CONFIG : ORIGIN = ${IMXRT_MEMORY_FLASH_ORIGIN:#010x}, LENGTH = ${IMXRT_MEMORY_FLASH_CFG_SIZE:#010x} - FLASH_IVT : ORIGIN = ${IMXRT_MEMORY_FLASH_ORIGIN:#010x} + ${IMXRT_MEMORY_FLASH_CFG_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_FLASH_IVT_SIZE:#010x} - FLASH : ORIGIN = ${IMXRT_MEMORY_FLASH_ORIGIN:#010x} + ${IMXRT_MEMORY_FLASH_CFG_SIZE:#010x} + ${IMXRT_MEMORY_FLASH_IVT_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_FLASH_SIZE:#010x} - ${IMXRT_MEMORY_FLASH_CFG_SIZE:#010x} - ${IMXRT_MEMORY_FLASH_IVT_SIZE:#010x} + FLASH_RAW : ORIGIN = ${IMXRT_MEMORY_FLASH_ORIGIN:#010x}, LENGTH = ${IMXRT_MEMORY_FLASH_SIZE:#010x} + FLASH_CONFIG : ORIGIN = ${IMXRT_MEMORY_FLASH_ORIGIN:#010x} + ${IMXRT_MEMORY_FLASH_CFG_OFFSET:#010x}, LENGTH = ${IMXRT_MEMORY_FLASH_IVT_OFFSET:#010x} - ${IMXRT_MEMORY_FLASH_CFG_OFFSET:#010x} + FLASH_IVT : ORIGIN = ${IMXRT_MEMORY_FLASH_ORIGIN:#010x} + ${IMXRT_MEMORY_FLASH_IVT_OFFSET:#010x}, LENGTH = ${IMXRT_MEMORY_FLASH_IVT_SIZE:#010x} + FLASH : ORIGIN = ${IMXRT_MEMORY_FLASH_ORIGIN:#010x} + ${IMXRT_MEMORY_FLASH_IVT_OFFSET:#010x} + ${IMXRT_MEMORY_FLASH_IVT_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_FLASH_SIZE:#010x} - ${IMXRT_MEMORY_FLASH_IVT_OFFSET:#010x} - ${IMXRT_MEMORY_FLASH_IVT_SIZE:#010x} EXTRAM : ORIGIN = ${IMXRT_MEMORY_EXTRAM_ORIGIN:#010x}, LENGTH = ${IMXRT_MEMORY_EXTRAM_SIZE:#010x} - ${IMXRT_MEMORY_EXTRAM_NOCACHE_SIZE:#010x} EXTRAM_NOCACHE : ORIGIN = ${IMXRT_MEMORY_EXTRAM_ORIGIN:#010x} + ${IMXRT_MEMORY_EXTRAM_SIZE:#010x} - ${IMXRT_MEMORY_EXTRAM_NOCACHE_SIZE:#010x}, LENGTH = ${IMXRT_MEMORY_EXTRAM_NOCACHE_SIZE:#010x} } @@ -38,6 +40,10 @@ content: | imxrt_memory_peripheral_end = ORIGIN (PERIPHERAL) + LENGTH (PERIPHERAL); imxrt_memory_peripheral_size = LENGTH (PERIPHERAL); + imxrt_memory_flash_raw_begin = ORIGIN (FLASH_RAW); + imxrt_memory_flash_raw_end = ORIGIN (FLASH_RAW) + LENGTH (FLASH_RAW); + imxrt_memory_flash_raw_size = LENGTH (FLASH_RAW); + imxrt_memory_flash_config_begin = ORIGIN (FLASH_CONFIG); imxrt_memory_flash_config_end = ORIGIN (FLASH_CONFIG) + LENGTH (FLASH_CONFIG); imxrt_memory_flash_config_size = LENGTH (FLASH_CONFIG); @@ -57,11 +63,10 @@ content: | imxrt_memory_extram_nocache_begin = ORIGIN (EXTRAM_NOCACHE); imxrt_memory_extram_nocache_end = ORIGIN (EXTRAM_NOCACHE) + LENGTH (EXTRAM_NOCACHE); imxrt_memory_extram_nocache_size = LENGTH (EXTRAM_NOCACHE); +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG enabled-by: true install-path: ${BSP_LIBDIR} links: [] target: linkcmds.memory type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/obj-mimxrt1052.yml b/spec/build/bsps/arm/imxrt/obj-mimxrt1052.yml new file mode 100644 index 0000000000..35b468eb75 --- /dev/null +++ b/spec/build/bsps/arm/imxrt/obj-mimxrt1052.yml @@ -0,0 +1,209 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] +enabled-by: true +includes: +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052 +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/drivers +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/xip +- bsps/arm/imxrt/mcux-sdk/drivers/adc_12b1msps_sar +- bsps/arm/imxrt/mcux-sdk/drivers/adc_etc +- bsps/arm/imxrt/mcux-sdk/drivers/aoi +- bsps/arm/imxrt/mcux-sdk/drivers/bee +- bsps/arm/imxrt/mcux-sdk/drivers/cache/armv7-m7 +- bsps/arm/imxrt/mcux-sdk/drivers/cmp +- bsps/arm/imxrt/mcux-sdk/drivers/common +- bsps/arm/imxrt/mcux-sdk/drivers/csi +- bsps/arm/imxrt/mcux-sdk/drivers/dcdc_1 +- bsps/arm/imxrt/mcux-sdk/drivers/dcp +- bsps/arm/imxrt/mcux-sdk/drivers/dmamux +- bsps/arm/imxrt/mcux-sdk/drivers/edma +- bsps/arm/imxrt/mcux-sdk/drivers/elcdif +- bsps/arm/imxrt/mcux-sdk/drivers/enc +- bsps/arm/imxrt/mcux-sdk/drivers/enet +- bsps/arm/imxrt/mcux-sdk/drivers/ewm +- bsps/arm/imxrt/mcux-sdk/drivers/flexcan +- bsps/arm/imxrt/mcux-sdk/drivers/flexio +- bsps/arm/imxrt/mcux-sdk/drivers/flexram +- bsps/arm/imxrt/mcux-sdk/drivers/flexspi +- bsps/arm/imxrt/mcux-sdk/drivers/gpc_1 +- bsps/arm/imxrt/mcux-sdk/drivers/gpt +- bsps/arm/imxrt/mcux-sdk/drivers/igpio +- bsps/arm/imxrt/mcux-sdk/drivers/kpp +- bsps/arm/imxrt/mcux-sdk/drivers/lpi2c +- bsps/arm/imxrt/mcux-sdk/drivers/lpspi +- bsps/arm/imxrt/mcux-sdk/drivers/lpuart +- bsps/arm/imxrt/mcux-sdk/drivers/ocotp +- bsps/arm/imxrt/mcux-sdk/drivers/pit +- bsps/arm/imxrt/mcux-sdk/drivers/pwm +- bsps/arm/imxrt/mcux-sdk/drivers/pxp +- bsps/arm/imxrt/mcux-sdk/drivers/qtmr_1 +- bsps/arm/imxrt/mcux-sdk/drivers/rtwdog +- bsps/arm/imxrt/mcux-sdk/drivers/sai +- bsps/arm/imxrt/mcux-sdk/drivers/semc +- bsps/arm/imxrt/mcux-sdk/drivers/snvs_hp +- bsps/arm/imxrt/mcux-sdk/drivers/snvs_lp +- bsps/arm/imxrt/mcux-sdk/drivers/src +- bsps/arm/imxrt/mcux-sdk/drivers/tempmon +- bsps/arm/imxrt/mcux-sdk/drivers/trng +- bsps/arm/imxrt/mcux-sdk/drivers/usdhc +- bsps/arm/imxrt/mcux-sdk/drivers/wdog01 +- bsps/arm/imxrt/mcux-sdk/drivers/xbara +- bsps/arm/imxrt/mcux-sdk/drivers/xbarb +install: +- destination: ${BSP_INCLUDEDIR} + source: + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/MIMXRT1052.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/MIMXRT1052_features.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/fsl_device_registers.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/system_MIMXRT1052.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/drivers/fsl_clock.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/drivers/fsl_flexram_allocate.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/drivers/fsl_iomuxc.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/drivers/fsl_nic301.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/drivers/fsl_romapi.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/xip/fsl_flexspi_nor_boot.h + - bsps/arm/imxrt/mcux-sdk/drivers/adc_12b1msps_sar/fsl_adc.h + - bsps/arm/imxrt/mcux-sdk/drivers/adc_etc/fsl_adc_etc.h + - bsps/arm/imxrt/mcux-sdk/drivers/aoi/fsl_aoi.h + - bsps/arm/imxrt/mcux-sdk/drivers/bee/fsl_bee.h + - bsps/arm/imxrt/mcux-sdk/drivers/cache/armv7-m7/fsl_cache.h + - bsps/arm/imxrt/mcux-sdk/drivers/cmp/fsl_cmp.h + - bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common.h + - bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common_arm.h + - bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common_dsp.h + - bsps/arm/imxrt/mcux-sdk/drivers/csi/fsl_csi.h + - bsps/arm/imxrt/mcux-sdk/drivers/dcdc_1/fsl_dcdc.h + - bsps/arm/imxrt/mcux-sdk/drivers/dcp/fsl_dcp.h + - bsps/arm/imxrt/mcux-sdk/drivers/dmamux/fsl_dmamux.h + - bsps/arm/imxrt/mcux-sdk/drivers/edma/fsl_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/elcdif/fsl_elcdif.h + - bsps/arm/imxrt/mcux-sdk/drivers/enc/fsl_enc.h + - bsps/arm/imxrt/mcux-sdk/drivers/enet/fsl_enet.h + - bsps/arm/imxrt/mcux-sdk/drivers/ewm/fsl_ewm.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexcan/fsl_flexcan.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexcan/fsl_flexcan_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_camera.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_camera_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2c_master.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_mculcd.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_mculcd_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_mculcd_smartdma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexram/fsl_flexram.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexspi/fsl_flexspi.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexspi/fsl_flexspi_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexspi/fsl_flexspi_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/gpc_1/fsl_gpc.h + - bsps/arm/imxrt/mcux-sdk/drivers/gpt/fsl_gpt.h + - bsps/arm/imxrt/mcux-sdk/drivers/igpio/fsl_gpio.h + - bsps/arm/imxrt/mcux-sdk/drivers/kpp/fsl_kpp.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c_freertos.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpspi/fsl_lpspi.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpspi/fsl_lpspi_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpspi/fsl_lpspi_freertos.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpuart/fsl_lpuart.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpuart/fsl_lpuart_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpuart/fsl_lpuart_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpuart/fsl_lpuart_freertos.h + - bsps/arm/imxrt/mcux-sdk/drivers/ocotp/fsl_ocotp.h + - bsps/arm/imxrt/mcux-sdk/drivers/pit/fsl_pit.h + - bsps/arm/imxrt/mcux-sdk/drivers/pwm/fsl_pwm.h + - bsps/arm/imxrt/mcux-sdk/drivers/pxp/fsl_pxp.h + - bsps/arm/imxrt/mcux-sdk/drivers/qtmr_1/fsl_qtmr.h + - bsps/arm/imxrt/mcux-sdk/drivers/rtwdog/fsl_rtwdog.h + - bsps/arm/imxrt/mcux-sdk/drivers/sai/fsl_sai.h + - bsps/arm/imxrt/mcux-sdk/drivers/sai/fsl_sai_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/sai/fsl_sai_sdma.h + - bsps/arm/imxrt/mcux-sdk/drivers/semc/fsl_semc.h + - bsps/arm/imxrt/mcux-sdk/drivers/snvs_hp/fsl_snvs_hp.h + - bsps/arm/imxrt/mcux-sdk/drivers/snvs_lp/fsl_snvs_lp.h + - bsps/arm/imxrt/mcux-sdk/drivers/src/fsl_src.h + - bsps/arm/imxrt/mcux-sdk/drivers/tempmon/fsl_tempmon.h + - bsps/arm/imxrt/mcux-sdk/drivers/trng/fsl_trng.h + - bsps/arm/imxrt/mcux-sdk/drivers/usdhc/fsl_usdhc.h + - bsps/arm/imxrt/mcux-sdk/drivers/wdog01/fsl_wdog.h + - bsps/arm/imxrt/mcux-sdk/drivers/xbara/fsl_xbara.h + - bsps/arm/imxrt/mcux-sdk/drivers/xbarb/fsl_xbarb.h +links: +- role: build-dependency + uid: grp +source: +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/drivers/fsl_clock.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/drivers/fsl_flexram_allocate.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/drivers/fsl_romapi.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/gcc/startup_MIMXRT1052.S +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/system_MIMXRT1052.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1052/xip/fsl_flexspi_nor_boot.c +- bsps/arm/imxrt/mcux-sdk/drivers/adc_12b1msps_sar/fsl_adc.c +- bsps/arm/imxrt/mcux-sdk/drivers/adc_etc/fsl_adc_etc.c +- bsps/arm/imxrt/mcux-sdk/drivers/aoi/fsl_aoi.c +- bsps/arm/imxrt/mcux-sdk/drivers/bee/fsl_bee.c +- bsps/arm/imxrt/mcux-sdk/drivers/cache/armv7-m7/fsl_cache.c +- bsps/arm/imxrt/mcux-sdk/drivers/cmp/fsl_cmp.c +- bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common.c +- bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common_arm.c +- bsps/arm/imxrt/mcux-sdk/drivers/csi/fsl_csi.c +- bsps/arm/imxrt/mcux-sdk/drivers/dcdc_1/fsl_dcdc.c +- bsps/arm/imxrt/mcux-sdk/drivers/dcp/fsl_dcp.c +- bsps/arm/imxrt/mcux-sdk/drivers/dmamux/fsl_dmamux.c +- bsps/arm/imxrt/mcux-sdk/drivers/edma/fsl_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/elcdif/fsl_elcdif.c +- bsps/arm/imxrt/mcux-sdk/drivers/enc/fsl_enc.c +- bsps/arm/imxrt/mcux-sdk/drivers/enet/fsl_enet.c +- bsps/arm/imxrt/mcux-sdk/drivers/ewm/fsl_ewm.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexcan/fsl_flexcan.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2c_master.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexram/fsl_flexram.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexspi/fsl_flexspi.c +- bsps/arm/imxrt/mcux-sdk/drivers/gpc_1/fsl_gpc.c +- bsps/arm/imxrt/mcux-sdk/drivers/gpt/fsl_gpt.c +- bsps/arm/imxrt/mcux-sdk/drivers/igpio/fsl_gpio.c +- bsps/arm/imxrt/mcux-sdk/drivers/kpp/fsl_kpp.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpspi/fsl_lpspi.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpspi/fsl_lpspi_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpuart/fsl_lpuart.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpuart/fsl_lpuart_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/ocotp/fsl_ocotp.c +- bsps/arm/imxrt/mcux-sdk/drivers/pit/fsl_pit.c +- bsps/arm/imxrt/mcux-sdk/drivers/pwm/fsl_pwm.c +- bsps/arm/imxrt/mcux-sdk/drivers/pxp/fsl_pxp.c +- bsps/arm/imxrt/mcux-sdk/drivers/qtmr_1/fsl_qtmr.c +- bsps/arm/imxrt/mcux-sdk/drivers/rtwdog/fsl_rtwdog.c +- bsps/arm/imxrt/mcux-sdk/drivers/sai/fsl_sai.c +- bsps/arm/imxrt/mcux-sdk/drivers/sai/fsl_sai_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/semc/fsl_semc.c +- bsps/arm/imxrt/mcux-sdk/drivers/snvs_hp/fsl_snvs_hp.c +- bsps/arm/imxrt/mcux-sdk/drivers/snvs_lp/fsl_snvs_lp.c +- bsps/arm/imxrt/mcux-sdk/drivers/src/fsl_src.c +- bsps/arm/imxrt/mcux-sdk/drivers/tempmon/fsl_tempmon.c +- bsps/arm/imxrt/mcux-sdk/drivers/trng/fsl_trng.c +- bsps/arm/imxrt/mcux-sdk/drivers/usdhc/fsl_usdhc.c +- bsps/arm/imxrt/mcux-sdk/drivers/wdog01/fsl_wdog.c +- bsps/arm/imxrt/mcux-sdk/drivers/xbara/fsl_xbara.c +- bsps/arm/imxrt/mcux-sdk/drivers/xbarb/fsl_xbarb.c +type: build diff --git a/spec/build/bsps/arm/imxrt/obj-mimxrt1166-cm4.yml b/spec/build/bsps/arm/imxrt/obj-mimxrt1166-cm4.yml new file mode 100644 index 0000000000..0ddba1d7e1 --- /dev/null +++ b/spec/build/bsps/arm/imxrt/obj-mimxrt1166-cm4.yml @@ -0,0 +1,265 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] +enabled-by: true +includes: +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166 +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/cm4 +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/xip +- bsps/arm/imxrt/mcux-sdk/drivers/acmp +- bsps/arm/imxrt/mcux-sdk/drivers/adc_etc +- bsps/arm/imxrt/mcux-sdk/drivers/aoi +- bsps/arm/imxrt/mcux-sdk/drivers/common +- bsps/arm/imxrt/mcux-sdk/drivers/csi +- bsps/arm/imxrt/mcux-sdk/drivers/dac12 +- bsps/arm/imxrt/mcux-sdk/drivers/dcic +- bsps/arm/imxrt/mcux-sdk/drivers/dmamux +- bsps/arm/imxrt/mcux-sdk/drivers/edma +- bsps/arm/imxrt/mcux-sdk/drivers/elcdif +- bsps/arm/imxrt/mcux-sdk/drivers/enc +- bsps/arm/imxrt/mcux-sdk/drivers/enet +- bsps/arm/imxrt/mcux-sdk/drivers/ewm +- bsps/arm/imxrt/mcux-sdk/drivers/flexcan +- bsps/arm/imxrt/mcux-sdk/drivers/flexio +- bsps/arm/imxrt/mcux-sdk/drivers/flexspi +- bsps/arm/imxrt/mcux-sdk/drivers/gpt +- bsps/arm/imxrt/mcux-sdk/drivers/iee +- bsps/arm/imxrt/mcux-sdk/drivers/iee_apc +- bsps/arm/imxrt/mcux-sdk/drivers/igpio +- bsps/arm/imxrt/mcux-sdk/drivers/key_manager +- bsps/arm/imxrt/mcux-sdk/drivers/kpp +- bsps/arm/imxrt/mcux-sdk/drivers/lcdifv2 +- bsps/arm/imxrt/mcux-sdk/drivers/lpadc +- bsps/arm/imxrt/mcux-sdk/drivers/lpi2c +- bsps/arm/imxrt/mcux-sdk/drivers/lpspi +- bsps/arm/imxrt/mcux-sdk/drivers/lpuart +- bsps/arm/imxrt/mcux-sdk/drivers/mipi_csi2rx +- bsps/arm/imxrt/mcux-sdk/drivers/mipi_dsi_split +- bsps/arm/imxrt/mcux-sdk/drivers/mu +- bsps/arm/imxrt/mcux-sdk/drivers/ocotp +- bsps/arm/imxrt/mcux-sdk/drivers/pdm +- bsps/arm/imxrt/mcux-sdk/drivers/pit +- bsps/arm/imxrt/mcux-sdk/drivers/puf +- bsps/arm/imxrt/mcux-sdk/drivers/pwm +- bsps/arm/imxrt/mcux-sdk/drivers/pxp +- bsps/arm/imxrt/mcux-sdk/drivers/qtmr_1 +- bsps/arm/imxrt/mcux-sdk/drivers/rdc +- bsps/arm/imxrt/mcux-sdk/drivers/rdc_sema42 +- bsps/arm/imxrt/mcux-sdk/drivers/sai +- bsps/arm/imxrt/mcux-sdk/drivers/sema4 +- bsps/arm/imxrt/mcux-sdk/drivers/semc +- bsps/arm/imxrt/mcux-sdk/drivers/smartcard +- bsps/arm/imxrt/mcux-sdk/drivers/snvs_hp +- bsps/arm/imxrt/mcux-sdk/drivers/snvs_lp +- bsps/arm/imxrt/mcux-sdk/drivers/spdif +- bsps/arm/imxrt/mcux-sdk/drivers/ssarc +- bsps/arm/imxrt/mcux-sdk/drivers/tempsensor +- bsps/arm/imxrt/mcux-sdk/drivers/usdhc +- bsps/arm/imxrt/mcux-sdk/drivers/xbara +- bsps/arm/imxrt/mcux-sdk/drivers/xbarb +- bsps/arm/imxrt/mcux-sdk/drivers/xecc +- bsps/arm/imxrt/mcux-sdk/drivers/xrdc2 +install: +- destination: ${BSP_INCLUDEDIR} + source: + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/MIMXRT1166_cm4.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/MIMXRT1166_cm4_features.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/MIMXRT1166_cm7.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/MIMXRT1166_cm7_features.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/fsl_device_registers.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/system_MIMXRT1166_cm4.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/system_MIMXRT1166_cm7.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_anatop_ai.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_clock.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_dcdc.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_flexram_allocate.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_gpc.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_iomuxc.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_memory.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_nic301.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_pgmc.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_pmu.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_romapi.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_soc_mipi_csi2rx.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_soc_src.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/cm4/fsl_cache.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/xip/fsl_flexspi_nor_boot.h + - bsps/arm/imxrt/mcux-sdk/drivers/acmp/fsl_acmp.h + - bsps/arm/imxrt/mcux-sdk/drivers/adc_etc/fsl_adc_etc.h + - bsps/arm/imxrt/mcux-sdk/drivers/aoi/fsl_aoi.h + - bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common.h + - bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common_arm.h + - bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common_dsp.h + - bsps/arm/imxrt/mcux-sdk/drivers/csi/fsl_csi.h + - bsps/arm/imxrt/mcux-sdk/drivers/dac12/fsl_dac12.h + - bsps/arm/imxrt/mcux-sdk/drivers/dcic/fsl_dcic.h + - bsps/arm/imxrt/mcux-sdk/drivers/dmamux/fsl_dmamux.h + - bsps/arm/imxrt/mcux-sdk/drivers/edma/fsl_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/elcdif/fsl_elcdif.h + - bsps/arm/imxrt/mcux-sdk/drivers/enc/fsl_enc.h + - bsps/arm/imxrt/mcux-sdk/drivers/enet/fsl_enet.h + - bsps/arm/imxrt/mcux-sdk/drivers/ewm/fsl_ewm.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexcan/fsl_flexcan.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexcan/fsl_flexcan_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_camera.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_camera_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2c_master.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_mculcd.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_mculcd_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_mculcd_smartdma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexspi/fsl_flexspi.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexspi/fsl_flexspi_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexspi/fsl_flexspi_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/gpt/fsl_gpt.h + - bsps/arm/imxrt/mcux-sdk/drivers/iee/fsl_iee.h + - bsps/arm/imxrt/mcux-sdk/drivers/iee_apc/fsl_iee_apc.h + - bsps/arm/imxrt/mcux-sdk/drivers/igpio/fsl_gpio.h + - bsps/arm/imxrt/mcux-sdk/drivers/key_manager/fsl_key_manager.h + - bsps/arm/imxrt/mcux-sdk/drivers/kpp/fsl_kpp.h + - bsps/arm/imxrt/mcux-sdk/drivers/lcdifv2/fsl_lcdifv2.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpadc/fsl_lpadc.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c_freertos.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpspi/fsl_lpspi.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpspi/fsl_lpspi_edma.h + - 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bsps/arm/imxrt/mcux-sdk/drivers/xrdc2/fsl_xrdc2.c +type: build diff --git a/spec/build/bsps/arm/imxrt/obj-mimxrt1166-cm7.yml b/spec/build/bsps/arm/imxrt/obj-mimxrt1166-cm7.yml new file mode 100644 index 0000000000..8f14ae4156 --- /dev/null +++ b/spec/build/bsps/arm/imxrt/obj-mimxrt1166-cm7.yml @@ -0,0 +1,286 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] +enabled-by: true +includes: +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166 +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/cm7 +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/xip +- bsps/arm/imxrt/mcux-sdk/drivers/acmp +- bsps/arm/imxrt/mcux-sdk/drivers/adc_etc +- bsps/arm/imxrt/mcux-sdk/drivers/aoi +- bsps/arm/imxrt/mcux-sdk/drivers/asrc +- bsps/arm/imxrt/mcux-sdk/drivers/cdog +- bsps/arm/imxrt/mcux-sdk/drivers/common +- bsps/arm/imxrt/mcux-sdk/drivers/csi +- bsps/arm/imxrt/mcux-sdk/drivers/dac12 +- bsps/arm/imxrt/mcux-sdk/drivers/dcic +- bsps/arm/imxrt/mcux-sdk/drivers/dmamux +- bsps/arm/imxrt/mcux-sdk/drivers/edma +- bsps/arm/imxrt/mcux-sdk/drivers/elcdif +- bsps/arm/imxrt/mcux-sdk/drivers/enc +- bsps/arm/imxrt/mcux-sdk/drivers/enet +- bsps/arm/imxrt/mcux-sdk/drivers/ewm +- bsps/arm/imxrt/mcux-sdk/drivers/flexcan +- bsps/arm/imxrt/mcux-sdk/drivers/flexio +- bsps/arm/imxrt/mcux-sdk/drivers/flexram +- bsps/arm/imxrt/mcux-sdk/drivers/flexspi +- bsps/arm/imxrt/mcux-sdk/drivers/gpt +- bsps/arm/imxrt/mcux-sdk/drivers/iee +- bsps/arm/imxrt/mcux-sdk/drivers/iee_apc +- bsps/arm/imxrt/mcux-sdk/drivers/igpio +- bsps/arm/imxrt/mcux-sdk/drivers/key_manager +- bsps/arm/imxrt/mcux-sdk/drivers/kpp +- bsps/arm/imxrt/mcux-sdk/drivers/lcdifv2 +- bsps/arm/imxrt/mcux-sdk/drivers/lpadc +- bsps/arm/imxrt/mcux-sdk/drivers/lpi2c +- bsps/arm/imxrt/mcux-sdk/drivers/lpspi +- bsps/arm/imxrt/mcux-sdk/drivers/lpuart +- bsps/arm/imxrt/mcux-sdk/drivers/mecc +- bsps/arm/imxrt/mcux-sdk/drivers/mipi_csi2rx +- bsps/arm/imxrt/mcux-sdk/drivers/mipi_dsi_split +- bsps/arm/imxrt/mcux-sdk/drivers/mu +- bsps/arm/imxrt/mcux-sdk/drivers/ocotp +- bsps/arm/imxrt/mcux-sdk/drivers/pdm +- bsps/arm/imxrt/mcux-sdk/drivers/pit +- bsps/arm/imxrt/mcux-sdk/drivers/puf +- bsps/arm/imxrt/mcux-sdk/drivers/pwm +- bsps/arm/imxrt/mcux-sdk/drivers/pxp +- bsps/arm/imxrt/mcux-sdk/drivers/qtmr_1 +- bsps/arm/imxrt/mcux-sdk/drivers/rdc +- bsps/arm/imxrt/mcux-sdk/drivers/rdc_sema42 +- bsps/arm/imxrt/mcux-sdk/drivers/rtwdog +- bsps/arm/imxrt/mcux-sdk/drivers/sai +- bsps/arm/imxrt/mcux-sdk/drivers/sema4 +- bsps/arm/imxrt/mcux-sdk/drivers/semc +- bsps/arm/imxrt/mcux-sdk/drivers/smartcard +- bsps/arm/imxrt/mcux-sdk/drivers/snvs_hp +- bsps/arm/imxrt/mcux-sdk/drivers/snvs_lp +- bsps/arm/imxrt/mcux-sdk/drivers/spdif +- bsps/arm/imxrt/mcux-sdk/drivers/ssarc +- bsps/arm/imxrt/mcux-sdk/drivers/tempsensor +- bsps/arm/imxrt/mcux-sdk/drivers/usdhc +- bsps/arm/imxrt/mcux-sdk/drivers/wdog01 +- bsps/arm/imxrt/mcux-sdk/drivers/xbara +- bsps/arm/imxrt/mcux-sdk/drivers/xbarb +- bsps/arm/imxrt/mcux-sdk/drivers/xecc +- bsps/arm/imxrt/mcux-sdk/drivers/xrdc2 +install: +- destination: ${BSP_INCLUDEDIR} + source: + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/MIMXRT1166_cm4.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/MIMXRT1166_cm4_features.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/MIMXRT1166_cm7.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/MIMXRT1166_cm7_features.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/fsl_device_registers.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/system_MIMXRT1166_cm4.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/system_MIMXRT1166_cm7.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_anatop_ai.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_clock.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_dcdc.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_flexram_allocate.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_gpc.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_iomuxc.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_memory.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_nic301.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_pgmc.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_pmu.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_romapi.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_soc_mipi_csi2rx.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_soc_src.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/cm7/fsl_cache.h + - bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/xip/fsl_flexspi_nor_boot.h + - bsps/arm/imxrt/mcux-sdk/drivers/acmp/fsl_acmp.h + - bsps/arm/imxrt/mcux-sdk/drivers/adc_etc/fsl_adc_etc.h + - bsps/arm/imxrt/mcux-sdk/drivers/aoi/fsl_aoi.h + - bsps/arm/imxrt/mcux-sdk/drivers/asrc/fsl_asrc.h + - bsps/arm/imxrt/mcux-sdk/drivers/asrc/fsl_asrc_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/cdog/fsl_cdog.h + - bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common.h + - bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common_arm.h + - bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common_dsp.h + - bsps/arm/imxrt/mcux-sdk/drivers/csi/fsl_csi.h + - bsps/arm/imxrt/mcux-sdk/drivers/dac12/fsl_dac12.h + - bsps/arm/imxrt/mcux-sdk/drivers/dcic/fsl_dcic.h + - bsps/arm/imxrt/mcux-sdk/drivers/dmamux/fsl_dmamux.h + - bsps/arm/imxrt/mcux-sdk/drivers/edma/fsl_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/elcdif/fsl_elcdif.h + - bsps/arm/imxrt/mcux-sdk/drivers/enc/fsl_enc.h + - bsps/arm/imxrt/mcux-sdk/drivers/enet/fsl_enet.h + - bsps/arm/imxrt/mcux-sdk/drivers/ewm/fsl_ewm.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexcan/fsl_flexcan.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexcan/fsl_flexcan_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_camera.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_camera_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2c_master.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_mculcd.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_mculcd_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_mculcd_smartdma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexram/fsl_flexram.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexspi/fsl_flexspi.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexspi/fsl_flexspi_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/flexspi/fsl_flexspi_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/gpt/fsl_gpt.h + - bsps/arm/imxrt/mcux-sdk/drivers/iee/fsl_iee.h + - bsps/arm/imxrt/mcux-sdk/drivers/iee_apc/fsl_iee_apc.h + - bsps/arm/imxrt/mcux-sdk/drivers/igpio/fsl_gpio.h + - bsps/arm/imxrt/mcux-sdk/drivers/key_manager/fsl_key_manager.h + - bsps/arm/imxrt/mcux-sdk/drivers/kpp/fsl_kpp.h + - bsps/arm/imxrt/mcux-sdk/drivers/lcdifv2/fsl_lcdifv2.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpadc/fsl_lpadc.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c_freertos.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpspi/fsl_lpspi.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpspi/fsl_lpspi_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpspi/fsl_lpspi_freertos.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpuart/fsl_lpuart.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpuart/fsl_lpuart_dma.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpuart/fsl_lpuart_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/lpuart/fsl_lpuart_freertos.h + - bsps/arm/imxrt/mcux-sdk/drivers/mecc/fsl_mecc.h + - bsps/arm/imxrt/mcux-sdk/drivers/mipi_csi2rx/fsl_mipi_csi2rx.h + - bsps/arm/imxrt/mcux-sdk/drivers/mipi_dsi_split/fsl_mipi_dsi.h + - bsps/arm/imxrt/mcux-sdk/drivers/mu/fsl_mu.h + - bsps/arm/imxrt/mcux-sdk/drivers/ocotp/fsl_ocotp.h + - bsps/arm/imxrt/mcux-sdk/drivers/pdm/fsl_pdm.h + - bsps/arm/imxrt/mcux-sdk/drivers/pdm/fsl_pdm_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/pdm/fsl_pdm_sdma.h + - bsps/arm/imxrt/mcux-sdk/drivers/pit/fsl_pit.h + - bsps/arm/imxrt/mcux-sdk/drivers/puf/fsl_puf.h + - bsps/arm/imxrt/mcux-sdk/drivers/pwm/fsl_pwm.h + - bsps/arm/imxrt/mcux-sdk/drivers/pxp/fsl_pxp.h + - bsps/arm/imxrt/mcux-sdk/drivers/qtmr_1/fsl_qtmr.h + - bsps/arm/imxrt/mcux-sdk/drivers/rdc/fsl_rdc.h + - bsps/arm/imxrt/mcux-sdk/drivers/rdc_sema42/fsl_rdc_sema42.h + - bsps/arm/imxrt/mcux-sdk/drivers/rtwdog/fsl_rtwdog.h + - bsps/arm/imxrt/mcux-sdk/drivers/sai/fsl_sai.h + - bsps/arm/imxrt/mcux-sdk/drivers/sai/fsl_sai_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/sai/fsl_sai_sdma.h + - bsps/arm/imxrt/mcux-sdk/drivers/sema4/fsl_sema4.h + - bsps/arm/imxrt/mcux-sdk/drivers/semc/fsl_semc.h + - bsps/arm/imxrt/mcux-sdk/drivers/smartcard/fsl_smartcard.h + - bsps/arm/imxrt/mcux-sdk/drivers/smartcard/fsl_smartcard_emvsim.h + - bsps/arm/imxrt/mcux-sdk/drivers/smartcard/fsl_smartcard_phy.h + - bsps/arm/imxrt/mcux-sdk/drivers/snvs_hp/fsl_snvs_hp.h + - bsps/arm/imxrt/mcux-sdk/drivers/snvs_lp/fsl_snvs_lp.h + - bsps/arm/imxrt/mcux-sdk/drivers/spdif/fsl_spdif.h + - bsps/arm/imxrt/mcux-sdk/drivers/spdif/fsl_spdif_edma.h + - bsps/arm/imxrt/mcux-sdk/drivers/ssarc/fsl_ssarc.h + - bsps/arm/imxrt/mcux-sdk/drivers/tempsensor/fsl_tempsensor.h + - bsps/arm/imxrt/mcux-sdk/drivers/usdhc/fsl_usdhc.h + - bsps/arm/imxrt/mcux-sdk/drivers/wdog01/fsl_wdog.h + - bsps/arm/imxrt/mcux-sdk/drivers/xbara/fsl_xbara.h + - bsps/arm/imxrt/mcux-sdk/drivers/xbarb/fsl_xbarb.h + - bsps/arm/imxrt/mcux-sdk/drivers/xecc/fsl_xecc.h + - bsps/arm/imxrt/mcux-sdk/drivers/xrdc2/fsl_xrdc2.h +links: +- role: build-dependency + uid: grp +source: +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/cm7/fsl_cache.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_anatop_ai.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_clock.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_dcdc.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_flexram_allocate.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_gpc.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_pgmc.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_pmu.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_romapi.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_soc_mipi_csi2rx.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/drivers/fsl_soc_src.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/gcc/startup_MIMXRT1166_cm7.S +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/system_MIMXRT1166_cm7.c +- bsps/arm/imxrt/mcux-sdk/devices/MIMXRT1166/xip/fsl_flexspi_nor_boot.c +- bsps/arm/imxrt/mcux-sdk/drivers/acmp/fsl_acmp.c +- bsps/arm/imxrt/mcux-sdk/drivers/adc_etc/fsl_adc_etc.c +- bsps/arm/imxrt/mcux-sdk/drivers/aoi/fsl_aoi.c +- bsps/arm/imxrt/mcux-sdk/drivers/asrc/fsl_asrc.c +- bsps/arm/imxrt/mcux-sdk/drivers/asrc/fsl_asrc_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/cdog/fsl_cdog.c +- bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common.c +- bsps/arm/imxrt/mcux-sdk/drivers/common/fsl_common_arm.c +- bsps/arm/imxrt/mcux-sdk/drivers/csi/fsl_csi.c +- bsps/arm/imxrt/mcux-sdk/drivers/dac12/fsl_dac12.c +- bsps/arm/imxrt/mcux-sdk/drivers/dcic/fsl_dcic.c +- bsps/arm/imxrt/mcux-sdk/drivers/dmamux/fsl_dmamux.c +- bsps/arm/imxrt/mcux-sdk/drivers/edma/fsl_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/elcdif/fsl_elcdif.c +- bsps/arm/imxrt/mcux-sdk/drivers/enc/fsl_enc.c +- bsps/arm/imxrt/mcux-sdk/drivers/enet/fsl_enet.c +- bsps/arm/imxrt/mcux-sdk/drivers/ewm/fsl_ewm.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexcan/fsl_flexcan.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2c_master.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_i2s_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_spi_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexio/fsl_flexio_uart_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexram/fsl_flexram.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexspi/fsl_flexspi.c +- bsps/arm/imxrt/mcux-sdk/drivers/flexspi/fsl_flexspi_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/gpt/fsl_gpt.c +- bsps/arm/imxrt/mcux-sdk/drivers/iee/fsl_iee.c +- bsps/arm/imxrt/mcux-sdk/drivers/iee_apc/fsl_iee_apc.c +- bsps/arm/imxrt/mcux-sdk/drivers/igpio/fsl_gpio.c +- bsps/arm/imxrt/mcux-sdk/drivers/key_manager/fsl_key_manager.c +- bsps/arm/imxrt/mcux-sdk/drivers/kpp/fsl_kpp.c +- bsps/arm/imxrt/mcux-sdk/drivers/lcdifv2/fsl_lcdifv2.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpadc/fsl_lpadc.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpi2c/fsl_lpi2c_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpspi/fsl_lpspi.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpspi/fsl_lpspi_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpuart/fsl_lpuart.c +- bsps/arm/imxrt/mcux-sdk/drivers/lpuart/fsl_lpuart_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/mecc/fsl_mecc.c +- bsps/arm/imxrt/mcux-sdk/drivers/mipi_csi2rx/fsl_mipi_csi2rx.c +- bsps/arm/imxrt/mcux-sdk/drivers/mipi_dsi_split/fsl_mipi_dsi.c +- bsps/arm/imxrt/mcux-sdk/drivers/mu/fsl_mu.c +- bsps/arm/imxrt/mcux-sdk/drivers/ocotp/fsl_ocotp.c +- bsps/arm/imxrt/mcux-sdk/drivers/pdm/fsl_pdm.c +- bsps/arm/imxrt/mcux-sdk/drivers/pdm/fsl_pdm_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/pit/fsl_pit.c +- bsps/arm/imxrt/mcux-sdk/drivers/puf/fsl_puf.c +- bsps/arm/imxrt/mcux-sdk/drivers/pwm/fsl_pwm.c +- bsps/arm/imxrt/mcux-sdk/drivers/pxp/fsl_pxp.c +- bsps/arm/imxrt/mcux-sdk/drivers/qtmr_1/fsl_qtmr.c +- bsps/arm/imxrt/mcux-sdk/drivers/rdc/fsl_rdc.c +- bsps/arm/imxrt/mcux-sdk/drivers/rdc_sema42/fsl_rdc_sema42.c +- bsps/arm/imxrt/mcux-sdk/drivers/rtwdog/fsl_rtwdog.c +- bsps/arm/imxrt/mcux-sdk/drivers/sai/fsl_sai.c +- bsps/arm/imxrt/mcux-sdk/drivers/sai/fsl_sai_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/sema4/fsl_sema4.c +- bsps/arm/imxrt/mcux-sdk/drivers/semc/fsl_semc.c +- bsps/arm/imxrt/mcux-sdk/drivers/smartcard/fsl_smartcard_emvsim.c +- bsps/arm/imxrt/mcux-sdk/drivers/smartcard/fsl_smartcard_phy_emvsim.c +- bsps/arm/imxrt/mcux-sdk/drivers/snvs_hp/fsl_snvs_hp.c +- bsps/arm/imxrt/mcux-sdk/drivers/snvs_lp/fsl_snvs_lp.c +- bsps/arm/imxrt/mcux-sdk/drivers/spdif/fsl_spdif.c +- bsps/arm/imxrt/mcux-sdk/drivers/spdif/fsl_spdif_edma.c +- bsps/arm/imxrt/mcux-sdk/drivers/ssarc/fsl_ssarc.c +- bsps/arm/imxrt/mcux-sdk/drivers/tempsensor/fsl_tempsensor.c +- bsps/arm/imxrt/mcux-sdk/drivers/usdhc/fsl_usdhc.c +- bsps/arm/imxrt/mcux-sdk/drivers/wdog01/fsl_wdog.c +- bsps/arm/imxrt/mcux-sdk/drivers/xbara/fsl_xbara.c +- bsps/arm/imxrt/mcux-sdk/drivers/xbarb/fsl_xbarb.c +- bsps/arm/imxrt/mcux-sdk/drivers/xecc/fsl_xecc.c +- bsps/arm/imxrt/mcux-sdk/drivers/xrdc2/fsl_xrdc2.c +type: build diff --git a/spec/build/bsps/arm/imxrt/obj.yml b/spec/build/bsps/arm/imxrt/obj.yml new file mode 100644 index 0000000000..ca1b07beca --- /dev/null +++ b/spec/build/bsps/arm/imxrt/obj.yml @@ -0,0 +1,64 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2020, 2023 embedded brains GmbH & Co. KG +enabled-by: true +cppflags: [] +cxxflags: [] +includes: [] +install: +- destination: ${BSP_INCLUDEDIR} + source: + - bsps/arm/imxrt/include/bsp.h + - bsps/arm/imxrt/include/chip.h + - bsps/arm/imxrt/include/fsl_clock_config.h +- destination: ${BSP_INCLUDEDIR}/arm/freescale/imx + source: + - bsps/arm/include/arm/freescale/imx/imx_iomuxreg.h + - bsps/arm/include/arm/freescale/imx/imx_iomuxvar.h +- destination: ${BSP_INCLUDEDIR}/bsp + source: + - bsps/arm/imxrt/include/bsp/flash-headers.h + - bsps/arm/imxrt/include/bsp/irq.h + - bsps/arm/include/bsp/imx-gpio.h + - bsps/arm/include/bsp/imx-iomux.h +- destination: ${BSP_INCLUDEDIR}/imxrt + source: + - bsps/arm/imxrt/include/imxrt/lpspi.h + - bsps/arm/imxrt/include/imxrt/memory.h + - bsps/arm/imxrt/include/imxrt/mpu-config.h +- destination: ${BSP_LIBDIR} + source: + - bsps/arm/imxrt/start/linkcmds.flexspi + - bsps/arm/imxrt/start/linkcmds.ocram + - bsps/arm/imxrt/start/linkcmds.sdram +links: [] +source: +- bsps/arm/imxrt/console/console.c +- bsps/arm/imxrt/i2c/imxrt-lpi2c.c +- bsps/arm/imxrt/spi/imxrt-lpspi.c +- bsps/arm/imxrt/start/bspstart.c +- bsps/arm/imxrt/start/bspstarthooks.c +- bsps/arm/imxrt/start/flash-boot-data.c +- bsps/arm/imxrt/start/flash-ivt.c +- bsps/arm/imxrt/start/imxrt-ffec-init.c +- bsps/arm/imxrt/start/mpu-config.c +- bsps/arm/shared/cache/cache-v7m.c +- bsps/arm/shared/clock/clock-armv7m.c +- bsps/arm/shared/cpucounter/cpucounter-armv7m.c +- bsps/arm/shared/irq/irq-armv7m.c +- bsps/arm/shared/irq/irq-dispatch-armv7m.c +- bsps/arm/shared/pins/imx-gpio.c +- bsps/arm/shared/pins/imx_iomux.c +- bsps/arm/shared/start/bsp-start-memcpy.S +- bsps/arm/shared/start/bspreset-armv7m.c +- bsps/shared/dev/btimer/btimer-cpucounter.c +- bsps/shared/dev/getentropy/getentropy-cpucounter.c +- bsps/shared/dev/serial/console-termios.c +- bsps/shared/irq/irq-default-handler.c +- bsps/shared/start/bspfatal-default.c +- bsps/shared/start/gettargethash-default.c +- bsps/shared/start/sbrk.c +- bsps/shared/start/stackalloc.c +type: build diff --git a/spec/build/bsps/arm/imxrt/optfsledmaemlm.yml b/spec/build/bsps/arm/imxrt/optfsledmaemlm.yml index 80c840373d..788e079d71 100644 --- a/spec/build/bsps/arm/imxrt/optfsledmaemlm.yml +++ b/spec/build/bsps/arm/imxrt/optfsledmaemlm.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | Enable the minor loop mapping of the Freescale EDMA. enabled-by: true diff --git a/spec/build/bsps/arm/imxrt/optlinkcmds.yml b/spec/build/bsps/arm/imxrt/optlinkcmds.yml index 4349ad332e..11fdc9bd62 100644 --- a/spec/build/bsps/arm/imxrt/optlinkcmds.yml +++ b/spec/build/bsps/arm/imxrt/optlinkcmds.yml @@ -1,17 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-string: null - env-assign: null build-type: option -default: linkcmds.flexspi -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: linkcmds.flexspi +description: | + The default linker command file. Must be linkcmds.sdram, linkcmds.ocram or + linkcmds.flexspi. enabled-by: true format: '{}' links: [] name: IMXRT_DEFAULT_LINKCMDS -description: | - The default linker command file. Must be linkcmds.sdram, linkcmds.ocram or - linkcmds.flexspi. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optlpspimaxcs.yml b/spec/build/bsps/arm/imxrt/optlpspimaxcs.yml new file mode 100644 index 0000000000..d7cc0ff644 --- /dev/null +++ b/spec/build/bsps/arm/imxrt/optlpspimaxcs.yml @@ -0,0 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/imxrt1166-cm7-saltshaker + value: 8 +- enabled-by: true + value: 0 +description: | + Maximum number of (combined) native and GPIO chip selects per LPSPI. If only + native chip selects are used, this can be set to 0 to save some processing + cycles on SPI transfers. Otherwise you have to set it to at least 4. +enabled-by: true +format: '{}' +links: [] +name: IMXRT_LPSPI_MAX_CS +type: build diff --git a/spec/build/bsps/arm/imxrt/optmemdtcmsz.yml b/spec/build/bsps/arm/imxrt/optmemdtcmsz.yml index 1bd57fac08..1605ac7953 100644 --- a/spec/build/bsps/arm/imxrt/optmemdtcmsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemdtcmsz.yml @@ -1,17 +1,20 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x20000 -default-by-variant: [] +copyrights: +- Copyright (C) 2021 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/imxrt1166-cm7-saltshaker + value: 0x00040000 +- enabled-by: true + value: 0x00020000 +description: | + Size of the DTCM in bytes. Note that these sizes depend on fuses or software + settings done by a bootloader (together with ITCM and OCRAM). enabled-by: true format: '{:#010x}' links: [] name: IMXRT_MEMORY_DTCM_SIZE -description: | - Size of the DTCM in bytes. Note that these sizes depend on fuses or software - settings done by a bootloader (together with ITCM and OCRAM). type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optmemextramnocachesz.yml b/spec/build/bsps/arm/imxrt/optmemextramnocachesz.yml index 8b6dba859a..ab719336f3 100644 --- a/spec/build/bsps/arm/imxrt/optmemextramnocachesz.yml +++ b/spec/build/bsps/arm/imxrt/optmemextramnocachesz.yml @@ -1,17 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 1048576 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00100000 +description: | + Size of the nocache area at the end of the external RAM in bytes. Must not be + bigger than IMXRT_MEMORY_EXTRAM_SIZE. enabled-by: true format: '{:#010x}' links: [] name: IMXRT_MEMORY_EXTRAM_NOCACHE_SIZE -description: | - Size of the nocache area at the end of the external RAM in bytes. Must not be - bigger than IMXRT_MEMORY_EXTRAM_SIZE. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optmemextramorigin.yml b/spec/build/bsps/arm/imxrt/optmemextramorigin.yml index 98350d2e2f..6de7467423 100644 --- a/spec/build/bsps/arm/imxrt/optmemextramorigin.yml +++ b/spec/build/bsps/arm/imxrt/optmemextramorigin.yml @@ -1,17 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x80000000 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x80000000 +description: | + Base address of the external RAM. An external ram can be for example be a + SDRAM connected to SEMC or a HyperRAM connected to FlexSPI. enabled-by: true format: '{:#010x}' links: [] name: IMXRT_MEMORY_EXTRAM_ORIGIN -description: | - Base address of the external RAM. An external ram can be for example be a - SDRAM connected to SEMC or a HyperRAM connected to FlexSPI. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optmemextramsz.yml b/spec/build/bsps/arm/imxrt/optmemextramsz.yml index 6999add5cc..6a40bdecdf 100644 --- a/spec/build/bsps/arm/imxrt/optmemextramsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemextramsz.yml @@ -1,19 +1,22 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x2000000 -default-by-variant: [] -enabled-by: true -format: '{:#010x}' -links: [] -name: IMXRT_MEMORY_EXTRAM_SIZE +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/imxrt1166-cm7-saltshaker + value: 0x04000000 +- enabled-by: true + value: 0x02000000 description: | Size of the external RAM in bytes. An external ram can be for example be a SDRAM connected to SEMC or a HyperRAM connected to FlexSPI. The size has to be at least big enough to hold the non cached section with size IMXRT_MEMORY_EXTRAM_NOCACHE_SIZE at the end of the RAM. +enabled-by: true +format: '{:#010x}' +links: [] +name: IMXRT_MEMORY_EXTRAM_SIZE type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optmemflashcfgoffset.yml b/spec/build/bsps/arm/imxrt/optmemflashcfgoffset.yml new file mode 100644 index 0000000000..382da261b8 --- /dev/null +++ b/spec/build/bsps/arm/imxrt/optmemflashcfgoffset.yml @@ -0,0 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- env-assign: null +build-type: option +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/imxrt1166-cm7-saltshaker + value: 0x00000400 +- enabled-by: true + value: 0x00000000 +description: | + Ofset of the flash configuration area from the start of the FlexSPI / SEMC + flash in bytes. The example link files for the i.MX RT1050 set that to 0. On + the i.MX RT1166, it's 0x400. +enabled-by: true +format: '{:#010x}' +links: [] +name: IMXRT_MEMORY_FLASH_CFG_OFFSET +type: build diff --git a/spec/build/bsps/arm/imxrt/optmemflashcfgsz.yml b/spec/build/bsps/arm/imxrt/optmemflashcfgsz.yml deleted file mode 100644 index cd65a7a442..0000000000 --- a/spec/build/bsps/arm/imxrt/optmemflashcfgsz.yml +++ /dev/null @@ -1,19 +0,0 @@ -actions: -- get-integer: null -- env-assign: null -build-type: option -default: 0x1000 -default-by-variant: [] -enabled-by: true -format: '{:#010x}' -links: [] -name: IMXRT_MEMORY_FLASH_CFG_SIZE -description: | - Size of the flash configuration area at the start of the FlexSPI / SEMC flash - in bytes. Either 4 KByte for FlexSPI NOR / SEMC NOR or 1 Kbyte for most other. - Take a look at the i.MX RT1050 Processor Reference Manual chapter 9.7 "Program - image" for details. -type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optmemflashivtoffset.yml b/spec/build/bsps/arm/imxrt/optmemflashivtoffset.yml new file mode 100644 index 0000000000..dcaa8d6247 --- /dev/null +++ b/spec/build/bsps/arm/imxrt/optmemflashivtoffset.yml @@ -0,0 +1,20 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- env-assign: null +build-type: option +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00001000 +description: | + Offset of the image vector table in flash in bytes. Either 4 KByte for FlexSPI + NOR / SEMC NOR or 1 KByte for most others (on i.MXRT1050). Take a look at the + i.MXRT1050 / i.MXRT1166 Processor Reference Manual chapter "System Boot" / + "Program image" for details. +enabled-by: true +format: '{:#010x}' +links: [] +name: IMXRT_MEMORY_FLASH_IVT_OFFSET +type: build diff --git a/spec/build/bsps/arm/imxrt/optmemflashivtsz.yml b/spec/build/bsps/arm/imxrt/optmemflashivtsz.yml index d1d9516951..5cab2210fe 100644 --- a/spec/build/bsps/arm/imxrt/optmemflashivtsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemflashivtsz.yml @@ -1,18 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x1000 -default-by-variant: [] -enabled-by: true -format: '{:#010x}' -links: [] -name: IMXRT_MEMORY_FLASH_IVT_SIZE +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00001000 description: | Size of the image vector table, boot data structure, device configuration data and similar program image header information. Take a look at the i.MX RT1050 Processor Reference Manual chapter 9.7 "Program image" for details. +enabled-by: true +format: '{:#010x}' +links: [] +name: IMXRT_MEMORY_FLASH_IVT_SIZE type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optmemflashorigin.yml b/spec/build/bsps/arm/imxrt/optmemflashorigin.yml index 882ade680c..5bcbe827af 100644 --- a/spec/build/bsps/arm/imxrt/optmemflashorigin.yml +++ b/spec/build/bsps/arm/imxrt/optmemflashorigin.yml @@ -1,19 +1,22 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null - define-unquoted: IMXRT_MEMORY_FLASH_ORIGIN build-type: option -default: 0x60000000 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/imxrt1166-cm7-saltshaker + value: 0x30000000 +- enabled-by: true + value: 0x60000000 +description: | + Origin of the external flash memory. That can be for example a flash + connected to FlexSPI or to SEMC. The default value is for a HyperFlash + connected to FlexSPI or a board specific variant for special BSPs. enabled-by: true format: '{:#010x}' links: [] name: IMXRT_MEMORY_FLASH_ORIGIN -description: | - Origin of the external flash memory. That can be for example a flash - connected to FlexSPI or to SEMC. The default value is for a HyperFlash - connected to FlexSPI. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optmemflashsz.yml b/spec/build/bsps/arm/imxrt/optmemflashsz.yml index c474dd256e..b46d15bd4e 100644 --- a/spec/build/bsps/arm/imxrt/optmemflashsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemflashsz.yml @@ -1,20 +1,23 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null - define-unquoted: IMXRT_MEMORY_FLASH_SIZE build-type: option -default: 0x4000000 -default-by-variant: [] -enabled-by: true -format: '{:#010x}' -links: [] -name: IMXRT_MEMORY_FLASH_SIZE +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/imxrt1166-cm7-saltshaker + value: 0x00800000 +- enabled-by: true + value: 0x04000000 description: | Size of the external flash area in bytes. Has to be big enough to hold the i.MXRT initial vector table (IVT) and configuration information. The sizes of these are defined with IMXRT_MEMORY_FLASH_IVT_SIZE and IMXRT_MEMORY_FLASH_CFG_SIZE. +enabled-by: true +format: '{:#010x}' +links: [] +name: IMXRT_MEMORY_FLASH_SIZE type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optmemitcmsz.yml b/spec/build/bsps/arm/imxrt/optmemitcmsz.yml index 7795b2becb..5e13d371ac 100644 --- a/spec/build/bsps/arm/imxrt/optmemitcmsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemitcmsz.yml @@ -1,18 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x1ff00 -default-by-variant: [] -enabled-by: true -format: '{:#010x}' -links: [] -name: IMXRT_MEMORY_ITCM_SIZE +copyrights: +- Copyright (C) 2021 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/imxrt1166-cm7-saltshaker + value: 0x0003ff00 +- enabled-by: true + value: 0x0001ff00 description: | Size of the ITCM in bytes. Note that these sizes depend on fuses or software settings done by a bootloader (together with DTCM and OCRAM). The ITCM size has to take the IMXRT_MEMORY_NULL_SIZE into account! +enabled-by: true +format: '{:#010x}' +links: [] +name: IMXRT_MEMORY_ITCM_SIZE type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optmemnullsz.yml b/spec/build/bsps/arm/imxrt/optmemnullsz.yml index d737ef0e60..f7ba2dafdb 100644 --- a/spec/build/bsps/arm/imxrt/optmemnullsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemnullsz.yml @@ -1,18 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x100 -default-by-variant: [] -enabled-by: true -format: '{:#010x}' -links: [] -name: IMXRT_MEMORY_NULL_SIZE +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00000100 description: | Size of the NULL pointer protection area in bytes. This memory area reduces the size of the ITCM available to the application. If you adapt this, you have to adapt IMXRT_MEMORY_ITCM_SIZE too. +enabled-by: true +format: '{:#010x}' +links: [] +name: IMXRT_MEMORY_NULL_SIZE type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optmemocramnocachesz.yml b/spec/build/bsps/arm/imxrt/optmemocramnocachesz.yml index 942dd60de2..125d41c515 100644 --- a/spec/build/bsps/arm/imxrt/optmemocramnocachesz.yml +++ b/spec/build/bsps/arm/imxrt/optmemocramnocachesz.yml @@ -1,17 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0 -default-by-variant: [] +copyrights: +- Copyright (C) 2021 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00000000 +description: | + Size of the nocache area at the end of the OCRAM in bytes. Must not be bigger + than IMXRT_MEMORY_OCRAM_SIZE. enabled-by: true format: '{:#010x}' links: [] name: IMXRT_MEMORY_OCRAM_NOCACHE_SIZE -description: | - Size of the nocache area at the end of the OCRAM in bytes. Must not be bigger - than IMXRT_MEMORY_OCRAM_SIZE. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optmemocramorigin.yml b/spec/build/bsps/arm/imxrt/optmemocramorigin.yml new file mode 100644 index 0000000000..6c344ca5b6 --- /dev/null +++ b/spec/build/bsps/arm/imxrt/optmemocramorigin.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- env-assign: null +build-type: option +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/imxrt1166-cm7-saltshaker + value: 0x20340000 +- enabled-by: true + value: 0x20200000 +description: | + Origin of the OCRAM. +enabled-by: true +format: '{:#010x}' +links: [] +name: IMXRT_MEMORY_OCRAM_ORIGIN +type: build diff --git a/spec/build/bsps/arm/imxrt/optmemocramsz.yml b/spec/build/bsps/arm/imxrt/optmemocramsz.yml index 9e264f69be..dd215dfb81 100644 --- a/spec/build/bsps/arm/imxrt/optmemocramsz.yml +++ b/spec/build/bsps/arm/imxrt/optmemocramsz.yml @@ -1,19 +1,22 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x40000 -default-by-variant: [] -enabled-by: true -format: '{:#010x}' -links: [] -name: IMXRT_MEMORY_OCRAM_SIZE +copyrights: +- Copyright (C) 2021 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/imxrt1166-cm7-saltshaker + value: 0x00040000 +- enabled-by: true + value: 0x00040000 description: | Size of the OCRAM in bytes. Note that these sizes depend on fuses or software settings done by a bootloader (together with ITCM and DTCM). The size has to be at least big enough to hold the non cached section with size IMXRT_MEMORY_OCRAM_NOCACHE_SIZE at the end of the RAM. +enabled-by: true +format: '{:#010x}' +links: [] +name: IMXRT_MEMORY_OCRAM_SIZE type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/imxrt/optvariant.yml b/spec/build/bsps/arm/imxrt/optvariant.yml new file mode 100644 index 0000000000..68a1f53267 --- /dev/null +++ b/spec/build/bsps/arm/imxrt/optvariant.yml @@ -0,0 +1,106 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- script: | + variants = [ + "MIMXRT1011CAE4A", + "MIMXRT1011DAE5A", + "MIMXRT1015CAF4A", + "MIMXRT1015DAF5A", + "MIMXRT1024CAG4A", + "MIMXRT1024CAG4B", + "MIMXRT1024DAG5A", + "MIMXRT1024DAG5B", + "MIMXRT1042DFP6B", + "MIMXRT1042XFP5B", + "MIMXRT1042XJM5B", + "MIMXRT1051CVJ5B", + "MIMXRT1051CVL5B", + "MIMXRT1051DVJ6B", + "MIMXRT1051DVL6B", + "MIMXRT1052CVJ5B", + "MIMXRT1052CVL5B", + "MIMXRT1052DVJ6B", + "MIMXRT1052DVL6B", + "MIMXRT1061CVJ5A", + "MIMXRT1061CVJ5B", + "MIMXRT1061CVL5A", + "MIMXRT1061CVL5B", + "MIMXRT1061DVJ6A", + "MIMXRT1061DVJ6B", + "MIMXRT1061DVL6A", + "MIMXRT1061DVL6B", + "MIMXRT1061XVN5B", + "MIMXRT1062CVJ5A", + "MIMXRT1062CVJ5B", + "MIMXRT1062CVL5A", + "MIMXRT1062CVL5B", + "MIMXRT1062DVJ6A", + "MIMXRT1062DVJ6B", + "MIMXRT1062DVL6A", + "MIMXRT1062DVL6B", + "MIMXRT1062DVN6B", + "MIMXRT1062XVN5B", + "MIMXRT1064CVJ5A", + "MIMXRT1064CVL5A", + "MIMXRT1064DVJ6A", + "MIMXRT1064DVL6A", + "MIMXRT1165CVM5A_cm7", + "MIMXRT1165DVM6A_cm7", + "MIMXRT1165XVM5A_cm7", + "MIMXRT1165CVM5A_cm4", + "MIMXRT1165DVM6A_cm4", + "MIMXRT1165XVM5A_cm4", + "MIMXRT1166CVM5A_cm7", + "MIMXRT1166DVM6A_cm7", + "MIMXRT1166XVM5A_cm7", + "MIMXRT1166CVM5A_cm4", + "MIMXRT1166DVM6A_cm4", + "MIMXRT1166XVM5A_cm4", + "MIMXRT1171AVM8A", + "MIMXRT1171CVM8A", + "MIMXRT1171DVMAA", + "MIMXRT1172AVM8A", + "MIMXRT1172CVM8A", + "MIMXRT1172DVMAA", + "MIMXRT1173CVM8A_cm7", + "MIMXRT1173CVM8A_cm4", + "MIMXRT1175AVM8A_cm7", + "MIMXRT1175CVM8A_cm7", + "MIMXRT1175DVMAA_cm7", + "MIMXRT1175AVM8A_cm4", + "MIMXRT1175CVM8A_cm4", + "MIMXRT1175DVMAA_cm4", + "MIMXRT1176AVM8A_cm7", + "MIMXRT1176CVM8A_cm7", + "MIMXRT1176DVMAA_cm7", + "MIMXRT1176AVM8A_cm4", + "MIMXRT1176CVM8A_cm4", + "MIMXRT1176DVMAA_cm4", + ] + if value not in variants: + conf.fatal( + "MIMXRT chip variant '{}' is not one of {}".format( + value, variants + ) + ) + conf.define_cond("CPU_{}".format(value), True) + speedgrade = "'{}'".format(value[13]) + conf.define("IMXRT_SPEEDGRADE", speedgrade, quote=False) + conf.define("IMXRT_IS_{}xx".format(value[:8]), True) +build-type: option +default: +- enabled-by: arm/imxrt1166-cm7-saltshaker + value: MIMXRT1166DVM6A_cm7 +- enabled-by: true + value: MIMXRT1052DVL6B +enabled-by: true +format: '{}' +links: [] +name: IMXRT_VARIANT +description: | + Select the i.MXRT series chip variant. Can be (for example) MIMXRT1052CVJ5B or + MIMXRT1166DVM6A_cm7. +type: build +copyrights: +- Copyright (C) 2021 embedded brains GmbH & Co. KG diff --git a/spec/build/bsps/arm/lm3s69xx/abi.yml b/spec/build/bsps/arm/lm3s69xx/abi.yml index 77d5db8cf7..7e0e429986 100644 --- a/spec/build/bsps/arm/lm3s69xx/abi.yml +++ b/spec/build/bsps/arm/lm3s69xx/abi.yml @@ -5,11 +5,12 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mthumb -- -mcpu=cortex-m3 -default-by-variant: [] +- enabled-by: true + value: + - -mthumb + - -mcpu=cortex-m3 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/bsplm3s3749.yml b/spec/build/bsps/arm/lm3s69xx/bsplm3s3749.yml index f9006ac2cd..31311a26ec 100644 --- a/spec/build/bsps/arm/lm3s69xx/bsplm3s3749.yml +++ b/spec/build/bsps/arm/lm3s69xx/bsplm3s3749.yml @@ -4,7 +4,7 @@ bsp: lm3s3749 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lm3s69xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstlm3s3749 - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lm3s69xx/bsplm3s6965.yml b/spec/build/bsps/arm/lm3s69xx/bsplm3s6965.yml index aa7627d33f..8c89569dc9 100644 --- a/spec/build/bsps/arm/lm3s69xx/bsplm3s6965.yml +++ b/spec/build/bsps/arm/lm3s69xx/bsplm3s6965.yml @@ -4,7 +4,7 @@ bsp: lm3s6965 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lm3s69xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstlm3s6965 - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lm3s69xx/bsplm4f120.yml b/spec/build/bsps/arm/lm3s69xx/bsplm4f120.yml index cbfe6707d5..5ae4f00bce 100644 --- a/spec/build/bsps/arm/lm3s69xx/bsplm4f120.yml +++ b/spec/build/bsps/arm/lm3s69xx/bsplm4f120.yml @@ -4,7 +4,7 @@ bsp: lm4f120 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lm3s69xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstlm4f120 - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lm3s69xx/bspqemu.yml b/spec/build/bsps/arm/lm3s69xx/bspqemu.yml index ca15af5b37..fbf0f312db 100644 --- a/spec/build/bsps/arm/lm3s69xx/bspqemu.yml +++ b/spec/build/bsps/arm/lm3s69xx/bspqemu.yml @@ -4,7 +4,7 @@ bsp: lm3s6965_qemu build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lm3s69xx @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lm3s69xx/grp.yml b/spec/build/bsps/arm/lm3s69xx/grp.yml index 2ab26fe919..ef14b0361c 100644 --- a/spec/build/bsps/arm/lm3s69xx/grp.yml +++ b/spec/build/bsps/arm/lm3s69xx/grp.yml @@ -1,7 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] @@ -50,6 +53,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../bspopts type: build use-after: [] diff --git a/spec/build/bsps/arm/lm3s69xx/obj.yml b/spec/build/bsps/arm/lm3s69xx/obj.yml index d056b930e4..19f0e15bb7 100644 --- a/spec/build/bsps/arm/lm3s69xx/obj.yml +++ b/spec/build/bsps/arm/lm3s69xx/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -11,7 +11,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/lm3s69xx/include/bsp.h - - bsps/arm/lm3s69xx/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/lm3s69xx/include/bsp/io.h @@ -39,8 +38,9 @@ source: - bsps/arm/shared/irq/irq-dispatch-armv7m.c - bsps/arm/shared/start/bsp-start-memcpy.S - bsps/arm/shared/start/bspreset-armv7m.c +- bsps/arm/shared/start/bspstarthook0-empty.c - bsps/shared/cache/nocache.c -- bsps/shared/dev/btimer/btimer-stub.c +- bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/cpucounter/cpucounterfrequency.c - bsps/shared/dev/cpucounter/cpucounterread.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c @@ -49,7 +49,6 @@ source: - bsps/shared/dev/serial/legacy-console.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/lm3s69xx/optenuart0.yml b/spec/build/bsps/arm/lm3s69xx/optenuart0.yml index fa3254dbf5..f70466e6aa 100644 --- a/spec/build/bsps/arm/lm3s69xx/optenuart0.yml +++ b/spec/build/bsps/arm/lm3s69xx/optenuart0.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | enable UART 0 enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optenuart1.yml b/spec/build/bsps/arm/lm3s69xx/optenuart1.yml index 42c6133cf5..cb7cbe5783 100644 --- a/spec/build/bsps/arm/lm3s69xx/optenuart1.yml +++ b/spec/build/bsps/arm/lm3s69xx/optenuart1.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | enable UART 1 enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optenuart2.yml b/spec/build/bsps/arm/lm3s69xx/optenuart2.yml index 0de60cb7a7..57aa55401e 100644 --- a/spec/build/bsps/arm/lm3s69xx/optenuart2.yml +++ b/spec/build/bsps/arm/lm3s69xx/optenuart2.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | enable UART 2 enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optgpioahb.yml b/spec/build/bsps/arm/lm3s69xx/optgpioahb.yml index 5266ec8549..711b899202 100644 --- a/spec/build/bsps/arm/lm3s69xx/optgpioahb.yml +++ b/spec/build/bsps/arm/lm3s69xx/optgpioahb.yml @@ -4,15 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/lm3s3749.* -- value: true - variants: - - arm/lm4f.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s3749 + - arm/lm4f120 + value: true +- enabled-by: true + value: false description: | use AHB apperture to access GPIO registers enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optgpionum.yml b/spec/build/bsps/arm/lm3s69xx/optgpionum.yml index 05911d140c..4a7689b97f 100644 --- a/spec/build/bsps/arm/lm3s69xx/optgpionum.yml +++ b/spec/build/bsps/arm/lm3s69xx/optgpionum.yml @@ -4,18 +4,18 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: -- value: 8 - variants: - - arm/lm3s3749.* -- value: 7 - variants: - - arm/lm3s6965.* -- value: 6 - variants: - - arm/lm4f120.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/lm3s3749 + value: 8 +- enabled-by: + - arm/lm3s6965 + - arm/lm3s6965_qemu + value: 7 +- enabled-by: arm/lm4f120 + value: 6 +- enabled-by: true + value: 0 description: | number of GPIO blocks supported by MCU enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml b/spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml index 22199d8d59..5de3a78a35 100644 --- a/spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml +++ b/spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml @@ -4,12 +4,12 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/lm3s3749.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/lm3s3749 + value: true +- enabled-by: true + value: false description: | board has LM3S3749 MCU enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml b/spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml index be01195f1d..76a143ed4f 100644 --- a/spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml +++ b/spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml @@ -4,12 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/lm3s6965.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965 + - arm/lm3s6965_qemu + value: true +- enabled-by: true + value: false description: | board has LM3S6965 MCU enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optlm4f120.yml b/spec/build/bsps/arm/lm3s69xx/optlm4f120.yml index b3c59921b6..5720ad2306 100644 --- a/spec/build/bsps/arm/lm3s69xx/optlm4f120.yml +++ b/spec/build/bsps/arm/lm3s69xx/optlm4f120.yml @@ -4,12 +4,12 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/lm4f120.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/lm4f120 + value: true +- enabled-by: true + value: false description: | board has LM4F120xxx MCU enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optssiblks.yml b/spec/build/bsps/arm/lm3s69xx/optssiblks.yml index 551a27cbf2..d839dc84ae 100644 --- a/spec/build/bsps/arm/lm3s69xx/optssiblks.yml +++ b/spec/build/bsps/arm/lm3s69xx/optssiblks.yml @@ -4,18 +4,18 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: -- value: 2 - variants: - - arm/lm3s3749.* -- value: 1 - variants: - - arm/lm3s6965.* -- value: 4 - variants: - - arm/lm4f120.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/lm3s3749 + value: 2 +- enabled-by: + - arm/lm3s6965 + - arm/lm3s6965_qemu + value: 1 +- enabled-by: arm/lm4f120 + value: 4 +- enabled-by: true + value: 0 description: | number of SSI blocks supported by MCU enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optssiclk.yml b/spec/build/bsps/arm/lm3s69xx/optssiclk.yml index b278880160..79265b2902 100644 --- a/spec/build/bsps/arm/lm3s69xx/optssiclk.yml +++ b/spec/build/bsps/arm/lm3s69xx/optssiclk.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 1000000 description: | SSI clock in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optsysclk.yml b/spec/build/bsps/arm/lm3s69xx/optsysclk.yml index ffdd8d78c3..3e85c1881e 100644 --- a/spec/build/bsps/arm/lm3s69xx/optsysclk.yml +++ b/spec/build/bsps/arm/lm3s69xx/optsysclk.yml @@ -4,15 +4,17 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: -- value: 50000000 - variants: - - arm/lm3s.* -- value: 80000000 - variants: - - arm/lm4f.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s3749 + - arm/lm3s6965 + - arm/lm3s6965_qemu + value: 50000000 +- enabled-by: arm/lm4f120 + value: 80000000 +- enabled-by: true + value: 0 description: | system clock in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optuartbaud.yml b/spec/build/bsps/arm/lm3s69xx/optuartbaud.yml index 9b1deff47c..b21ada0c14 100644 --- a/spec/build/bsps/arm/lm3s69xx/optuartbaud.yml +++ b/spec/build/bsps/arm/lm3s69xx/optuartbaud.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 115200 description: | baud for UARTs enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optudma.yml b/spec/build/bsps/arm/lm3s69xx/optudma.yml index 88aae5094c..2a7f2c182d 100644 --- a/spec/build/bsps/arm/lm3s69xx/optudma.yml +++ b/spec/build/bsps/arm/lm3s69xx/optudma.yml @@ -4,15 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/lm3s3749.* -- value: true - variants: - - arm/lm4f.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s3749 + - arm/lm4f120 + value: true +- enabled-by: true + value: false description: | defined if MCU supports UDMA enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml b/spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml index d034385cd3..e775d0b082 100644 --- a/spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml +++ b/spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml @@ -4,18 +4,18 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: -- value: 14 - variants: - - arm/lm3s6965.* -- value: 16 - variants: - - arm/lm3s3749.* -- value: 21 - variants: - - arm/lm4f120.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965 + - arm/lm3s6965_qemu + value: 0x0000000e +- enabled-by: arm/lm3s3749 + value: 0x00000010 +- enabled-by: arm/lm4f120 + value: 0x00000015 +- enabled-by: true + value: 0x00000000 description: | crystal configuration for RCC register enabled-by: true diff --git a/spec/build/bsps/arm/lm3s69xx/tstlm3s3749.yml b/spec/build/bsps/arm/lm3s69xx/tstlm3s3749.yml index 05ee3fc21f..aa4da6aae0 100644 --- a/spec/build/bsps/arm/lm3s69xx/tstlm3s3749.yml +++ b/spec/build/bsps/arm/lm3s69xx/tstlm3s3749.yml @@ -1,37 +1,35 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - capture: exclude - cdtest: exclude - fileio: exclude - fsdosfsformat01: exclude - fsrfsbitmap01: exclude - ftp01: exclude - iostream: exclude - loopback: exclude - math: exclude - mdosfsfserror: exclude - mdosfsfsrdwr: exclude - mghttpd01: exclude - monitor02: exclude - paranoia: exclude - pppd: exclude - psxmsgq01: exclude - rcxx01: exclude - record01: exclude - rtems: exclude - shell01: exclude - spcxx01: exclude - sptls02: exclude - syscall01: exclude - telnetd01: exclude - ttest01: exclude - utf8proc01: exclude + reason: null + state: exclude + tests: + - capture + - cdtest + - fileio + - fsdosfsformat01 + - fsrfsbitmap01 + - iostream + - math + - mdosfsfserror + - mdosfsfsrdwr + - monitor + - monitor02 + - paranoia + - psxmsgq01 + - rcxx01 + - record01 + - rtems + - shell01 + - spcxx01 + - sptls02 + - syscall01 + - ttest01 + - utf8proc01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lm3s69xx/tstlm3s6965.yml b/spec/build/bsps/arm/lm3s69xx/tstlm3s6965.yml index 2b081b4bd9..dc1822019c 100644 --- a/spec/build/bsps/arm/lm3s69xx/tstlm3s6965.yml +++ b/spec/build/bsps/arm/lm3s69xx/tstlm3s6965.yml @@ -1,20 +1,19 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - fileio: exclude - ftp01: exclude - iostream: exclude - mghttpd01: exclude - monitor02: exclude - pppd: exclude - rcxx01: exclude - rtems: exclude - utf8proc01: exclude + reason: null + state: exclude + tests: + - fileio + - iostream + - monitor02 + - rcxx01 + - rtems + - utf8proc01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lm3s69xx/tstlm4f120.yml b/spec/build/bsps/arm/lm3s69xx/tstlm4f120.yml index f11ad4ed46..d3e32502bb 100644 --- a/spec/build/bsps/arm/lm3s69xx/tstlm4f120.yml +++ b/spec/build/bsps/arm/lm3s69xx/tstlm4f120.yml @@ -1,37 +1,34 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - block08: exclude - capture: exclude - fileio: exclude - ftp01: exclude - iostream: exclude - loopback: exclude - mghttpd01: exclude - ostream: exclude - pppd: exclude - psxaio01: exclude - psxaio02: exclude - psxaio03: exclude - psxsignal07: exclude - rcxx01: exclude - sp16: exclude - sp25: exclude - sp42: exclude - sp48: exclude - sp71: exclude - spregionerr01: exclude - sptimecounter02: exclude - sptimecounter03: exclude - telnetd01: exclude - tmcontext01: exclude - top: exclude - utf8proc01: exclude + reason: null + state: exclude + tests: + - block08 + - capture + - fileio + - iostream + - ostream + - psxaio01 + - psxaio02 + - psxaio03 + - psxsignal07 + - rcxx01 + - sp16 + - sp25 + - sp42 + - sp48 + - sp71 + - spregionerr01 + - sptimecounter02 + - sptimecounter03 + - tmcontext01 + - top + - utf8proc01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc176x/abi.yml b/spec/build/bsps/arm/lpc176x/abi.yml index 77d5db8cf7..7e0e429986 100644 --- a/spec/build/bsps/arm/lpc176x/abi.yml +++ b/spec/build/bsps/arm/lpc176x/abi.yml @@ -5,11 +5,12 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mthumb -- -mcpu=cortex-m3 -default-by-variant: [] +- enabled-by: true + value: + - -mthumb + - -mcpu=cortex-m3 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/bsplpc1768mbed.yml b/spec/build/bsps/arm/lpc176x/bsplpc1768mbed.yml index 189ef44c63..082e59a7c1 100644 --- a/spec/build/bsps/arm/lpc176x/bsplpc1768mbed.yml +++ b/spec/build/bsps/arm/lpc176x/bsplpc1768mbed.yml @@ -4,7 +4,7 @@ bsp: lpc1768_mbed build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc176x @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstlpc1768mbed - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbram.yml b/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbram.yml index 705599cbb8..8c3df7ebdb 100644 --- a/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbram.yml +++ b/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbram.yml @@ -4,7 +4,7 @@ bsp: lpc1768_mbed_ahb_ram build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc176x @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstlpc1768mbedahbram - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbrameth.yml b/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbrameth.yml index 4d1dddef55..7e99065532 100644 --- a/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbrameth.yml +++ b/spec/build/bsps/arm/lpc176x/bsplpc1768mbedahbrameth.yml @@ -4,7 +4,7 @@ bsp: lpc1768_mbed_ahb_ram_eth build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc176x @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstlpc1768mbedahbrameth - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc176x/grp.yml b/spec/build/bsps/arm/lpc176x/grp.yml index fba2a13cd8..6eb59aad94 100644 --- a/spec/build/bsps/arm/lpc176x/grp.yml +++ b/spec/build/bsps/arm/lpc176x/grp.yml @@ -1,7 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] @@ -46,6 +49,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../bspopts type: build use-after: [] diff --git a/spec/build/bsps/arm/lpc176x/obj.yml b/spec/build/bsps/arm/lpc176x/obj.yml index e44360495d..8cde127ca1 100644 --- a/spec/build/bsps/arm/lpc176x/obj.yml +++ b/spec/build/bsps/arm/lpc176x/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -11,7 +11,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/lpc176x/include/bsp.h - - bsps/arm/lpc176x/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/lpc176x/include/bsp/adc-defs.h @@ -74,7 +73,6 @@ source: - bsps/shared/dev/serial/uart-output-char.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/lpc176x/optcclk.yml b/spec/build/bsps/arm/lpc176x/optcclk.yml index 5df9f0a5e2..19837d5e4c 100644 --- a/spec/build/bsps/arm/lpc176x/optcclk.yml +++ b/spec/build/bsps/arm/lpc176x/optcclk.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 96000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 96000000 description: | CPU clock in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optconcfg.yml b/spec/build/bsps/arm/lpc176x/optconcfg.yml index 98ff2a9325..7bbc04f786 100644 --- a/spec/build/bsps/arm/lpc176x/optconcfg.yml +++ b/spec/build/bsps/arm/lpc176x/optconcfg.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | configuration for console (UART 0) enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optdmachn.yml b/spec/build/bsps/arm/lpc176x/optdmachn.yml index a7c288b3c7..bc10a9e013 100644 --- a/spec/build/bsps/arm/lpc176x/optdmachn.yml +++ b/spec/build/bsps/arm/lpc176x/optdmachn.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 2 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 2 description: | DMA channel count enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optlpc1768.yml b/spec/build/bsps/arm/lpc176x/optlpc1768.yml index 9d9673b002..0f1d62684a 100644 --- a/spec/build/bsps/arm/lpc176x/optlpc1768.yml +++ b/spec/build/bsps/arm/lpc176x/optlpc1768.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | target used for identify LPC1768 board enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optmintskstksz.yml b/spec/build/bsps/arm/lpc176x/optmintskstksz.yml index 57e77ae551..ab61e0e502 100644 --- a/spec/build/bsps/arm/lpc176x/optmintskstksz.yml +++ b/spec/build/bsps/arm/lpc176x/optmintskstksz.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1024 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 1024 description: | Suggested minimum task stack size in bytes enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optoscmain.yml b/spec/build/bsps/arm/lpc176x/optoscmain.yml index eccce9a3ea..ae99169430 100644 --- a/spec/build/bsps/arm/lpc176x/optoscmain.yml +++ b/spec/build/bsps/arm/lpc176x/optoscmain.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 12000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 12000000 description: | main oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optoscrtc.yml b/spec/build/bsps/arm/lpc176x/optoscrtc.yml index a5eff014e9..9a7f6789f5 100644 --- a/spec/build/bsps/arm/lpc176x/optoscrtc.yml +++ b/spec/build/bsps/arm/lpc176x/optoscrtc.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 32768 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 32768 description: | RTC oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optpclkdiv.yml b/spec/build/bsps/arm/lpc176x/optpclkdiv.yml index 4027f8ad17..8b87c8527a 100644 --- a/spec/build/bsps/arm/lpc176x/optpclkdiv.yml +++ b/spec/build/bsps/arm/lpc176x/optpclkdiv.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 1 description: | clock divider for default PCLK (PCLK = CCLK / PCLKDIV) enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optstopgpdma.yml b/spec/build/bsps/arm/lpc176x/optstopgpdma.yml index d407af65e7..9ad72e16f7 100644 --- a/spec/build/bsps/arm/lpc176x/optstopgpdma.yml +++ b/spec/build/bsps/arm/lpc176x/optstopgpdma.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | stop general purpose DMA at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optstopusb.yml b/spec/build/bsps/arm/lpc176x/optstopusb.yml index 708a5bb41c..e68660604f 100644 --- a/spec/build/bsps/arm/lpc176x/optstopusb.yml +++ b/spec/build/bsps/arm/lpc176x/optstopusb.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | stop USB controller at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optuart1cfg.yml b/spec/build/bsps/arm/lpc176x/optuart1cfg.yml index ec9d9843d5..4e289d89ec 100644 --- a/spec/build/bsps/arm/lpc176x/optuart1cfg.yml +++ b/spec/build/bsps/arm/lpc176x/optuart1cfg.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | Use Uart 1 enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/optuartbaud.yml b/spec/build/bsps/arm/lpc176x/optuartbaud.yml index c5e094beef..ec10461323 100644 --- a/spec/build/bsps/arm/lpc176x/optuartbaud.yml +++ b/spec/build/bsps/arm/lpc176x/optuartbaud.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 9600 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 9600 description: | baud for UARTs enabled-by: true diff --git a/spec/build/bsps/arm/lpc176x/tstlpc1768mbed.yml b/spec/build/bsps/arm/lpc176x/tstlpc1768mbed.yml index 566f53a2a3..57a2ec206c 100644 --- a/spec/build/bsps/arm/lpc176x/tstlpc1768mbed.yml +++ b/spec/build/bsps/arm/lpc176x/tstlpc1768mbed.yml @@ -1,34 +1,31 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - block08: exclude - capture: exclude - fileio: exclude - ftp01: exclude - iostream: exclude - loopback: exclude - mghttpd01: exclude - pppd: exclude - psxaio01: exclude - psxaio02: exclude - psxsignal07: exclude - rtems: exclude - sp16: exclude - sp25: exclude - sp42: exclude - sp48: exclude - sptimecounter02: exclude - sptimecounter03: exclude - telnetd01: exclude - tmcontext01: exclude - tmfine01: exclude - top: exclude - utf8proc01: exclude + reason: null + state: exclude + tests: + - block08 + - capture + - fileio + - iostream + - psxaio01 + - psxaio02 + - psxsignal07 + - rtems + - sp16 + - sp25 + - sp42 + - sp48 + - sptimecounter02 + - sptimecounter03 + - tmcontext01 + - tmfine01 + - top + - utf8proc01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbram.yml b/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbram.yml index 5f4d24d544..8b0c33b0dc 100644 --- a/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbram.yml +++ b/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbram.yml @@ -1,35 +1,33 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - block08: exclude - capture: exclude - fileio: exclude - ftp01: exclude - iostream: exclude - loopback: exclude - mghttpd01: exclude - pppd: exclude - psxaio01: exclude - psxaio02: exclude - psxaio03: exclude - psxsignal07: exclude - rtems: exclude - sp16: exclude - sp25: exclude - sp42: exclude - sp48: exclude - sptimecounter02: exclude - sptimecounter03: exclude - sptls02: exclude - tmcontext01: exclude - tmfine01: exclude - top: exclude - utf8proc01: exclude + reason: null + state: exclude + tests: + - block08 + - capture + - fileio + - iostream + - psxaio01 + - psxaio02 + - psxaio03 + - psxsignal07 + - rtems + - sp16 + - sp25 + - sp42 + - sp48 + - sptimecounter02 + - sptimecounter03 + - sptls02 + - tmcontext01 + - tmfine01 + - top + - utf8proc01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbrameth.yml b/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbrameth.yml index 4760c9d08c..d558b479b2 100644 --- a/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbrameth.yml +++ b/spec/build/bsps/arm/lpc176x/tstlpc1768mbedahbrameth.yml @@ -1,135 +1,132 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - block08: exclude - calloc: exclude - capture: exclude - cdtest: exclude - clockgettime: exclude - close: exclude - debugger01: exclude - defaultconfig01: exclude - dhrystone: exclude - dup2: exclude - fcntl: exclude - fileio: exclude - flockfile: exclude - fork: exclude - free: exclude - fsdosfswrite01: exclude - fsrfsbitmap01: exclude - fstat: exclude - ftp01: exclude - ftrylockfile: exclude - funlockfile: exclude - getlogin: exclude - getpwnam: exclude - getpwuid: exclude - gettimeofday: exclude - getuid: exclude - heapwalk: exclude - htonl: exclude - imfsfserror: exclude - imfsfslink: exclude - imfsfspatheval: exclude - imfsfspermission: exclude - imfsfsrdwr: exclude - imfsfsscandir01: exclude - imfsfssymlink: exclude - imfsfstime: exclude - iostream: exclude - kill: exclude - longjmp: exclude - loopback: exclude - lseek: exclude - lstat: exclude - malloc: exclude - mdosfsfserror: exclude - mdosfsfspatheval: exclude - mdosfsfsrdwr: exclude - mdosfsfsscandir01: exclude - mdosfsfsstatvfs: exclude - mdosfsfstime: exclude - mghttpd01: exclude - mimfsfserror: exclude - mimfsfslink: exclude - mimfsfspatheval: exclude - mimfsfspermission: exclude - mimfsfsrdwr: exclude - mimfsfsrename: exclude - mimfsfsscandir01: exclude - mimfsfssymlink: exclude - mimfsfstime: exclude - monitor: exclude - monitor01: exclude - monitor02: exclude - nanosleep: exclude - open: exclude - pipe: exclude - posixmemalign: exclude - pppd: exclude - psxaio01: exclude - psxaio02: exclude - psxaio03: exclude - psxbarrier01: exclude - psxkey07: exclude - psxkey08: exclude - psxsignal02: exclude - psxsignal07: exclude - rbheap01: exclude - read: exclude - readv: exclude - realloc: exclude - rtems: exclude - setjmp: exclude - sigaddset: exclude - sigdelset: exclude - sigemptyset: exclude - sigfillset: exclude - sigismember: exclude - sigprocmask: exclude - sp01: exclude - sp16: exclude - sp20: exclude - sp25: exclude - sp35: exclude - sp42: exclude - sp48: exclude - spclockerr01: exclude - speventerr03: exclude - spintrerr01: exclude - spmsgqerr01: exclude - spmsgqerr02: exclude - spporterr01: exclude - spratemonerr01: exclude - spregionerr01: exclude - spsemerr01: exclude - spsemerr02: exclude - spsignalerr01: exclude - spstkalloc: exclude - sptaskerr01: exclude - sptaskerr03: exclude - sptimecounter02: exclude - sptimecounter03: exclude - sptls02: exclude - stat: exclude - telnetd01: exclude - tm21: exclude - tmcontext01: exclude - tmfine01: exclude - top: exclude - unlink: exclude - utf8proc01: exclude - vfork: exclude - wait: exclude - waitpid: exclude - write: exclude - writev: exclude + reason: null + state: exclude + tests: + - block08 + - calloc + - capture + - cdtest + - clockgettime + - close + - debugger01 + - defaultconfig01 + - dhrystone + - dup2 + - fcntl + - fileio + - flockfile + - fork + - free + - fsdosfswrite01 + - fsrfsbitmap01 + - fstat + - ftrylockfile + - funlockfile + - getlogin + - getpwnam + - getpwuid + - gettimeofday + - getuid + - heapwalk + - htonl + - imfsfserror + - imfsfslink + - imfsfspatheval + - imfsfspermission + - imfsfsrdwr + - imfsfsscandir01 + - imfsfssymlink + - imfsfstime + - iostream + - kill + - longjmp + - lseek + - lstat + - malloc + - mdosfsfserror + - mdosfsfspatheval + - mdosfsfsrdwr + - mdosfsfsscandir01 + - mdosfsfsstatvfs + - mdosfsfstime + - mimfsfserror + - mimfsfslink + - mimfsfspatheval + - mimfsfspermission + - mimfsfsrdwr + - mimfsfsrename + - mimfsfsscandir01 + - mimfsfssymlink + - mimfsfstime + - monitor + - monitor01 + - monitor02 + - nanosleep + - open + - pipe + - posixmemalign + - psxaio01 + - psxaio02 + - psxaio03 + - psxbarrier01 + - psxkey07 + - psxkey08 + - psxsignal02 + - psxsignal07 + - rbheap01 + - read + - readv + - realloc + - rtems + - setjmp + - sigaddset + - sigdelset + - sigemptyset + - sigfillset + - sigismember + - sigprocmask + - sp01 + - sp16 + - sp20 + - sp25 + - sp35 + - sp42 + - sp48 + - spclockerr01 + - speventerr03 + - spintrerr01 + - spmsgqerr01 + - spmsgqerr02 + - spporterr01 + - spratemonerr01 + - spregionerr01 + - spsemerr01 + - spsemerr02 + - spsignalerr01 + - spstkalloc + - sptaskerr01 + - sptaskerr03 + - sptimecounter02 + - sptimecounter03 + - sptls02 + - stat + - tm21 + - tmcontext01 + - tmfine01 + - top + - unlink + - utf8proc01 + - vfork + - wait + - waitpid + - write + - writev build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc24xx/abi.yml b/spec/build/bsps/arm/lpc24xx/abi.yml index e032f2d9a6..7269ec56aa 100644 --- a/spec/build/bsps/arm/lpc24xx/abi.yml +++ b/spec/build/bsps/arm/lpc24xx/abi.yml @@ -5,27 +5,28 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mcpu=arm7tdmi-s -- -mthumb -default-by-variant: -- value: - - -mthumb - - -mcpu=cortex-m3 - variants: +- enabled-by: - arm/lpc17xx_ea_ram - arm/lpc17xx_ea_rom_int - arm/lpc17xx_plx800_ram - arm/lpc17xx_plx800_rom_int -- value: + value: + - -mthumb + - -mcpu=cortex-m3 +- enabled-by: + - arm/lpc40xx_ea_ram + - arm/lpc40xx_ea_rom_int + value: - -mcpu=cortex-m4 - -mthumb - -mfloat-abi=hard - -mfpu=auto - variants: - - arm/lpc40xx_ea_ram - - arm/lpc40xx_ea_rom_int +- enabled-by: true + value: + - -mcpu=arm7tdmi-s + - -mthumb description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc17xxearam.yml b/spec/build/bsps/arm/lpc24xx/bsplpc17xxearam.yml index 181c49c60a..00aa729bbd 100644 --- a/spec/build/bsps/arm/lpc24xx/bsplpc17xxearam.yml +++ b/spec/build/bsps/arm/lpc24xx/bsplpc17xxearam.yml @@ -4,7 +4,7 @@ bsp: lpc17xx_ea_ram build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc17xxearomint.yml b/spec/build/bsps/arm/lpc24xx/bsplpc17xxearomint.yml index ad6e72110a..9e33c51d46 100644 --- a/spec/build/bsps/arm/lpc24xx/bsplpc17xxearomint.yml +++ b/spec/build/bsps/arm/lpc24xx/bsplpc17xxearomint.yml @@ -4,7 +4,7 @@ bsp: lpc17xx_ea_rom_int build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstlpc17xxearomint - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800ram.yml b/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800ram.yml index c19e6174f0..f50837d5b6 100644 --- a/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800ram.yml +++ b/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800ram.yml @@ -4,7 +4,7 @@ bsp: lpc17xx_plx800_ram build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800romint.yml b/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800romint.yml index ec07975717..14309b51fd 100644 --- a/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800romint.yml +++ b/spec/build/bsps/arm/lpc24xx/bsplpc17xxplx800romint.yml @@ -4,7 +4,7 @@ bsp: lpc17xx_plx800_rom_int build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstlpc17xxplx800romint - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc2362.yml b/spec/build/bsps/arm/lpc24xx/bsplpc2362.yml index 8e738f0156..8a9defe6a1 100644 --- a/spec/build/bsps/arm/lpc24xx/bsplpc2362.yml +++ b/spec/build/bsps/arm/lpc24xx/bsplpc2362.yml @@ -4,7 +4,7 @@ bsp: lpc2362 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstlpc23xx - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc23xxtli800.yml b/spec/build/bsps/arm/lpc24xx/bsplpc23xxtli800.yml index 183b522591..e2c0f96b30 100644 --- a/spec/build/bsps/arm/lpc24xx/bsplpc23xxtli800.yml +++ b/spec/build/bsps/arm/lpc24xx/bsplpc23xxtli800.yml @@ -4,7 +4,7 @@ bsp: lpc23xx_tli800 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstlpc23xx - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc24xxea.yml b/spec/build/bsps/arm/lpc24xx/bsplpc24xxea.yml index 8aa5210101..b0a05a1a52 100644 --- a/spec/build/bsps/arm/lpc24xx/bsplpc24xxea.yml +++ b/spec/build/bsps/arm/lpc24xx/bsplpc24xxea.yml @@ -4,7 +4,7 @@ bsp: lpc24xx_ea build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc40xxearam.yml b/spec/build/bsps/arm/lpc24xx/bsplpc40xxearam.yml index 74dd4b4e0f..ae235fd19e 100644 --- a/spec/build/bsps/arm/lpc24xx/bsplpc40xxearam.yml +++ b/spec/build/bsps/arm/lpc24xx/bsplpc40xxearam.yml @@ -4,7 +4,7 @@ bsp: lpc40xx_ea_ram build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bsplpc40xxearomint.yml b/spec/build/bsps/arm/lpc24xx/bsplpc40xxearomint.yml index babf218f6d..89ed32eb6a 100644 --- a/spec/build/bsps/arm/lpc24xx/bsplpc40xxearomint.yml +++ b/spec/build/bsps/arm/lpc24xx/bsplpc40xxearomint.yml @@ -4,7 +4,7 @@ bsp: lpc40xx_ea_rom_int build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstlpc40xxearomint - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bspncsram.yml b/spec/build/bsps/arm/lpc24xx/bspncsram.yml index f5fd8fb730..8b5eb4f1d7 100644 --- a/spec/build/bsps/arm/lpc24xx/bspncsram.yml +++ b/spec/build/bsps/arm/lpc24xx/bspncsram.yml @@ -4,7 +4,7 @@ bsp: lpc24xx_ncs_ram build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bspncsromext.yml b/spec/build/bsps/arm/lpc24xx/bspncsromext.yml index 219538f4ba..9220e0e7e4 100644 --- a/spec/build/bsps/arm/lpc24xx/bspncsromext.yml +++ b/spec/build/bsps/arm/lpc24xx/bspncsromext.yml @@ -4,7 +4,7 @@ bsp: lpc24xx_ncs_rom_ext build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bspncsromint.yml b/spec/build/bsps/arm/lpc24xx/bspncsromint.yml index ad3066f149..7a35bc1f1f 100644 --- a/spec/build/bsps/arm/lpc24xx/bspncsromint.yml +++ b/spec/build/bsps/arm/lpc24xx/bspncsromint.yml @@ -4,7 +4,7 @@ bsp: lpc24xx_ncs_rom_int build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstncsromint - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bspplx800ram.yml b/spec/build/bsps/arm/lpc24xx/bspplx800ram.yml index 1b67bf9030..d4a794526f 100644 --- a/spec/build/bsps/arm/lpc24xx/bspplx800ram.yml +++ b/spec/build/bsps/arm/lpc24xx/bspplx800ram.yml @@ -4,7 +4,7 @@ bsp: lpc24xx_plx800_ram build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/bspplx800romint.yml b/spec/build/bsps/arm/lpc24xx/bspplx800romint.yml index d205aca3b3..e105672026 100644 --- a/spec/build/bsps/arm/lpc24xx/bspplx800romint.yml +++ b/spec/build/bsps/arm/lpc24xx/bspplx800romint.yml @@ -4,7 +4,7 @@ bsp: lpc24xx_plx800_rom_int build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc24xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstplx800romint - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc24xx/grp.yml b/spec/build/bsps/arm/lpc24xx/grp.yml index 8f10392b4a..780d484fb0 100644 --- a/spec/build/bsps/arm/lpc24xx/grp.yml +++ b/spec/build/bsps/arm/lpc24xx/grp.yml @@ -1,7 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] @@ -76,6 +79,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../bspopts type: build use-after: [] diff --git a/spec/build/bsps/arm/lpc24xx/obj.yml b/spec/build/bsps/arm/lpc24xx/obj.yml index 3ad44ba1ba..a15f17f5c9 100644 --- a/spec/build/bsps/arm/lpc24xx/obj.yml +++ b/spec/build/bsps/arm/lpc24xx/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -11,7 +11,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/lpc24xx/include/bsp.h - - bsps/arm/lpc24xx/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/lpc24xx/include/bsp/dma.h @@ -84,7 +83,6 @@ source: - bsps/shared/dev/serial/uart-output-char.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/lpc24xx/optcclk.yml b/spec/build/bsps/arm/lpc24xx/optcclk.yml index aacf2192c2..f16a3c0ea6 100644 --- a/spec/build/bsps/arm/lpc24xx/optcclk.yml +++ b/spec/build/bsps/arm/lpc24xx/optcclk.yml @@ -4,21 +4,24 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 72000000 -default-by-variant: -- value: 96000000 - variants: - - arm/lpc17xx_ea.* -- value: 96000000 - variants: - - arm/lpc40xx_ea.* -- value: 58982400 - variants: - - arm/lpc23.* -- value: 51612800 - variants: - - arm/lpc24xx_plx800_.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc17xx_ea_ram + - arm/lpc17xx_ea_rom_int + - arm/lpc40xx_ea_ram + - arm/lpc40xx_ea_rom_int + value: 96000000 +- enabled-by: + - arm/lpc2362 + - arm/lpc23xx_tli800 + value: 58982400 +- enabled-by: + - arm/lpc24xx_plx800_ram + - arm/lpc24xx_plx800_rom_int + value: 51612800 +- enabled-by: true + value: 72000000 description: | CPU clock in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optconcfg.yml b/spec/build/bsps/arm/lpc24xx/optconcfg.yml index 4e09164cdf..176d990673 100644 --- a/spec/build/bsps/arm/lpc24xx/optconcfg.yml +++ b/spec/build/bsps/arm/lpc24xx/optconcfg.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | configuration for console (UART 0) enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optdmachn.yml b/spec/build/bsps/arm/lpc24xx/optdmachn.yml index 1a67589bfc..1df0ae3af1 100644 --- a/spec/build/bsps/arm/lpc24xx/optdmachn.yml +++ b/spec/build/bsps/arm/lpc24xx/optdmachn.yml @@ -4,15 +4,21 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 2 -default-by-variant: -- value: 8 - variants: - - arm/lpc17.* -- value: 8 - variants: - - arm/lpc40.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc1768_mbed + - arm/lpc1768_mbed_ahb_ram + - arm/lpc1768_mbed_ahb_ram_eth + - arm/lpc17xx_ea_ram + - arm/lpc17xx_ea_rom_int + - arm/lpc17xx_plx800_ram + - arm/lpc17xx_plx800_rom_int + - arm/lpc40xx_ea_ram + - arm/lpc40xx_ea_rom_int + value: 8 +- enabled-by: true + value: 2 description: | DMA channel count enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml b/spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml index 8851dadfa7..b6dad8f5e7 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml @@ -4,15 +4,16 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1 -default-by-variant: -- value: 2 - variants: - - arm/lpc17xx_ea.* -- value: 2 - variants: - - arm/lpc40xx_ea.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc17xx_ea_ram + - arm/lpc17xx_ea_rom_int + - arm/lpc40xx_ea_ram + - arm/lpc40xx_ea_rom_int + value: 2 +- enabled-by: true + value: 1 description: | clock divider for EMCCLK (EMCCLK = CCLK / EMCCLKDIV) enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml b/spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml index de40eca73a..f1cd816d0d 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml @@ -4,15 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/lpc17xx_ea_rom_.* -- value: true - variants: - - arm/lpc40xx_ea_rom_.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc17xx_ea_rom_int + - arm/lpc40xx_ea_rom_int + value: true +- enabled-by: true + value: false description: | enable ISSI IS42S32800B configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml b/spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml index e7ad228709..98c1bababf 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml @@ -4,12 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/.*_plx800_rom_.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc17xx_plx800_rom_int + - arm/lpc24xx_plx800_rom_int + value: true +- enabled-by: true + value: false description: | enable ISSI IS42S32800D7 configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml b/spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml index 40a4bfbf71..cd9a349c90 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml @@ -4,12 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/lpc24xx_ncs_rom_.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc24xx_ncs_rom_ext + - arm/lpc24xx_ncs_rom_int + value: true +- enabled-by: true + value: false description: | enable M29W160E configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml b/spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml index a32c1a3eb6..92620a6d73 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml @@ -4,12 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/.*_plx800_rom_.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc17xx_plx800_rom_int + - arm/lpc24xx_plx800_rom_int + value: true +- enabled-by: true + value: false description: | enable M29W320E70 configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml b/spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml index ab6f25fef8..711b78c921 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml @@ -4,12 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/lpc24xx_ncs_rom_.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc24xx_ncs_rom_ext + - arm/lpc24xx_ncs_rom_int + value: true +- enabled-by: true + value: false description: | enable Micron MT48LC4M16A2 configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcsst39vf3201.yml b/spec/build/bsps/arm/lpc24xx/optemcsst39vf3201.yml index 851c28a275..83594fa4e1 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcsst39vf3201.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcsst39vf3201.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | enable SST39VF3201 configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemctest.yml b/spec/build/bsps/arm/lpc24xx/optemctest.yml index 4153bd2664..af5cee4c34 100644 --- a/spec/build/bsps/arm/lpc24xx/optemctest.yml +++ b/spec/build/bsps/arm/lpc24xx/optemctest.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | enable tests for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optemcw9825g2jb75i.yml b/spec/build/bsps/arm/lpc24xx/optemcw9825g2jb75i.yml index 2be3f76372..10070cc160 100644 --- a/spec/build/bsps/arm/lpc24xx/optemcw9825g2jb75i.yml +++ b/spec/build/bsps/arm/lpc24xx/optemcw9825g2jb75i.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | enable Winbond W9825G2JB75I configuration for EMC enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optethdownpin.yml b/spec/build/bsps/arm/lpc24xx/optethdownpin.yml index c3889b0eea..cfea1923aa 100644 --- a/spec/build/bsps/arm/lpc24xx/optethdownpin.yml +++ b/spec/build/bsps/arm/lpc24xx/optethdownpin.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | optional Ethernet power-down pin, output is set to high to enable power enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optethrmii.yml b/spec/build/bsps/arm/lpc24xx/optethrmii.yml index c7c3627c82..1cfc3a99a0 100644 --- a/spec/build/bsps/arm/lpc24xx/optethrmii.yml +++ b/spec/build/bsps/arm/lpc24xx/optethrmii.yml @@ -4,12 +4,16 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/.*_ea_.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc17xx_ea_ram + - arm/lpc17xx_ea_rom_int + - arm/lpc40xx_ea_ram + - arm/lpc40xx_ea_rom_int + value: true +- enabled-by: true + value: false description: | enable RMII for Ethernet enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optheapext.yml b/spec/build/bsps/arm/lpc24xx/optheapext.yml index b485eb6cc3..9047d83d80 100644 --- a/spec/build/bsps/arm/lpc24xx/optheapext.yml +++ b/spec/build/bsps/arm/lpc24xx/optheapext.yml @@ -4,12 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/lpc23.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc2362 + - arm/lpc23xx_tli800 + value: true +- enabled-by: true + value: false description: | enable heap extend by Ethernet and USB regions enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optoscmain.yml b/spec/build/bsps/arm/lpc24xx/optoscmain.yml index ec529345a1..bc09470b96 100644 --- a/spec/build/bsps/arm/lpc24xx/optoscmain.yml +++ b/spec/build/bsps/arm/lpc24xx/optoscmain.yml @@ -4,12 +4,14 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 12000000 -default-by-variant: -- value: 3686400 - variants: - - arm/lpc23.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc2362 + - arm/lpc23xx_tli800 + value: 3686400 +- enabled-by: true + value: 12000000 description: | main oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optoscrtc.yml b/spec/build/bsps/arm/lpc24xx/optoscrtc.yml index 0b66f8a553..74b9b8557c 100644 --- a/spec/build/bsps/arm/lpc24xx/optoscrtc.yml +++ b/spec/build/bsps/arm/lpc24xx/optoscrtc.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 32768 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 32768 description: | RTC oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optotgi2c.yml b/spec/build/bsps/arm/lpc24xx/optotgi2c.yml index 4e205cb0af..9901ebedc0 100644 --- a/spec/build/bsps/arm/lpc24xx/optotgi2c.yml +++ b/spec/build/bsps/arm/lpc24xx/optotgi2c.yml @@ -4,15 +4,16 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: -- value: 94 - variants: - - arm/lpc17xx_ea.* -- value: 94 - variants: - - arm/lpc40xx_ea.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc17xx_ea_ram + - arm/lpc17xx_ea_rom_int + - arm/lpc40xx_ea_ram + - arm/lpc40xx_ea_rom_int + value: 0x0000005e +- enabled-by: true + value: 0x00000000 description: | USB OTG transceiver I2C address used by USB stack enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optpclkdiv.yml b/spec/build/bsps/arm/lpc24xx/optpclkdiv.yml index 296486c78f..b717993f7c 100644 --- a/spec/build/bsps/arm/lpc24xx/optpclkdiv.yml +++ b/spec/build/bsps/arm/lpc24xx/optpclkdiv.yml @@ -4,15 +4,16 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1 -default-by-variant: -- value: 2 - variants: - - arm/lpc17xx_ea.* -- value: 2 - variants: - - arm/lpc40xx_ea.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc17xx_ea_ram + - arm/lpc17xx_ea_rom_int + - arm/lpc40xx_ea_ram + - arm/lpc40xx_ea_rom_int + value: 2 +- enabled-by: true + value: 1 description: | clock divider for default PCLK (PCLK = CCLK / PCLKDIV) enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optresetvec.yml b/spec/build/bsps/arm/lpc24xx/optresetvec.yml index a73530db7b..c2fb9fd906 100644 --- a/spec/build/bsps/arm/lpc24xx/optresetvec.yml +++ b/spec/build/bsps/arm/lpc24xx/optresetvec.yml @@ -4,12 +4,12 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: -- value: 2147483712 - variants: - - arm/lpc24xx_ncs_rom_ext +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/lpc24xx_ncs_rom_ext + value: 0x80000040 +- enabled-by: true + value: 0x00000000 description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optstopeth.yml b/spec/build/bsps/arm/lpc24xx/optstopeth.yml index 60f07f9a06..e1f1aeca49 100644 --- a/spec/build/bsps/arm/lpc24xx/optstopeth.yml +++ b/spec/build/bsps/arm/lpc24xx/optstopeth.yml @@ -4,12 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: - - arm/lpc23.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc2362 + - arm/lpc23xx_tli800 + value: false +- enabled-by: true + value: true description: | stop Ethernet controller at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optstopgpdma.yml b/spec/build/bsps/arm/lpc24xx/optstopgpdma.yml index 5705cc03ef..86c1d51f63 100644 --- a/spec/build/bsps/arm/lpc24xx/optstopgpdma.yml +++ b/spec/build/bsps/arm/lpc24xx/optstopgpdma.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | stop general purpose DMA at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optstopusb.yml b/spec/build/bsps/arm/lpc24xx/optstopusb.yml index 2f2bfc5c93..8ba1aa1cd7 100644 --- a/spec/build/bsps/arm/lpc24xx/optstopusb.yml +++ b/spec/build/bsps/arm/lpc24xx/optstopusb.yml @@ -4,12 +4,14 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: - - arm/lpc23.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc2362 + - arm/lpc23xx_tli800 + value: false +- enabled-by: true + value: true description: | stop USB controller at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optuart1cfg.yml b/spec/build/bsps/arm/lpc24xx/optuart1cfg.yml index c1f133f08f..1dbd346f29 100644 --- a/spec/build/bsps/arm/lpc24xx/optuart1cfg.yml +++ b/spec/build/bsps/arm/lpc24xx/optuart1cfg.yml @@ -4,12 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: false - variants: - - arm/.*_plx800_.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | configuration for UART 1 enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optuart2cfg.yml b/spec/build/bsps/arm/lpc24xx/optuart2cfg.yml index 3e523147ca..d4274fd414 100644 --- a/spec/build/bsps/arm/lpc24xx/optuart2cfg.yml +++ b/spec/build/bsps/arm/lpc24xx/optuart2cfg.yml @@ -4,18 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: false - variants: - - arm/lpc23.* -- value: false - variants: - - arm/lpc24xx_ncs_.* -- value: false - variants: - - arm/.*_plx800_.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | configuration for UART 2 enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optuart3cfg.yml b/spec/build/bsps/arm/lpc24xx/optuart3cfg.yml index 2af84c927d..dd2420bf30 100644 --- a/spec/build/bsps/arm/lpc24xx/optuart3cfg.yml +++ b/spec/build/bsps/arm/lpc24xx/optuart3cfg.yml @@ -4,15 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: false - variants: - - arm/lpc23.* -- value: false - variants: - - arm/lpc24xx_ncs_.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | configuration for UART 3 enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/optuartbaud.yml b/spec/build/bsps/arm/lpc24xx/optuartbaud.yml index e772d71381..9216e3c8e4 100644 --- a/spec/build/bsps/arm/lpc24xx/optuartbaud.yml +++ b/spec/build/bsps/arm/lpc24xx/optuartbaud.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 115200 description: | baud for UARTs enabled-by: true diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc17xxearomint.yml b/spec/build/bsps/arm/lpc24xx/tstlpc17xxearomint.yml index 7d60bda27a..4dba9d82b1 100644 --- a/spec/build/bsps/arm/lpc24xx/tstlpc17xxearomint.yml +++ b/spec/build/bsps/arm/lpc24xx/tstlpc17xxearomint.yml @@ -1,12 +1,14 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - fsdosfsname01: exclude + reason: null + state: exclude + tests: + - fsdosfsname01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc17xxplx800romint.yml b/spec/build/bsps/arm/lpc24xx/tstlpc17xxplx800romint.yml index 7d60bda27a..4dba9d82b1 100644 --- a/spec/build/bsps/arm/lpc24xx/tstlpc17xxplx800romint.yml +++ b/spec/build/bsps/arm/lpc24xx/tstlpc17xxplx800romint.yml @@ -1,12 +1,14 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - fsdosfsname01: exclude + reason: null + state: exclude + tests: + - fsdosfsname01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc23xx.yml b/spec/build/bsps/arm/lpc24xx/tstlpc23xx.yml index b1885e5e75..7802c271c6 100644 --- a/spec/build/bsps/arm/lpc24xx/tstlpc23xx.yml +++ b/spec/build/bsps/arm/lpc24xx/tstlpc23xx.yml @@ -1,67 +1,64 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - block08: exclude - capture: exclude - cdtest: exclude - complex: exclude - crypt01: exclude - fileio: exclude - fsdosfsformat01: exclude - fsdosfsname02: exclude - fsdosfssync01: exclude - fsdosfswrite01: exclude - fsrfsbitmap01: exclude - fsrofs01: exclude - ftp01: exclude - iostream: exclude - loopback: exclude - math: exclude - mathf: exclude - mdosfsfserror: exclude - mdosfsfspatheval: exclude - mdosfsfsrdwr: exclude - mdosfsfsscandir01: exclude - mdosfsfsstatvfs: exclude - mdosfsfstime: exclude - mghttpd01: exclude - monitor: exclude - monitor02: exclude - paranoia: exclude - pppd: exclude - psxaio01: exclude - psxaio02: exclude - psxaio03: exclude - psxfile01: exclude - psxmsgq01: exclude - psxsignal07: exclude - psxtimer01: exclude - rcxx01: exclude - record01: exclude - rtems: exclude - shell01: exclude - sp16: exclude - sp25: exclude - sp42: exclude - sp48: exclude - spcxx01: exclude - sptimecounter02: exclude - sptimecounter03: exclude - sptls02: exclude - syscall01: exclude - tar01: exclude - telnetd01: exclude - termios: exclude - tmcontext01: exclude - tmfine01: exclude - top: exclude - ttest01: exclude - utf8proc01: exclude + reason: null + state: exclude + tests: + - block08 + - capture + - cdtest + - complex + - crypt01 + - fileio + - fsdosfsformat01 + - fsdosfsname02 + - fsdosfssync01 + - fsdosfswrite01 + - fsrfsbitmap01 + - fsrofs01 + - iostream + - math + - mathf + - mdosfsfserror + - mdosfsfspatheval + - mdosfsfsrdwr + - mdosfsfsscandir01 + - mdosfsfsstatvfs + - mdosfsfstime + - monitor + - monitor02 + - paranoia + - psxaio01 + - psxaio02 + - psxaio03 + - psxfile01 + - psxmsgq01 + - psxsignal07 + - psxtimer01 + - rcxx01 + - record01 + - rtems + - shell01 + - sp16 + - sp25 + - sp42 + - sp48 + - spcxx01 + - sptimecounter02 + - sptimecounter03 + - sptls02 + - syscall01 + - tar01 + - termios + - tmcontext01 + - tmfine01 + - top + - ttest01 + - utf8proc01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc24xx/tstlpc40xxearomint.yml b/spec/build/bsps/arm/lpc24xx/tstlpc40xxearomint.yml index 7d60bda27a..4dba9d82b1 100644 --- a/spec/build/bsps/arm/lpc24xx/tstlpc40xxearomint.yml +++ b/spec/build/bsps/arm/lpc24xx/tstlpc40xxearomint.yml @@ -1,12 +1,14 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - fsdosfsname01: exclude + reason: null + state: exclude + tests: + - fsdosfsname01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc24xx/tstncsromint.yml b/spec/build/bsps/arm/lpc24xx/tstncsromint.yml index 7d60bda27a..4dba9d82b1 100644 --- a/spec/build/bsps/arm/lpc24xx/tstncsromint.yml +++ b/spec/build/bsps/arm/lpc24xx/tstncsromint.yml @@ -1,12 +1,14 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - fsdosfsname01: exclude + reason: null + state: exclude + tests: + - fsdosfsname01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc24xx/tstplx800romint.yml b/spec/build/bsps/arm/lpc24xx/tstplx800romint.yml index 7d60bda27a..4dba9d82b1 100644 --- a/spec/build/bsps/arm/lpc24xx/tstplx800romint.yml +++ b/spec/build/bsps/arm/lpc24xx/tstplx800romint.yml @@ -1,12 +1,14 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - fsdosfsname01: exclude + reason: null + state: exclude + tests: + - fsdosfsname01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/lpc32xx/abi.yml b/spec/build/bsps/arm/lpc32xx/abi.yml index ae245b4eb0..5aa98fb569 100644 --- a/spec/build/bsps/arm/lpc32xx/abi.yml +++ b/spec/build/bsps/arm/lpc32xx/abi.yml @@ -5,11 +5,12 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mcpu=arm926ej-s -- -mthumb -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=arm926ej-s + - -mthumb description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/bsplpc32xxmzx.yml b/spec/build/bsps/arm/lpc32xx/bsplpc32xxmzx.yml index 9a9762dd5d..633f551de6 100644 --- a/spec/build/bsps/arm/lpc32xx/bsplpc32xxmzx.yml +++ b/spec/build/bsps/arm/lpc32xx/bsplpc32xxmzx.yml @@ -4,7 +4,7 @@ bsp: lpc32xx_mzx build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc32xx @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc32xx/bspmzxstage1.yml b/spec/build/bsps/arm/lpc32xx/bspmzxstage1.yml index 09a70a0654..bcb3ce5d76 100644 --- a/spec/build/bsps/arm/lpc32xx/bspmzxstage1.yml +++ b/spec/build/bsps/arm/lpc32xx/bspmzxstage1.yml @@ -4,7 +4,7 @@ bsp: lpc32xx_mzx_stage_1 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc32xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstmzxstage1 - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc32xx/bspmzxstage2.yml b/spec/build/bsps/arm/lpc32xx/bspmzxstage2.yml index ff709b0bc3..c54a460a70 100644 --- a/spec/build/bsps/arm/lpc32xx/bspmzxstage2.yml +++ b/spec/build/bsps/arm/lpc32xx/bspmzxstage2.yml @@ -4,7 +4,7 @@ bsp: lpc32xx_mzx_stage_2 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc32xx @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc32xx/bspphycore.yml b/spec/build/bsps/arm/lpc32xx/bspphycore.yml index 74396727d6..231a6cf286 100644 --- a/spec/build/bsps/arm/lpc32xx/bspphycore.yml +++ b/spec/build/bsps/arm/lpc32xx/bspphycore.yml @@ -4,7 +4,7 @@ bsp: lpc32xx_phycore build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: lpc32xx @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/lpc32xx/grp.yml b/spec/build/bsps/arm/lpc32xx/grp.yml index 08355974d4..f8e7814431 100644 --- a/spec/build/bsps/arm/lpc32xx/grp.yml +++ b/spec/build/bsps/arm/lpc32xx/grp.yml @@ -1,7 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] @@ -76,6 +79,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../bspopts type: build use-after: [] diff --git a/spec/build/bsps/arm/lpc32xx/obj.yml b/spec/build/bsps/arm/lpc32xx/obj.yml index cafff20766..86dfda869a 100644 --- a/spec/build/bsps/arm/lpc32xx/obj.yml +++ b/spec/build/bsps/arm/lpc32xx/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -11,7 +11,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/lpc32xx/include/bsp.h - - bsps/arm/lpc32xx/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/lpc32xx/include/bsp/boot.h @@ -49,6 +48,7 @@ source: - bsps/arm/lpc32xx/start/bspstart.c - bsps/arm/lpc32xx/start/bspstarthooks.c - bsps/arm/lpc32xx/start/emc.c +- bsps/arm/lpc32xx/start/mmu.c - bsps/arm/lpc32xx/start/restart.c - bsps/arm/lpc32xx/start/system-clocks.c - bsps/arm/lpc32xx/start/timer.c @@ -63,7 +63,6 @@ source: - bsps/shared/dev/serial/uart-output-char.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/lpc32xx/optdismmu.yml b/spec/build/bsps/arm/lpc32xx/optdismmu.yml index b431f04841..46969f5cfb 100644 --- a/spec/build/bsps/arm/lpc32xx/optdismmu.yml +++ b/spec/build/bsps/arm/lpc32xx/optdismmu.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | disable MMU enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optdisroprot.yml b/spec/build/bsps/arm/lpc32xx/optdisroprot.yml index 5ce23607b8..1cd7adb6bd 100644 --- a/spec/build/bsps/arm/lpc32xx/optdisroprot.yml +++ b/spec/build/bsps/arm/lpc32xx/optdisroprot.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | disable MMU protection of read-only sections enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optdisrwdc.yml b/spec/build/bsps/arm/lpc32xx/optdisrwdc.yml index 55765c3e8e..7254f6095b 100644 --- a/spec/build/bsps/arm/lpc32xx/optdisrwdc.yml +++ b/spec/build/bsps/arm/lpc32xx/optdisrwdc.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | disable cache for read-write data sections enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optdmachn.yml b/spec/build/bsps/arm/lpc32xx/optdmachn.yml index 4c826a5f01..298a5d32ac 100644 --- a/spec/build/bsps/arm/lpc32xx/optdmachn.yml +++ b/spec/build/bsps/arm/lpc32xx/optdmachn.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 8 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 8 description: | DMA channel count enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optenwdgrst.yml b/spec/build/bsps/arm/lpc32xx/optenwdgrst.yml index d36a5c0398..d8a33c272c 100644 --- a/spec/build/bsps/arm/lpc32xx/optenwdgrst.yml +++ b/spec/build/bsps/arm/lpc32xx/optenwdgrst.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | bsp_reset() will use the watchdog to reset the chip enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optethrmii.yml b/spec/build/bsps/arm/lpc32xx/optethrmii.yml index ccb4c95abc..d90c2f63a9 100644 --- a/spec/build/bsps/arm/lpc32xx/optethrmii.yml +++ b/spec/build/bsps/arm/lpc32xx/optethrmii.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | enable RMII for Ethernet enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optoscmain.yml b/spec/build/bsps/arm/lpc32xx/optoscmain.yml index aadb9b6799..8f2535eae2 100644 --- a/spec/build/bsps/arm/lpc32xx/optoscmain.yml +++ b/spec/build/bsps/arm/lpc32xx/optoscmain.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 13000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 13000000 description: | main oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optoscrtc.yml b/spec/build/bsps/arm/lpc32xx/optoscrtc.yml index 09aab2d9c6..1485cca27f 100644 --- a/spec/build/bsps/arm/lpc32xx/optoscrtc.yml +++ b/spec/build/bsps/arm/lpc32xx/optoscrtc.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 32768 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 32768 description: | RTC oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optotgi2c.yml b/spec/build/bsps/arm/lpc32xx/optotgi2c.yml index 72137d9c27..442fa9bf94 100644 --- a/spec/build/bsps/arm/lpc32xx/optotgi2c.yml +++ b/spec/build/bsps/arm/lpc32xx/optotgi2c.yml @@ -4,12 +4,15 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: -- value: 88 - variants: - - arm/lpc32xx_mzx.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc32xx_mzx + - arm/lpc32xx_mzx_stage_1 + - arm/lpc32xx_mzx_stage_2 + value: 0x00000058 +- enabled-by: true + value: 0x00000000 description: | USB OTG transceiver I2C address used by USB stack enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optotgvbus.yml b/spec/build/bsps/arm/lpc32xx/optotgvbus.yml index 0d9d6b65f5..9d16923972 100644 --- a/spec/build/bsps/arm/lpc32xx/optotgvbus.yml +++ b/spec/build/bsps/arm/lpc32xx/optotgvbus.yml @@ -4,12 +4,15 @@ actions: - define-unquoted: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: USB_OTG_VBUS_POWER_WITH_CHARGE_PUMP - variants: - - arm/lpc32xx_mzx.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc32xx_mzx + - arm/lpc32xx_mzx_stage_1 + - arm/lpc32xx_mzx_stage_2 + value: USB_OTG_VBUS_POWER_WITH_CHARGE_PUMP +- enabled-by: true + value: false description: | USB OTG transceiver VBUS policy enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optperiphclk.yml b/spec/build/bsps/arm/lpc32xx/optperiphclk.yml index 70be8d51bf..32d5dab514 100644 --- a/spec/build/bsps/arm/lpc32xx/optperiphclk.yml +++ b/spec/build/bsps/arm/lpc32xx/optperiphclk.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 13000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 13000000 description: | peripheral clock in Hz enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optresetvec.yml b/spec/build/bsps/arm/lpc32xx/optresetvec.yml index efd1ea2b2a..206a6f2801 100644 --- a/spec/build/bsps/arm/lpc32xx/optresetvec.yml +++ b/spec/build/bsps/arm/lpc32xx/optresetvec.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optscratchsz.yml b/spec/build/bsps/arm/lpc32xx/optscratchsz.yml index c54f1ae7b3..8fc6268c08 100644 --- a/spec/build/bsps/arm/lpc32xx/optscratchsz.yml +++ b/spec/build/bsps/arm/lpc32xx/optscratchsz.yml @@ -4,12 +4,15 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: -- value: 4096 - variants: - - arm/lpc32xx_mzx.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lpc32xx_mzx + - arm/lpc32xx_mzx_stage_1 + - arm/lpc32xx_mzx_stage_2 + value: 4096 +- enabled-by: true + value: 0 description: | size of scratch area enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optstopeth.yml b/spec/build/bsps/arm/lpc32xx/optstopeth.yml index 2d430a1862..d4b66fcd6b 100644 --- a/spec/build/bsps/arm/lpc32xx/optstopeth.yml +++ b/spec/build/bsps/arm/lpc32xx/optstopeth.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | stop Ethernet controller at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optstopgpdma.yml b/spec/build/bsps/arm/lpc32xx/optstopgpdma.yml index 5096cc48a9..edb5f5df96 100644 --- a/spec/build/bsps/arm/lpc32xx/optstopgpdma.yml +++ b/spec/build/bsps/arm/lpc32xx/optstopgpdma.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | stop general purpose DMA at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optstopusb.yml b/spec/build/bsps/arm/lpc32xx/optstopusb.yml index e2bbc72f5f..8cd9014732 100644 --- a/spec/build/bsps/arm/lpc32xx/optstopusb.yml +++ b/spec/build/bsps/arm/lpc32xx/optstopusb.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | stop USB controller at start-up to avoid DMA interference enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optu3clk.yml b/spec/build/bsps/arm/lpc32xx/optu3clk.yml index e8aa25671f..311dd38bad 100644 --- a/spec/build/bsps/arm/lpc32xx/optu3clk.yml +++ b/spec/build/bsps/arm/lpc32xx/optu3clk.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 4998 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00001386 description: | clock configuration for UART 3 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optu4clk.yml b/spec/build/bsps/arm/lpc32xx/optu4clk.yml index 19c36967e1..76a396d2b3 100644 --- a/spec/build/bsps/arm/lpc32xx/optu4clk.yml +++ b/spec/build/bsps/arm/lpc32xx/optu4clk.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 4998 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00001386 description: | clock configuration for UART 4 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optu5clk.yml b/spec/build/bsps/arm/lpc32xx/optu5clk.yml index 66a67dea95..ac46b0b1d4 100644 --- a/spec/build/bsps/arm/lpc32xx/optu5clk.yml +++ b/spec/build/bsps/arm/lpc32xx/optu5clk.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 4998 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00001386 description: | clock configuration for UART 5 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optu6clk.yml b/spec/build/bsps/arm/lpc32xx/optu6clk.yml index 364e3143f9..30ea1f4a16 100644 --- a/spec/build/bsps/arm/lpc32xx/optu6clk.yml +++ b/spec/build/bsps/arm/lpc32xx/optu6clk.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 4998 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00001386 description: | clock configuration for UART 6 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart1baud.yml b/spec/build/bsps/arm/lpc32xx/optuart1baud.yml index d0b7a546db..4e9feac9f8 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart1baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart1baud.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | baud for UART 1 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart2baud.yml b/spec/build/bsps/arm/lpc32xx/optuart2baud.yml index 5bdf8be11b..1e9760d01c 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart2baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart2baud.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | baud for UART 2 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart3baud.yml b/spec/build/bsps/arm/lpc32xx/optuart3baud.yml index 95e63cf56e..7fa8f237f4 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart3baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart3baud.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 115200 description: | baud for UART 3 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart4baud.yml b/spec/build/bsps/arm/lpc32xx/optuart4baud.yml index d210bd3c6b..fce9eebfc3 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart4baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart4baud.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 115200 description: | baud for UART 4 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart5baud.yml b/spec/build/bsps/arm/lpc32xx/optuart5baud.yml index 0021d5c9ed..f602f1828e 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart5baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart5baud.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 115200 description: | baud for UART 5 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart6baud.yml b/spec/build/bsps/arm/lpc32xx/optuart6baud.yml index dc856fa33e..e11fdc3ef2 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart6baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart6baud.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 115200 description: | baud for UART 6 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/optuart7baud.yml b/spec/build/bsps/arm/lpc32xx/optuart7baud.yml index 867d534e57..fc19e71dee 100644 --- a/spec/build/bsps/arm/lpc32xx/optuart7baud.yml +++ b/spec/build/bsps/arm/lpc32xx/optuart7baud.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | baud for UART 7 enabled-by: true diff --git a/spec/build/bsps/arm/lpc32xx/tstmzxstage1.yml b/spec/build/bsps/arm/lpc32xx/tstmzxstage1.yml index ba2931a000..4db6d47dad 100644 --- a/spec/build/bsps/arm/lpc32xx/tstmzxstage1.yml +++ b/spec/build/bsps/arm/lpc32xx/tstmzxstage1.yml @@ -1,23 +1,22 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - fileio: exclude - fsdosfssync01: exclude - ftp01: exclude - iostream: exclude - mghttpd01: exclude - monitor02: exclude - pppd: exclude - rcxx01: exclude - rtems: exclude - sp71: exclude - ttest01: exclude - utf8proc01: exclude + reason: null + state: exclude + tests: + - fileio + - fsdosfssync01 + - iostream + - monitor02 + - rcxx01 + - rtems + - sp71 + - ttest01 + - utf8proc01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/opta9periphclk.yml b/spec/build/bsps/arm/opta9periphclk.yml index 8d8c240606..26aef392cb 100644 --- a/spec/build/bsps/arm/opta9periphclk.yml +++ b/spec/build/bsps/arm/opta9periphclk.yml @@ -6,15 +6,14 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 100000000 -default-by-variant: -- value: 333333333 - variants: - - arm/xilinx_zynq_zc702 -- value: 666666667 - variants: - - arm/xilinx_zynq_zedboard +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/xilinx_zynq_zc702 + value: 333333333 +- enabled-by: arm/xilinx_zynq_zedboard + value: 666666667 +- enabled-by: true + value: 100000000 description: | ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/optgiccpuif.yml b/spec/build/bsps/arm/optgiccpuif.yml index 53ffa49c93..fce08771f7 100644 --- a/spec/build/bsps/arm/optgiccpuif.yml +++ b/spec/build/bsps/arm/optgiccpuif.yml @@ -4,9 +4,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x2c000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x2c000000 description: | Defines the base address of the GIC CPU Interface. enabled-by: true diff --git a/spec/build/bsps/arm/optgicdist.yml b/spec/build/bsps/arm/optgicdist.yml index 710d3b13db..d8fe7eb761 100644 --- a/spec/build/bsps/arm/optgicdist.yml +++ b/spec/build/bsps/arm/optgicdist.yml @@ -4,12 +4,12 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x2f000000 -default-by-variant: -- value: 0xaf000000 - variants: - - arm/fvp_cortex_r52 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0xaf000000 +- enabled-by: true + value: 0x2f000000 description: | Defines the base address of the GIC Distributor. enabled-by: true diff --git a/spec/build/bsps/arm/optgicredist.yml b/spec/build/bsps/arm/optgicredist.yml index 8d15b1ace5..74311ff5c1 100644 --- a/spec/build/bsps/arm/optgicredist.yml +++ b/spec/build/bsps/arm/optgicredist.yml @@ -4,12 +4,12 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0x2f100000 -default-by-variant: -- value: 0xaf100000 - variants: - - arm/fvp_cortex_r52 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0xaf100000 +- enabled-by: true + value: 0x2f100000 description: | Defines the base address of the GIC Redistributor. enabled-by: true diff --git a/spec/build/bsps/arm/optgicspicount.yml b/spec/build/bsps/arm/optgicspicount.yml index cec05f36d7..269b33b74e 100644 --- a/spec/build/bsps/arm/optgicspicount.yml +++ b/spec/build/bsps/arm/optgicspicount.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 64 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 64 description: | Defines the count of Shared Peripheral Interrupts (SPIs) supported by the interrupt controller. diff --git a/spec/build/bsps/arm/optgtfreq.yml b/spec/build/bsps/arm/optgtfreq.yml index 71d356428a..513d0bbbde 100644 --- a/spec/build/bsps/arm/optgtfreq.yml +++ b/spec/build/bsps/arm/optgtfreq.yml @@ -4,16 +4,14 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: -- value: 100000000 - variants: - - arm/fvp_cortex_r52 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/fvp_cortex_r52 + value: 100000000 description: | Defines the frequency in Hz of the ARM Generic Timer. -format: '{}' enabled-by: true +format: '{}' links: [] name: ARM_GENERIC_TIMER_FREQ type: build diff --git a/spec/build/bsps/arm/optgtsysbase.yml b/spec/build/bsps/arm/optgtsysbase.yml index 9f684baedc..7c2b9ac53b 100644 --- a/spec/build/bsps/arm/optgtsysbase.yml +++ b/spec/build/bsps/arm/optgtsysbase.yml @@ -4,16 +4,16 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 709033984 -default-by-variant: -- value: 2856517632 - variants: - - arm/fvp_cortex_r52 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0xaa430000 +- enabled-by: true + value: 0x2a430000 description: | Defines the base address of the memory-mapped system level ARM Generic Timer. -format: '{:#010x}' enabled-by: true +format: '{:#010x}' links: [] name: ARM_GENERIC_TIMER_SYSTEM_BASE type: build diff --git a/spec/build/bsps/arm/optgtsyscntcr.yml b/spec/build/bsps/arm/optgtsyscntcr.yml index 6278bf0f53..f2662745e5 100644 --- a/spec/build/bsps/arm/optgtsyscntcr.yml +++ b/spec/build/bsps/arm/optgtsyscntcr.yml @@ -4,17 +4,17 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1 -default-by-variant: -- value: 257 - variants: - - arm/fvp_cortex_r52 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/fvp_cortex_r52 + value: 0x00000101 +- enabled-by: true + value: 0x00000001 description: | Defines the initialization value of the CNTCR register of the memory-mapped system level ARM Generic Timer. -format: '{:#010x}' enabled-by: true +format: '{:#010x}' links: [] name: ARM_GENERIC_TIMER_SYSTEM_CNTCR type: build diff --git a/spec/build/bsps/arm/optgtusevirt.yml b/spec/build/bsps/arm/optgtusevirt.yml index b443cc1d32..0fbc2ff83d 100644 --- a/spec/build/bsps/arm/optgtusevirt.yml +++ b/spec/build/bsps/arm/optgtusevirt.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | If set to true, then the clock driver uses the Virtual Timer of the ARM Generic Timer, otherwise it uses the Physical Timer (EL1). diff --git a/spec/build/bsps/arm/optmmusmallpages.yml b/spec/build/bsps/arm/optmmusmallpages.yml index a4ceb0aa1e..a418e3836d 100644 --- a/spec/build/bsps/arm/optmmusmallpages.yml +++ b/spec/build/bsps/arm/optmmusmallpages.yml @@ -13,12 +13,12 @@ actions: conf.env["ARM_MMU_TRANSLATION_TABLE_SIZE"] = tbl_sz build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/realview_pbx_a9_qemu +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/realview_pbx_a9_qemu + value: true +- enabled-by: true + value: false description: | If set to true, then the MMU is configured to use small pages (4KiB), otherwise it uses sections (1MiB). diff --git a/spec/build/bsps/arm/optmmusz.yml b/spec/build/bsps/arm/optmmusz.yml index 64c97be60a..42ed4385b9 100644 --- a/spec/build/bsps/arm/optmmusz.yml +++ b/spec/build/bsps/arm/optmmusz.yml @@ -7,9 +7,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 16384 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00004000 description: | Defines the size of the MMU translation table in bytes. The translation table size depends on the configured MMU granularity, for example 4KiB pages diff --git a/spec/build/bsps/arm/optmpuctrl.yml b/spec/build/bsps/arm/optmpuctrl.yml new file mode 100644 index 0000000000..2515a24971 --- /dev/null +++ b/spec/build/bsps/arm/optmpuctrl.yml @@ -0,0 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- define-unquoted: null +build-type: option +copyrights: +- Copyright (C) 2023 Karel Gardas +description: | + Default value of the ARM MPU CTRL register +default: +- enabled-by: true + value: (ARMV7M_MPU_CTRL_ENABLE | ARMV7M_MPU_CTRL_PRIVDEFENA) +enabled-by: true +format: '{}' +links: [] +name: ARMV7M_MPU_CTRL_DEFAULT +type: build diff --git a/spec/build/bsps/arm/optstartvecaddralign.yml b/spec/build/bsps/arm/optstartvecaddralign.yml new file mode 100644 index 0000000000..aa12b1968b --- /dev/null +++ b/spec/build/bsps/arm/optstartvecaddralign.yml @@ -0,0 +1,22 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +default: +- enabled-by: bsps/arm/tms570 + value: 64 +- enabled-by: true + value: null +description: | + Defines the alignment in bytes of the vector address table begin. The vector + address table contains the exception handler addresses. When no alignment is + specified, the vector address table immediately follows the vector + instruction table. +enabled-by: true +format: '{}' +links: [] +name: BSP_START_VECTOR_ADDRESS_TABLE_ALIGNMENT +type: build diff --git a/spec/build/bsps/arm/raspberrypi/abi.yml b/spec/build/bsps/arm/raspberrypi/abi.yml index 66459a1e1b..e360ca1ca5 100644 --- a/spec/build/bsps/arm/raspberrypi/abi.yml +++ b/spec/build/bsps/arm/raspberrypi/abi.yml @@ -5,18 +5,18 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -- -mtune=cortex-a7 -default-by-variant: -- value: +- enabled-by: arm/raspberrypi + value: - -mcpu=arm1176jzf-s - variants: - - arm/raspberrypi +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard + - -mtune=cortex-a7 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/raspberrypi/bspraspberrypi.yml b/spec/build/bsps/arm/raspberrypi/bspraspberrypi.yml index ceef1d06e0..510d17fc2b 100644 --- a/spec/build/bsps/arm/raspberrypi/bspraspberrypi.yml +++ b/spec/build/bsps/arm/raspberrypi/bspraspberrypi.yml @@ -4,7 +4,7 @@ bsp: raspberrypi build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: raspberrypi @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/raspberrypi/bspraspberrypi2.yml b/spec/build/bsps/arm/raspberrypi/bspraspberrypi2.yml index 5f604aa42f..f28d33fc7d 100644 --- a/spec/build/bsps/arm/raspberrypi/bspraspberrypi2.yml +++ b/spec/build/bsps/arm/raspberrypi/bspraspberrypi2.yml @@ -4,7 +4,7 @@ bsp: raspberrypi2 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: raspberrypi @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/raspberrypi/grp.yml b/spec/build/bsps/arm/raspberrypi/grp.yml index 94627a9526..ac8465ac61 100644 --- a/spec/build/bsps/arm/raspberrypi/grp.yml +++ b/spec/build/bsps/arm/raspberrypi/grp.yml @@ -1,7 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] diff --git a/spec/build/bsps/arm/raspberrypi/linkcmds.yml b/spec/build/bsps/arm/raspberrypi/linkcmds.yml index 100d593757..cbcf2500a6 100644 --- a/spec/build/bsps/arm/raspberrypi/linkcmds.yml +++ b/spec/build/bsps/arm/raspberrypi/linkcmds.yml @@ -35,7 +35,7 @@ content: | INCLUDE linkcmds.armv4 copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG enabled-by: true install-path: ${BSP_LIBDIR} links: [] diff --git a/spec/build/bsps/arm/raspberrypi/obj.yml b/spec/build/bsps/arm/raspberrypi/obj.yml index d440f9d67e..ea370829df 100644 --- a/spec/build/bsps/arm/raspberrypi/obj.yml +++ b/spec/build/bsps/arm/raspberrypi/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -11,7 +11,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/raspberrypi/include/bsp.h - - bsps/arm/raspberrypi/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/raspberrypi/include/bsp/fbcons.h @@ -27,7 +26,6 @@ install: - bsps/arm/raspberrypi/include/bsp/vc.h links: [] source: -- bsps/arm/raspberrypi/clock/clockdrv.c - bsps/arm/raspberrypi/console/console-config.c - bsps/arm/raspberrypi/console/fb.c - bsps/arm/raspberrypi/console/fbcons.c @@ -48,6 +46,7 @@ source: - bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c - bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c - bsps/arm/shared/start/bsp-start-memcpy.S +- bsps/shared/dev/clock/bcm2835-system-timer.c - bsps/shared/dev/cpucounter/cpucounterfrequency.c - bsps/shared/dev/cpucounter/cpucounterread.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c @@ -56,6 +55,8 @@ source: - bsps/shared/start/bsp-fdt.c - bsps/shared/start/bspfatal-default.c - bsps/shared/start/gettargethash-default.c +- bsps/shared/start/mallocinitone.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c +- bsps/shared/start/wkspaceinitone.c type: build diff --git a/spec/build/bsps/arm/raspberrypi/objsmp.yml b/spec/build/bsps/arm/raspberrypi/objsmp.yml index 547c39abf5..6bee8c42b1 100644 --- a/spec/build/bsps/arm/raspberrypi/objsmp.yml +++ b/spec/build/bsps/arm/raspberrypi/objsmp.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: diff --git a/spec/build/bsps/arm/raspberrypi/opti2ciomode.yml b/spec/build/bsps/arm/raspberrypi/opti2ciomode.yml index 82ba37dc4d..3057eaf771 100644 --- a/spec/build/bsps/arm/raspberrypi/opti2ciomode.yml +++ b/spec/build/bsps/arm/raspberrypi/opti2ciomode.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | Define to 1 to use interrupt-driven I/O with the Raspberry Pi I2C bus. If defined to other value the access will be polled-driven. enabled-by: true diff --git a/spec/build/bsps/arm/raspberrypi/optnocachelen.yml b/spec/build/bsps/arm/raspberrypi/optnocachelen.yml index b9d9071b17..ba5e075eb1 100644 --- a/spec/build/bsps/arm/raspberrypi/optnocachelen.yml +++ b/spec/build/bsps/arm/raspberrypi/optnocachelen.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 2097152 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00200000 description: | No-cache region length enabled-by: true diff --git a/spec/build/bsps/arm/raspberrypi/optramlen.yml b/spec/build/bsps/arm/raspberrypi/optramlen.yml index 040d514dad..ba1cdcd869 100644 --- a/spec/build/bsps/arm/raspberrypi/optramlen.yml +++ b/spec/build/bsps/arm/raspberrypi/optramlen.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 268435456 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x10000000 description: | RAM region length enabled-by: true diff --git a/spec/build/bsps/arm/raspberrypi/optresetvec.yml b/spec/build/bsps/arm/raspberrypi/optresetvec.yml index efd1ea2b2a..206a6f2801 100644 --- a/spec/build/bsps/arm/raspberrypi/optresetvec.yml +++ b/spec/build/bsps/arm/raspberrypi/optresetvec.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/raspberrypi/optrpi2.yml b/spec/build/bsps/arm/raspberrypi/optrpi2.yml index 08e3a1e381..36c610a119 100644 --- a/spec/build/bsps/arm/raspberrypi/optrpi2.yml +++ b/spec/build/bsps/arm/raspberrypi/optrpi2.yml @@ -4,12 +4,12 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/raspberrypi2 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/raspberrypi2 + value: true +- enabled-by: true + value: false description: | Set if the BSP variant is Raspberry Pi 2. enabled-by: true diff --git a/spec/build/bsps/arm/raspberrypi/optspiiomode.yml b/spec/build/bsps/arm/raspberrypi/optspiiomode.yml index bb0b94a683..f06497672b 100644 --- a/spec/build/bsps/arm/raspberrypi/optspiiomode.yml +++ b/spec/build/bsps/arm/raspberrypi/optspiiomode.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | Define to 1 to use interrupt-driven I/O with the Raspberry Pi SPI bus. If defined to other value the access will be polled-driven. enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/abi.yml b/spec/build/bsps/arm/realview-pbx-a9/abi.yml index a3a710c97d..280b42de1e 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/abi.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/abi.yml @@ -5,14 +5,15 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -- -mtune=cortex-a9 -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard + - -mtune=cortex-a9 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/bsprealviewpbxa9.yml b/spec/build/bsps/arm/realview-pbx-a9/bsprealviewpbxa9.yml index df86f8029d..4111830ce9 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/bsprealviewpbxa9.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/bsprealviewpbxa9.yml @@ -4,7 +4,7 @@ bsp: realview_pbx_a9_qemu build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: realview-pbx-a9 @@ -13,7 +13,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/realview-pbx-a9/include/bsp.h - - bsps/arm/realview-pbx-a9/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/realview-pbx-a9/include/bsp/console.h @@ -51,8 +50,12 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../opto0 - role: build-dependency + uid: ../../tstqemu +- role: build-dependency uid: ../../bspopts source: - bsps/arm/realview-pbx-a9/console/console-config.c @@ -69,7 +72,7 @@ source: - bsps/arm/shared/fb/arm-pl111.c - bsps/arm/shared/serial/arm-pl050.c - bsps/arm/shared/start/bsp-start-memcpy.S -- bsps/shared/dev/btimer/btimer-stub.c +- bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c - bsps/shared/dev/irq/arm-gicv2.c - bsps/shared/dev/irq/arm-gicv2-get-attributes.c @@ -78,7 +81,6 @@ source: - bsps/shared/dev/serial/getserialmouseps2.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/realview-pbx-a9/objsmp.yml b/spec/build/bsps/arm/realview-pbx-a9/objsmp.yml index 0c1ac9e6bb..7268c9ad6d 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/objsmp.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/objsmp.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: diff --git a/spec/build/bsps/arm/realview-pbx-a9/opta9periphclk.yml b/spec/build/bsps/arm/realview-pbx-a9/opta9periphclk.yml index 3ab2b72830..f6b4b89f76 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/opta9periphclk.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/opta9periphclk.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 100000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 100000000 description: | ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/optcachedata.yml b/spec/build/bsps/arm/realview-pbx-a9/optcachedata.yml index 1664b0fc31..01b4959995 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/optcachedata.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/optcachedata.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: - - arm/.*qemu +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable data cache enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/optcacheinst.yml b/spec/build/bsps/arm/realview-pbx-a9/optcacheinst.yml index b191133af9..62607fb235 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/optcacheinst.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/optcacheinst.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: - - arm/.*qemu +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable instruction cache enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/optclkbootcpu.yml b/spec/build/bsps/arm/realview-pbx-a9/optclkbootcpu.yml index 8d78c9ce6a..bda80ccc24 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/optclkbootcpu.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/optclkbootcpu.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/.*qemu.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: true +- enabled-by: true + value: false description: | If defined, then do the clock tick processing on the boot processor on behalf of all other processors. enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/optclkfastidle.yml b/spec/build/bsps/arm/realview-pbx-a9/optclkfastidle.yml index e4624223eb..f0b83e1402 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/optclkfastidle.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/optclkfastidle.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/.*qemu.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: true +- enabled-by: true + value: false description: | This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. enabled-by: true diff --git a/spec/build/bsps/arm/realview-pbx-a9/optresetvec.yml b/spec/build/bsps/arm/realview-pbx-a9/optresetvec.yml index efd1ea2b2a..206a6f2801 100644 --- a/spec/build/bsps/arm/realview-pbx-a9/optresetvec.yml +++ b/spec/build/bsps/arm/realview-pbx-a9/optresetvec.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/rtl22xx/abi.yml b/spec/build/bsps/arm/rtl22xx/abi.yml index abb7f66b50..9747eef3ea 100644 --- a/spec/build/bsps/arm/rtl22xx/abi.yml +++ b/spec/build/bsps/arm/rtl22xx/abi.yml @@ -5,15 +5,15 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mcpu=arm7tdmi -- -mthumb -default-by-variant: -- value: +- enabled-by: arm/rtl22xx + value: - -mcpu=arm7tdmi - variants: - - arm/rtl22xx +- enabled-by: true + value: + - -mcpu=arm7tdmi + - -mthumb description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/rtl22xx/bsprtl22xx.yml b/spec/build/bsps/arm/rtl22xx/bsprtl22xx.yml index 340172deef..f78dd2abee 100644 --- a/spec/build/bsps/arm/rtl22xx/bsprtl22xx.yml +++ b/spec/build/bsps/arm/rtl22xx/bsprtl22xx.yml @@ -4,7 +4,7 @@ bsp: rtl22xx build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: rtl22xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstrtl22xx - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/rtl22xx/bsprtl22xxt.yml b/spec/build/bsps/arm/rtl22xx/bsprtl22xxt.yml index ecd5f8baec..294a5fa417 100644 --- a/spec/build/bsps/arm/rtl22xx/bsprtl22xxt.yml +++ b/spec/build/bsps/arm/rtl22xx/bsprtl22xxt.yml @@ -4,7 +4,7 @@ bsp: rtl22xx_t build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: rtl22xx @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstrtl22xxt - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/rtl22xx/grp.yml b/spec/build/bsps/arm/rtl22xx/grp.yml index 6df3205f17..bf50080543 100644 --- a/spec/build/bsps/arm/rtl22xx/grp.yml +++ b/spec/build/bsps/arm/rtl22xx/grp.yml @@ -1,7 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] @@ -22,6 +25,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../bspopts type: build use-after: [] diff --git a/spec/build/bsps/arm/rtl22xx/obj.yml b/spec/build/bsps/arm/rtl22xx/obj.yml index 29b6833ede..720725cc35 100644 --- a/spec/build/bsps/arm/rtl22xx/obj.yml +++ b/spec/build/bsps/arm/rtl22xx/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -12,7 +12,6 @@ install: source: - bsps/arm/rtl22xx/include/bsp.h - bsps/arm/rtl22xx/include/lpc22xx.h - - bsps/arm/rtl22xx/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/rtl22xx/include/bsp/irq.h @@ -36,7 +35,6 @@ source: - bsps/shared/dev/serial/legacy-console.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c type: build diff --git a/spec/build/bsps/arm/rtl22xx/optskyeye.yml b/spec/build/bsps/arm/rtl22xx/optskyeye.yml index be55a98c3a..7411775a3e 100644 --- a/spec/build/bsps/arm/rtl22xx/optskyeye.yml +++ b/spec/build/bsps/arm/rtl22xx/optskyeye.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | If defined, enable options which optimize executingon the Skyeye simulator. Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized. This significantly reduces the wall time required to execute the RTEMS test suites. enabled-by: true diff --git a/spec/build/bsps/arm/rtl22xx/start.yml b/spec/build/bsps/arm/rtl22xx/start.yml index 4fe0065e7e..9b238e33d8 100644 --- a/spec/build/bsps/arm/rtl22xx/start.yml +++ b/spec/build/bsps/arm/rtl22xx/start.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause asflags: [] build-type: start-file copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true includes: [] diff --git a/spec/build/bsps/arm/rtl22xx/tstrtl22xx.yml b/spec/build/bsps/arm/rtl22xx/tstrtl22xx.yml index b271e644ce..145d07adc0 100644 --- a/spec/build/bsps/arm/rtl22xx/tstrtl22xx.yml +++ b/spec/build/bsps/arm/rtl22xx/tstrtl22xx.yml @@ -1,19 +1,23 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - dl10: exclude - fileio: exclude - fsdosfsname01: exclude - iostream: exclude - linpack: exclude - rcxx01: exclude - record02: exclude - utf8proc01: exclude + reason: null + state: exclude + tests: + - dl10 + - exit03 + - fileio + - fsdosfsname01 + - iostream + - linpack + - rcxx01 + - record02 + - utf8proc01 + - validation-no-clock-0 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/rtl22xx/tstrtl22xxt.yml b/spec/build/bsps/arm/rtl22xx/tstrtl22xxt.yml index 26700fa79e..fbba9c3ec6 100644 --- a/spec/build/bsps/arm/rtl22xx/tstrtl22xxt.yml +++ b/spec/build/bsps/arm/rtl22xx/tstrtl22xxt.yml @@ -1,16 +1,19 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - dl10: exclude - fsdosfsname01: exclude - linpack: exclude - record02: exclude - utf8proc01: exclude + reason: null + state: exclude + tests: + - dl10 + - fsdosfsname01 + - linpack + - record02 + - utf8proc01 + - validation-no-clock-0 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/smdk2410/abi.yml b/spec/build/bsps/arm/smdk2410/abi.yml index d964ca5d2f..f41d0c0385 100644 --- a/spec/build/bsps/arm/smdk2410/abi.yml +++ b/spec/build/bsps/arm/smdk2410/abi.yml @@ -5,10 +5,11 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mcpu=arm920t -default-by-variant: [] +- enabled-by: true + value: + - -mcpu=arm920t description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/smdk2410/bspsmdk2410.yml b/spec/build/bsps/arm/smdk2410/bspsmdk2410.yml index b17d9e34db..ec7dc73af4 100644 --- a/spec/build/bsps/arm/smdk2410/bspsmdk2410.yml +++ b/spec/build/bsps/arm/smdk2410/bspsmdk2410.yml @@ -4,7 +4,7 @@ bsp: smdk2410 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: smdk2410 @@ -17,7 +17,6 @@ install: - bsps/arm/smdk2410/include/s3c2410.h - bsps/arm/smdk2410/include/s3c24xx.h - bsps/arm/smdk2410/include/smc.h - - bsps/arm/smdk2410/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/smdk2410/include/bsp/irq.h @@ -40,6 +39,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../opto2 - role: build-dependency uid: ../../bspopts @@ -64,7 +65,6 @@ source: - bsps/shared/dev/serial/legacy-console.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c type: build diff --git a/spec/build/bsps/arm/smdk2410/optcpus3c2410.yml b/spec/build/bsps/arm/smdk2410/optcpus3c2410.yml index ba24539e4a..e5daf1f706 100644 --- a/spec/build/bsps/arm/smdk2410/optcpus3c2410.yml +++ b/spec/build/bsps/arm/smdk2410/optcpus3c2410.yml @@ -4,12 +4,12 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/smdk2410 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/smdk2410 + value: true +- enabled-by: true + value: false description: | If defined, enable optons for the S3C2410 CPU model. enabled-by: true diff --git a/spec/build/bsps/arm/smdk2410/optskyeye.yml b/spec/build/bsps/arm/smdk2410/optskyeye.yml index be55a98c3a..7411775a3e 100644 --- a/spec/build/bsps/arm/smdk2410/optskyeye.yml +++ b/spec/build/bsps/arm/smdk2410/optskyeye.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | If defined, enable options which optimize executingon the Skyeye simulator. Speed up the clock ticks while the idle task is running so time spent in the idle task is minimized. This significantly reduces the wall time required to execute the RTEMS test suites. enabled-by: true diff --git a/spec/build/bsps/arm/smdk2410/start.yml b/spec/build/bsps/arm/smdk2410/start.yml index 6910892daf..0945fbd472 100644 --- a/spec/build/bsps/arm/smdk2410/start.yml +++ b/spec/build/bsps/arm/smdk2410/start.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause asflags: [] build-type: start-file copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true includes: [] diff --git a/spec/build/bsps/arm/start.yml b/spec/build/bsps/arm/start.yml index 07120dcc71..8e82d0ea48 100644 --- a/spec/build/bsps/arm/start.yml +++ b/spec/build/bsps/arm/start.yml @@ -2,12 +2,14 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause asflags: [] build-type: start-file copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true includes: [] install-path: ${BSP_LIBDIR} -links: [] +links: +- role: build-dependency + uid: optstartvecaddralign source: - bsps/arm/shared/start/start.S target: start.o diff --git a/spec/build/bsps/arm/stm32f4/abi.yml b/spec/build/bsps/arm/stm32f4/abi.yml index 3098d8597b..0e4c5a5fb5 100644 --- a/spec/build/bsps/arm/stm32f4/abi.yml +++ b/spec/build/bsps/arm/stm32f4/abi.yml @@ -5,18 +5,18 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mcpu=cortex-m4 -- -mthumb -- -mfloat-abi=hard -- -mfpu=auto -default-by-variant: -- value: +- enabled-by: arm/stm32f105rc + value: - -mthumb - -mcpu=cortex-m3 - variants: - - arm/stm32f105rc +- enabled-by: true + value: + - -mcpu=cortex-m4 + - -mthumb + - -mfloat-abi=hard + - -mfpu=auto description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/bspstm32f105rc.yml b/spec/build/bsps/arm/stm32f4/bspstm32f105rc.yml index f00a177dc0..b5c035863b 100644 --- a/spec/build/bsps/arm/stm32f4/bspstm32f105rc.yml +++ b/spec/build/bsps/arm/stm32f4/bspstm32f105rc.yml @@ -4,7 +4,7 @@ bsp: stm32f105rc build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: stm32f4 @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tststm32f105rc - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/stm32f4/bspstm32f4.yml b/spec/build/bsps/arm/stm32f4/bspstm32f4.yml index f3c6426f07..bb38f006e6 100644 --- a/spec/build/bsps/arm/stm32f4/bspstm32f4.yml +++ b/spec/build/bsps/arm/stm32f4/bspstm32f4.yml @@ -4,7 +4,7 @@ bsp: stm32f4 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: stm32f4 @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 - role: build-dependency uid: ../../tstsmallmem +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/stm32f4/grp.yml b/spec/build/bsps/arm/stm32f4/grp.yml index ad08ee63c1..27e2197e46 100644 --- a/spec/build/bsps/arm/stm32f4/grp.yml +++ b/spec/build/bsps/arm/stm32f4/grp.yml @@ -1,7 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] @@ -48,12 +51,16 @@ links: - role: build-dependency uid: optusartbaud - role: build-dependency + uid: ../../optconsoleirq +- role: build-dependency uid: ../../linkcmds - role: build-dependency uid: ../../obj - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../bspopts type: build use-after: [] diff --git a/spec/build/bsps/arm/stm32f4/obj.yml b/spec/build/bsps/arm/stm32f4/obj.yml index 803072e7f8..f895299d1a 100644 --- a/spec/build/bsps/arm/stm32f4/obj.yml +++ b/spec/build/bsps/arm/stm32f4/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -11,7 +11,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/stm32f4/include/bsp.h - - bsps/arm/stm32f4/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/stm32f4/include/bsp/i2c.h @@ -44,6 +43,7 @@ source: - bsps/arm/shared/irq/irq-armv7m.c - bsps/arm/shared/irq/irq-dispatch-armv7m.c - bsps/arm/shared/start/bsp-start-memcpy.S +- bsps/arm/shared/start/bspstarthook0-empty.c - bsps/arm/stm32f4/console/console-config.c - bsps/arm/stm32f4/console/usart.c - bsps/arm/stm32f4/i2c/i2c-config.c @@ -55,7 +55,7 @@ source: - bsps/arm/stm32f4/start/rcc.c - bsps/arm/stm32f4/start/start-config-io.c - bsps/shared/cache/nocache.c -- bsps/shared/dev/btimer/btimer-stub.c +- bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/cpucounter/cpucounterfrequency.c - bsps/shared/dev/cpucounter/cpucounterread.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c @@ -64,7 +64,6 @@ source: - bsps/shared/dev/serial/legacy-console.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/stm32f4/opteni2c1.yml b/spec/build/bsps/arm/stm32f4/opteni2c1.yml index e200c81623..8ea4a6433b 100644 --- a/spec/build/bsps/arm/stm32f4/opteni2c1.yml +++ b/spec/build/bsps/arm/stm32f4/opteni2c1.yml @@ -4,12 +4,12 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/stm32f1.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32f105rc + value: true +- enabled-by: true + value: false description: | enable I2C 1 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/opteni2c2.yml b/spec/build/bsps/arm/stm32f4/opteni2c2.yml index d4ef7328e1..0d58fa521e 100644 --- a/spec/build/bsps/arm/stm32f4/opteni2c2.yml +++ b/spec/build/bsps/arm/stm32f4/opteni2c2.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | enable I2C 2 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optenuart4.yml b/spec/build/bsps/arm/stm32f4/optenuart4.yml index 5bf266707f..1aa1655880 100644 --- a/spec/build/bsps/arm/stm32f4/optenuart4.yml +++ b/spec/build/bsps/arm/stm32f4/optenuart4.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | enable UART 4 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optenuart5.yml b/spec/build/bsps/arm/stm32f4/optenuart5.yml index 21f1e6f963..1e58417faf 100644 --- a/spec/build/bsps/arm/stm32f4/optenuart5.yml +++ b/spec/build/bsps/arm/stm32f4/optenuart5.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | enable UART 5 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optenusart1.yml b/spec/build/bsps/arm/stm32f4/optenusart1.yml index 9fd8f99af2..7526ce3e0d 100644 --- a/spec/build/bsps/arm/stm32f4/optenusart1.yml +++ b/spec/build/bsps/arm/stm32f4/optenusart1.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | enable USART 1 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optenusart2.yml b/spec/build/bsps/arm/stm32f4/optenusart2.yml index d9dd3a3d22..7750a6129d 100644 --- a/spec/build/bsps/arm/stm32f4/optenusart2.yml +++ b/spec/build/bsps/arm/stm32f4/optenusart2.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | enable USART 2 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optenusart3.yml b/spec/build/bsps/arm/stm32f4/optenusart3.yml index 3cc11ba79b..01f3bde736 100644 --- a/spec/build/bsps/arm/stm32f4/optenusart3.yml +++ b/spec/build/bsps/arm/stm32f4/optenusart3.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | enable USART 3 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optenusart6.yml b/spec/build/bsps/arm/stm32f4/optenusart6.yml index 4e20fb4317..40967c988d 100644 --- a/spec/build/bsps/arm/stm32f4/optenusart6.yml +++ b/spec/build/bsps/arm/stm32f4/optenusart6.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | enable USART 6 enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optf10xxx.yml b/spec/build/bsps/arm/stm32f4/optf10xxx.yml index 54f1418cf9..f95cfd6469 100644 --- a/spec/build/bsps/arm/stm32f4/optf10xxx.yml +++ b/spec/build/bsps/arm/stm32f4/optf10xxx.yml @@ -4,12 +4,12 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/stm32f1.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32f105rc + value: true +- enabled-by: true + value: false description: | Chip belongs to the STM32F10XXX family. enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optf4xxxx.yml b/spec/build/bsps/arm/stm32f4/optf4xxxx.yml index 66604f249a..091fbef89c 100644 --- a/spec/build/bsps/arm/stm32f4/optf4xxxx.yml +++ b/spec/build/bsps/arm/stm32f4/optf4xxxx.yml @@ -4,12 +4,12 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/stm32f4.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32f4 + value: true +- enabled-by: true + value: false description: | Chip belongs to the STM32F4XXXX family. enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/opthclk.yml b/spec/build/bsps/arm/stm32f4/opthclk.yml index 7f315f12b2..b9a0208425 100644 --- a/spec/build/bsps/arm/stm32f4/opthclk.yml +++ b/spec/build/bsps/arm/stm32f4/opthclk.yml @@ -4,12 +4,12 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 16000000 -default-by-variant: -- value: 8000000 - variants: - - arm/stm32f1.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32f105rc + value: 8000000 +- enabled-by: true + value: 16000000 description: | HCLK frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optoschse.yml b/spec/build/bsps/arm/stm32f4/optoschse.yml index 2b1dad620e..b46093760f 100644 --- a/spec/build/bsps/arm/stm32f4/optoschse.yml +++ b/spec/build/bsps/arm/stm32f4/optoschse.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 8000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 8000000 description: | HSE oscillator frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optpclk1.yml b/spec/build/bsps/arm/stm32f4/optpclk1.yml index 9ac285b0bc..01536b9b0c 100644 --- a/spec/build/bsps/arm/stm32f4/optpclk1.yml +++ b/spec/build/bsps/arm/stm32f4/optpclk1.yml @@ -4,12 +4,12 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 16000000 -default-by-variant: -- value: 8000000 - variants: - - arm/stm32f1.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32f105rc + value: 8000000 +- enabled-by: true + value: 16000000 description: | PCLK1 frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optpclk2.yml b/spec/build/bsps/arm/stm32f4/optpclk2.yml index e51eeaf36f..720cfae57f 100644 --- a/spec/build/bsps/arm/stm32f4/optpclk2.yml +++ b/spec/build/bsps/arm/stm32f4/optpclk2.yml @@ -4,12 +4,12 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 16000000 -default-by-variant: -- value: 8000000 - variants: - - arm/stm32f1.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32f105rc + value: 8000000 +- enabled-by: true + value: 16000000 description: | PCLK2 frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optsysclk.yml b/spec/build/bsps/arm/stm32f4/optsysclk.yml index 5f08d4ecde..bd82e65db8 100644 --- a/spec/build/bsps/arm/stm32f4/optsysclk.yml +++ b/spec/build/bsps/arm/stm32f4/optsysclk.yml @@ -4,12 +4,12 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 16000000 -default-by-variant: -- value: 8000000 - variants: - - arm/stm32f1.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32f105rc + value: 8000000 +- enabled-by: true + value: 16000000 description: | SYSCLK frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/optusartbaud.yml b/spec/build/bsps/arm/stm32f4/optusartbaud.yml index b102e37eb6..219f2cc5b9 100644 --- a/spec/build/bsps/arm/stm32f4/optusartbaud.yml +++ b/spec/build/bsps/arm/stm32f4/optusartbaud.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 115200 description: | baud for USARTs enabled-by: true diff --git a/spec/build/bsps/arm/stm32f4/tststm32f105rc.yml b/spec/build/bsps/arm/stm32f4/tststm32f105rc.yml index 2b081b4bd9..dc1822019c 100644 --- a/spec/build/bsps/arm/stm32f4/tststm32f105rc.yml +++ b/spec/build/bsps/arm/stm32f4/tststm32f105rc.yml @@ -1,20 +1,19 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - fileio: exclude - ftp01: exclude - iostream: exclude - mghttpd01: exclude - monitor02: exclude - pppd: exclude - rcxx01: exclude - rtems: exclude - utf8proc01: exclude + reason: null + state: exclude + tests: + - fileio + - iostream + - monitor02 + - rcxx01 + - rtems + - utf8proc01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/stm32h7/.doorstop.yml b/spec/build/bsps/arm/stm32h7/.doorstop.yml deleted file mode 100644 index 16950ce80f..0000000000 --- a/spec/build/bsps/arm/stm32h7/.doorstop.yml +++ /dev/null @@ -1,6 +0,0 @@ -settings: - digits: 3 - parent: RTEMS-BUILD-BSP-ARM - prefix: RTEMS-BUILD-BSP-ARM-STM32H7 - sep: '-' -attributes: !include ../../../attributes.inc diff --git a/spec/build/bsps/arm/stm32h7/abi.yml b/spec/build/bsps/arm/stm32h7/abi.yml index 697220b1b1..708bb7b0e7 100644 --- a/spec/build/bsps/arm/stm32h7/abi.yml +++ b/spec/build/bsps/arm/stm32h7/abi.yml @@ -1,20 +1,29 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-string: null - split: null - env-append: null build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -mthumb -- -mcpu=cortex-m7 -- -mfpu=fpv5-d16 -- -mfloat-abi=hard -default-by-variant: [] +- enabled-by: + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval-m4 + value: + - -mthumb + - -mcpu=cortex-m4 + - -mfpu=fpv4-sp-d16 + - -mfloat-abi=hard +- enabled-by: true + value: + - -mthumb + - -mcpu=cortex-m7 + - -mfpu=fpv5-d16 + - -mfloat-abi=hard +description: | + ABI flags enabled-by: true links: [] name: ABI_FLAGS -description: | - ABI flags type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/bspnucleoh743zi.yml b/spec/build/bsps/arm/stm32h7/bspnucleoh743zi.yml index 037c777adb..7870d6188d 100644 --- a/spec/build/bsps/arm/stm32h7/bspnucleoh743zi.yml +++ b/spec/build/bsps/arm/stm32h7/bspnucleoh743zi.yml @@ -4,7 +4,7 @@ bsp: nucleo-h743zi build-type: bsp cflags: [] copyrights: -- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2021 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: stm32h7 @@ -13,5 +13,13 @@ install: [] links: - role: build-dependency uid: grp -source: [] +- role: build-dependency + uid: tststm32h757i-eval +source: +- bsps/arm/stm32h7/boards/stm/nucleo-h743zi/stm32h7-bspstarthooks.c +- bsps/arm/stm32h7/boards/stm/nucleo-h743zi/stm32h7-config-clk.c +- bsps/arm/stm32h7/boards/stm/nucleo-h743zi/stm32h7-config-osc.c +- bsps/arm/stm32h7/boards/stm/nucleo-h743zi/stm32h7-config-per.c +- bsps/arm/stm32h7/boards/stm/nucleo-h743zi/system_stm32h7xx.c +- bsps/arm/shared/cache/cache-v7m.c type: build diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml index a1aa1d3146..0aaf1f0cc6 100644 --- a/spec/build/bsps/arm/stm32h7/bspstm32h7.yml +++ b/spec/build/bsps/arm/stm32h7/bspstm32h7.yml @@ -4,7 +4,7 @@ bsp: stm32h7 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: stm32h7 @@ -13,5 +13,12 @@ install: [] links: - role: build-dependency uid: grp -source: [] +source: +- bsps/arm/stm32h7/boards/stm/stm32h743i-eval/stm32h7-bspstarthooks.c +- bsps/arm/stm32h7/boards/stm/stm32h743i-eval/stm32h7-config-clk.c +- bsps/arm/stm32h7/boards/stm/stm32h743i-eval/stm32h7-config-osc.c +- bsps/arm/stm32h7/boards/stm/stm32h743i-eval/stm32h7-config-per.c +- bsps/arm/stm32h7/boards/stm/stm32h743i-eval/system_stm32h7xx.c +- bsps/arm/stm32h7/boards/stm/stm32h743i-eval/ext-mem-ctl.c +- bsps/arm/shared/cache/cache-v7m.c type: build diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h747i-disco-m4.yml b/spec/build/bsps/arm/stm32h7/bspstm32h747i-disco-m4.yml new file mode 100644 index 0000000000..27b8c34db2 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/bspstm32h747i-disco-m4.yml @@ -0,0 +1,25 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: stm32h747i-disco-m4 +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2022 Karel Gardas <karel@functional.vision> +cppflags: [] +enabled-by: true +family: stm32h7 +includes: [] +install: [] +links: +- role: build-dependency + uid: grp +- role: build-dependency + uid: tststm32h757i-eval +source: +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/stm32h7-bspstarthooks.c +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/stm32h7-config-clk.c +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/stm32h7-config-osc.c +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/stm32h7-config-per.c +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/system_stm32h7xx.c +- bsps/shared/cache/nocache.c +type: build diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h747i-disco.yml b/spec/build/bsps/arm/stm32h7/bspstm32h747i-disco.yml new file mode 100644 index 0000000000..8b13d16844 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/bspstm32h747i-disco.yml @@ -0,0 +1,25 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: stm32h747i-disco +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2022 Karel Gardas <karel@functional.vision> +cppflags: [] +enabled-by: true +family: stm32h7 +includes: [] +install: [] +links: +- role: build-dependency + uid: grp +- role: build-dependency + uid: tststm32h757i-eval +source: +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/stm32h7-bspstarthooks.c +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/stm32h7-config-clk.c +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/stm32h7-config-osc.c +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/stm32h7-config-per.c +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/system_stm32h7xx.c +- bsps/arm/shared/cache/cache-v7m.c +type: build diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h750b-dk.yml b/spec/build/bsps/arm/stm32h7/bspstm32h750b-dk.yml new file mode 100644 index 0000000000..0b910e8a0c --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/bspstm32h750b-dk.yml @@ -0,0 +1,25 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: stm32h750b-dk +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2023 On-Line Applications Research (OAR) +cppflags: [] +enabled-by: true +family: stm32h7 +includes: [] +install: [] +links: +- role: build-dependency + uid: grp +- role: build-dependency + uid: tststm32h757i-eval +source: +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/stm32h7-bspstarthooks.c +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/stm32h7-config-clk.c +- bsps/arm/stm32h7/boards/stm/stm32h747i-disco/stm32h7-config-osc.c +- bsps/arm/stm32h7/boards/stm/stm32h750b-dk/stm32h7-config-per.c +- bsps/arm/stm32h7/boards/stm/stm32h750b-dk/system_stm32h7xx.c +- bsps/arm/shared/cache/cache-v7m.c +type: build diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h757i-eval-m4.yml b/spec/build/bsps/arm/stm32h7/bspstm32h757i-eval-m4.yml new file mode 100644 index 0000000000..fc15630c93 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/bspstm32h757i-eval-m4.yml @@ -0,0 +1,28 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: stm32h757i-eval-m4 +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2022 Karel Gardas <karel@functional.vision> +cppflags: [] +enabled-by: true +family: stm32h7 +includes: +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval +install: [] +links: +- role: build-dependency + uid: grp +- role: build-dependency + uid: tststm32h757i-eval +source: +- bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g.c +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval/stm32h747i_eval_qspi.c +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval/stm32h7-bspstarthooks.c +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval/stm32h7-config-clk.c +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval/stm32h7-config-osc.c +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval/stm32h7-config-per.c +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval/system_stm32h7xx.c +- bsps/shared/cache/nocache.c +type: build diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h757i-eval.yml b/spec/build/bsps/arm/stm32h7/bspstm32h757i-eval.yml new file mode 100644 index 0000000000..7516e55a3f --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/bspstm32h757i-eval.yml @@ -0,0 +1,28 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: stm32h757i-eval +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2022 Karel Gardas <karel@functional.vision> +cppflags: [] +enabled-by: true +family: stm32h7 +includes: +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval +install: [] +links: +- role: build-dependency + uid: grp +- role: build-dependency + uid: tststm32h757i-eval +source: +- bsps/arm/stm32h7/boards/stm/Components/mt25tl01g/mt25tl01g.c +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval/stm32h747i_eval_qspi.c +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval/stm32h7-bspstarthooks.c +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval/stm32h7-config-clk.c +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval/stm32h7-config-osc.c +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval/stm32h7-config-per.c +- bsps/arm/stm32h7/boards/stm/stm32h757i-eval/system_stm32h7xx.c +- bsps/arm/shared/cache/cache-v7m.c +type: build diff --git a/spec/build/bsps/arm/stm32h7/bspstm32h7b3i-dk.yml b/spec/build/bsps/arm/stm32h7/bspstm32h7b3i-dk.yml new file mode 100644 index 0000000000..20f5cb9a72 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/bspstm32h7b3i-dk.yml @@ -0,0 +1,26 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: stm32h7b3i-dk +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2022 Karel Gardas <karel@functional.vision> +cppflags: [] +enabled-by: true +family: stm32h7 +includes: [] +install: [] +links: +- role: build-dependency + uid: grp +- role: build-dependency + uid: ../../tstsmallmem +source: +- bsps/arm/stm32h7/boards/stm/stm32h7b3i-dk/stm32h7-bspstarthooks.c +- bsps/arm/stm32h7/boards/stm/stm32h7b3i-dk/stm32h7-config-clk.c +- bsps/arm/stm32h7/boards/stm/stm32h7b3i-dk/stm32h7-config-osc.c +- bsps/arm/stm32h7/boards/stm/stm32h7b3i-dk/stm32h7-config-per.c +- bsps/arm/stm32h7/boards/stm/stm32h7b3i-dk/system_stm32h7xx.c +- bsps/arm/stm32h7/boards/stm/stm32h7b3i-dk/ext-mem-ctl.c +- bsps/arm/shared/cache/cache-v7m.c +type: build diff --git a/spec/build/bsps/arm/stm32h7/grp.yml b/spec/build/bsps/arm/stm32h7/grp.yml index f6728999bd..239df9b898 100644 --- a/spec/build/bsps/arm/stm32h7/grp.yml +++ b/spec/build/bsps/arm/stm32h7/grp.yml @@ -1,7 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] @@ -18,8 +21,12 @@ links: - role: build-dependency uid: obj - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: optenmpualign - role: build-dependency + uid: ../optmpuctrl +- role: build-dependency uid: optenuart4 - role: build-dependency uid: optenuart5 @@ -48,6 +55,10 @@ links: - role: build-dependency uid: optmemflashsz - role: build-dependency + uid: optmemflashlatency +- role: build-dependency + uid: optmemflashorigin +- role: build-dependency uid: optmemitcmsz - role: build-dependency uid: optmemnandsz @@ -78,10 +89,28 @@ links: - role: build-dependency uid: optprintkinstance - role: build-dependency + uid: optpwrsupply +- role: build-dependency + uid: optbootcore +- role: build-dependency + uid: optusart1gpiopins +- role: build-dependency + uid: optusart1gpioregs +- role: build-dependency + uid: optusart1alternatefunc +- role: build-dependency + uid: optusart2gpiopins +- role: build-dependency + uid: optusart2gpioregs +- role: build-dependency uid: optusart3gpiopins - role: build-dependency uid: optusart3gpioregs - role: build-dependency + uid: optuart7gpiopins +- role: build-dependency + uid: optuart7gpioregs +- role: build-dependency uid: optvariant - role: build-dependency uid: optethgpiogregs @@ -104,6 +133,12 @@ links: - role: build-dependency uid: linkcmdssdram - role: build-dependency + uid: linkcmdssram +- role: build-dependency + uid: linkcmdssramsdram +- role: build-dependency + uid: linkcmdsflashsdram +- role: build-dependency uid: ../../bspopts type: build use-after: [] diff --git a/spec/build/bsps/arm/stm32h7/linkcmds.yml b/spec/build/bsps/arm/stm32h7/linkcmds.yml index 95f31bbedb..89084a5209 100644 --- a/spec/build/bsps/arm/stm32h7/linkcmds.yml +++ b/spec/build/bsps/arm/stm32h7/linkcmds.yml @@ -1,11 +1,11 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: config-file content: | INCLUDE ${STM32H7_DEFAULT_LINKCMDS} +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG enabled-by: true install-path: ${BSP_LIBDIR} links: [] target: linkcmds type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/linkcmdsflash.yml b/spec/build/bsps/arm/stm32h7/linkcmdsflash.yml index 4785c45b9f..d0c15c42c7 100644 --- a/spec/build/bsps/arm/stm32h7/linkcmdsflash.yml +++ b/spec/build/bsps/arm/stm32h7/linkcmdsflash.yml @@ -1,4 +1,7 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: script +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG do-build: | bld.install_as("${BSP_LIBDIR}/linkcmds.flash", "linkcmds.flash") do-configure: | @@ -44,6 +47,3 @@ links: [] prepare-build: null prepare-configure: null type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/linkcmdsflashsdram.yml b/spec/build/bsps/arm/stm32h7/linkcmdsflashsdram.yml new file mode 100644 index 0000000000..5229377d99 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/linkcmdsflashsdram.yml @@ -0,0 +1,49 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: script +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +do-build: | + bld.install_as("${BSP_LIBDIR}/linkcmds.flash_sdram", "linkcmds.flash_sdram") +do-configure: | + content = """INCLUDE linkcmds.memory + + REGION_ALIAS ("REGION_START", FLASH); + REGION_ALIAS ("REGION_VECTOR", FLASH); + REGION_ALIAS ("REGION_TEXT", FLASH); + REGION_ALIAS ("REGION_TEXT_LOAD", FLASH); + REGION_ALIAS ("REGION_RODATA", FLASH); + REGION_ALIAS ("REGION_RODATA_LOAD", FLASH); + REGION_ALIAS ("REGION_DATA", SRAM_AXI); + REGION_ALIAS ("REGION_DATA_LOAD", FLASH); + REGION_ALIAS ("REGION_FAST_TEXT", ITCM); + REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ITCM); + REGION_ALIAS ("REGION_FAST_DATA", DTCM); + REGION_ALIAS ("REGION_FAST_DATA_LOAD", DTCM); + REGION_ALIAS ("REGION_BSS", SRAM_AXI); + REGION_ALIAS ("REGION_WORK", SDRAM_2); + REGION_ALIAS ("REGION_STACK", SRAM_AXI); + REGION_ALIAS ("REGION_NOCACHE", SRAM_1); + REGION_ALIAS ("REGION_NOCACHE_LOAD", FLASH); + + bsp_vector_table_in_start_section = 1; + """ + + if conf.env.STM32H7_ENABLE_MPU_ALIGNMENT: + content += """ + bsp_align_text_and_rodata_end_to_power_of_2 = 1; + """ + + content += """ + INCLUDE linkcmds.armv7m + """ + f = conf.bldnode.make_node( + conf.env.VARIANT + "/linkcmds.flash_sdram" + ) + f.parent.mkdir() + f.write(content) + conf.env.append_value("cfg_files", f.abspath()) +enabled-by: true +links: [] +prepare-build: null +prepare-configure: null +type: build diff --git a/spec/build/bsps/arm/stm32h7/linkcmdsmemory.yml b/spec/build/bsps/arm/stm32h7/linkcmdsmemory.yml index 7ff7f3da5e..88dd4e8c91 100644 --- a/spec/build/bsps/arm/stm32h7/linkcmdsmemory.yml +++ b/spec/build/bsps/arm/stm32h7/linkcmdsmemory.yml @@ -1,9 +1,10 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: config-file content: | MEMORY { NULL : ORIGIN = 0x00000000, LENGTH = ${STM32H7_MEMORY_NULL_SIZE:#010x} ITCM : ORIGIN = ${STM32H7_MEMORY_NULL_SIZE:#010x}, LENGTH = ${STM32H7_MEMORY_ITCM_SIZE:#010x} - FLASH : ORIGIN = 0x08000000, LENGTH = ${STM32H7_MEMORY_FLASH_SIZE:#010x} + FLASH : ORIGIN = ${STM32H7_MEMORY_FLASH_ORIGIN:#010x}, LENGTH = ${STM32H7_MEMORY_FLASH_SIZE:#010x} DTCM : ORIGIN = 0x20000000, LENGTH = ${STM32H7_MEMORY_DTCM_SIZE:#010x} SRAM_AXI : ORIGIN = 0x24000000, LENGTH = ${STM32H7_MEMORY_SRAM_AXI_SIZE:#010x} SRAM_1 : ORIGIN = 0x30000000, LENGTH = ${STM32H7_MEMORY_SRAM_1_SIZE:#010x} @@ -82,11 +83,10 @@ content: | stm32h7_memory_sdram_2_begin = ORIGIN (SDRAM_2); stm32h7_memory_sdram_2_end = ORIGIN (SDRAM_2) + LENGTH (SDRAM_2); stm32h7_memory_sdram_2_size = LENGTH (SDRAM_2); +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG enabled-by: true install-path: ${BSP_LIBDIR} links: [] target: linkcmds.memory type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/linkcmdssdram.yml b/spec/build/bsps/arm/stm32h7/linkcmdssdram.yml index 5254e5c56f..e191680a37 100644 --- a/spec/build/bsps/arm/stm32h7/linkcmdssdram.yml +++ b/spec/build/bsps/arm/stm32h7/linkcmdssdram.yml @@ -1,4 +1,7 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: script +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG do-build: | bld.install_as("${BSP_LIBDIR}/linkcmds.sdram", "linkcmds.sdram") do-configure: | @@ -44,6 +47,3 @@ links: [] prepare-build: null prepare-configure: null type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/linkcmdssram.yml b/spec/build/bsps/arm/stm32h7/linkcmdssram.yml new file mode 100644 index 0000000000..8433700ca9 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/linkcmdssram.yml @@ -0,0 +1,49 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: script +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +do-build: | + bld.install_as("${BSP_LIBDIR}/linkcmds.sram", "linkcmds.sram") +do-configure: | + content = """INCLUDE linkcmds.memory + + REGION_ALIAS ("REGION_START", SRAM_AXI); + REGION_ALIAS ("REGION_VECTOR", SRAM_AXI); + REGION_ALIAS ("REGION_TEXT", SRAM_AXI); + REGION_ALIAS ("REGION_TEXT_LOAD", SRAM_AXI); + REGION_ALIAS ("REGION_RODATA", SRAM_AXI); + REGION_ALIAS ("REGION_RODATA_LOAD", SRAM_AXI); + REGION_ALIAS ("REGION_DATA", SRAM_AXI); + REGION_ALIAS ("REGION_DATA_LOAD", SRAM_AXI); + REGION_ALIAS ("REGION_FAST_TEXT", ITCM); + REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ITCM); + REGION_ALIAS ("REGION_FAST_DATA", DTCM); + REGION_ALIAS ("REGION_FAST_DATA_LOAD", DTCM); + REGION_ALIAS ("REGION_BSS", SRAM_AXI); + REGION_ALIAS ("REGION_WORK", SRAM_AXI); + REGION_ALIAS ("REGION_STACK", SRAM_AXI); + REGION_ALIAS ("REGION_NOCACHE", SRAM_1); + REGION_ALIAS ("REGION_NOCACHE_LOAD", SRAM_AXI); + + bsp_vector_table_in_start_section = 1; + """ + + if conf.env.STM32H7_ENABLE_MPU_ALIGNMENT: + content += """ + bsp_align_text_and_rodata_end_to_power_of_2 = 1; + """ + + content += """ + INCLUDE linkcmds.armv7m + """ + f = conf.bldnode.make_node( + conf.env.VARIANT + "/linkcmds.sram" + ) + f.parent.mkdir() + f.write(content) + conf.env.append_value("cfg_files", f.abspath()) +enabled-by: true +links: [] +prepare-build: null +prepare-configure: null +type: build diff --git a/spec/build/bsps/arm/stm32h7/linkcmdssramsdram.yml b/spec/build/bsps/arm/stm32h7/linkcmdssramsdram.yml new file mode 100644 index 0000000000..7db5136720 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/linkcmdssramsdram.yml @@ -0,0 +1,49 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: script +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +do-build: | + bld.install_as("${BSP_LIBDIR}/linkcmds.sram_sdram", "linkcmds.sram_sdram") +do-configure: | + content = """INCLUDE linkcmds.memory + + REGION_ALIAS ("REGION_START", SRAM_AXI); + REGION_ALIAS ("REGION_VECTOR", SRAM_AXI); + REGION_ALIAS ("REGION_TEXT", SRAM_AXI); + REGION_ALIAS ("REGION_TEXT_LOAD", SRAM_AXI); + REGION_ALIAS ("REGION_RODATA", SRAM_AXI); + REGION_ALIAS ("REGION_RODATA_LOAD", SRAM_AXI); + REGION_ALIAS ("REGION_DATA", SRAM_AXI); + REGION_ALIAS ("REGION_DATA_LOAD", SRAM_AXI); + REGION_ALIAS ("REGION_FAST_TEXT", ITCM); + REGION_ALIAS ("REGION_FAST_TEXT_LOAD", ITCM); + REGION_ALIAS ("REGION_FAST_DATA", DTCM); + REGION_ALIAS ("REGION_FAST_DATA_LOAD", DTCM); + REGION_ALIAS ("REGION_BSS", SRAM_AXI); + REGION_ALIAS ("REGION_WORK", SDRAM_2); + REGION_ALIAS ("REGION_STACK", SRAM_AXI); + REGION_ALIAS ("REGION_NOCACHE", SRAM_1); + REGION_ALIAS ("REGION_NOCACHE_LOAD", SRAM_AXI); + + bsp_vector_table_in_start_section = 1; + """ + + if conf.env.STM32H7_ENABLE_MPU_ALIGNMENT: + content += """ + bsp_align_text_and_rodata_end_to_power_of_2 = 1; + """ + + content += """ + INCLUDE linkcmds.armv7m + """ + f = conf.bldnode.make_node( + conf.env.VARIANT + "/linkcmds.sram_sdram" + ) + f.parent.mkdir() + f.write(content) + conf.env.append_value("cfg_files", f.abspath()) +enabled-by: true +links: [] +prepare-build: null +prepare-configure: null +type: build diff --git a/spec/build/bsps/arm/stm32h7/obj.yml b/spec/build/bsps/arm/stm32h7/obj.yml index 30f2c06ba3..37e873f7e5 100644 --- a/spec/build/bsps/arm/stm32h7/obj.yml +++ b/spec/build/bsps/arm/stm32h7/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -11,13 +11,20 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/stm32h7/include/bsp.h - - bsps/arm/stm32h7/include/tm27.h - bsps/arm/stm32h7/include/chip.h - bsps/arm/stm32h7/include/stm32_assert_template.h + - bsps/arm/stm32h7/include/stm32h723xx.h + - bsps/arm/stm32h7/include/stm32h725xx.h + - bsps/arm/stm32h7/include/stm32h730xx.h + - bsps/arm/stm32h7/include/stm32h730xxq.h + - bsps/arm/stm32h7/include/stm32h733xx.h + - bsps/arm/stm32h7/include/stm32h735xx.h - bsps/arm/stm32h7/include/stm32h742xx.h - bsps/arm/stm32h7/include/stm32h743xx.h - bsps/arm/stm32h7/include/stm32h745xx.h + - bsps/arm/stm32h7/include/stm32h745xg.h - bsps/arm/stm32h7/include/stm32h747xx.h + - bsps/arm/stm32h7/include/stm32h747xg.h - bsps/arm/stm32h7/include/stm32h750xx.h - bsps/arm/stm32h7/include/stm32h753xx.h - bsps/arm/stm32h7/include/stm32h755xx.h @@ -36,6 +43,7 @@ install: - bsps/arm/stm32h7/include/stm32h7xx_hal_comp.h - bsps/arm/stm32h7/include/stm32h7xx_hal_conf.h - bsps/arm/stm32h7/include/stm32h7xx_hal_conf_template.h + - bsps/arm/stm32h7/include/stm32h7xx_hal_cordic.h - bsps/arm/stm32h7/include/stm32h7xx_hal_cortex.h - bsps/arm/stm32h7/include/stm32h7xx_hal_crc_ex.h - bsps/arm/stm32h7/include/stm32h7xx_hal_crc.h @@ -58,6 +66,7 @@ install: - bsps/arm/stm32h7/include/stm32h7xx_hal_fdcan.h - bsps/arm/stm32h7/include/stm32h7xx_hal_flash_ex.h - bsps/arm/stm32h7/include/stm32h7xx_hal_flash.h + - bsps/arm/stm32h7/include/stm32h7xx_hal_fmac.h - bsps/arm/stm32h7/include/stm32h7xx_hal_gfxmmu.h - bsps/arm/stm32h7/include/stm32h7xx_hal_gpio_ex.h - bsps/arm/stm32h7/include/stm32h7xx_hal_gpio.h @@ -109,6 +118,7 @@ install: - bsps/arm/stm32h7/include/stm32h7xx_hal_smartcard_ex.h - bsps/arm/stm32h7/include/stm32h7xx_hal_smartcard.h - bsps/arm/stm32h7/include/stm32h7xx_hal_smbus.h + - bsps/arm/stm32h7/include/stm32h7xx_hal_smbus_ex.h - bsps/arm/stm32h7/include/stm32h7xx_hal_spdifrx.h - bsps/arm/stm32h7/include/stm32h7xx_hal_spi_ex.h - bsps/arm/stm32h7/include/stm32h7xx_hal_spi.h @@ -125,6 +135,7 @@ install: - bsps/arm/stm32h7/include/stm32h7xx_ll_bdma.h - bsps/arm/stm32h7/include/stm32h7xx_ll_bus.h - bsps/arm/stm32h7/include/stm32h7xx_ll_comp.h + - bsps/arm/stm32h7/include/stm32h7xx_ll_cordic.h - bsps/arm/stm32h7/include/stm32h7xx_ll_cortex.h - bsps/arm/stm32h7/include/stm32h7xx_ll_crc.h - bsps/arm/stm32h7/include/stm32h7xx_ll_crs.h @@ -134,6 +145,7 @@ install: - bsps/arm/stm32h7/include/stm32h7xx_ll_dma.h - bsps/arm/stm32h7/include/stm32h7xx_ll_dmamux.h - bsps/arm/stm32h7/include/stm32h7xx_ll_exti.h + - bsps/arm/stm32h7/include/stm32h7xx_ll_fmac.h - bsps/arm/stm32h7/include/stm32h7xx_ll_fmc.h - bsps/arm/stm32h7/include/stm32h7xx_ll_gpio.h - bsps/arm/stm32h7/include/stm32h7xx_ll_hrtim.h @@ -161,6 +173,8 @@ install: - destination: ${BSP_INCLUDEDIR}/Legacy source: - bsps/arm/stm32h7/include/Legacy/stm32_hal_legacy.h + - bsps/arm/stm32h7/include/Legacy/stm32h7xx_hal_eth_ex_legacy.h + - bsps/arm/stm32h7/include/Legacy/stm32h7xx_hal_eth_legacy.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/stm32h7/include/bsp/irq.h @@ -169,12 +183,8 @@ install: - bsps/arm/stm32h7/include/stm32h7/hal.h - bsps/arm/stm32h7/include/stm32h7/memory.h - bsps/arm/stm32h7/include/stm32h7/mpu-config.h -- destination: ${BSP_LIBDIR} - source: - - bsps/arm/stm32h7/start/bsp_specs links: [] source: -- bsps/arm/shared/cache/cache-v7m.c - bsps/arm/shared/clock/clock-armv7m.c - bsps/arm/shared/cpucounter/cpucounter-armv7m.c - bsps/arm/shared/irq/irq-armv7m.c @@ -209,6 +219,7 @@ source: - bsps/arm/stm32h7/hal/stm32h7xx_hal_cec.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_comp.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_cortex.c +- bsps/arm/stm32h7/hal/stm32h7xx_hal_cordic.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_crc.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_crc_ex.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_cryp.c @@ -229,6 +240,7 @@ source: - bsps/arm/stm32h7/hal/stm32h7xx_hal_fdcan.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_flash.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_flash_ex.c +- bsps/arm/stm32h7/hal/stm32h7xx_hal_fmac.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_gfxmmu.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_gpio.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_hash.c @@ -277,6 +289,7 @@ source: - bsps/arm/stm32h7/hal/stm32h7xx_hal_smartcard.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_smartcard_ex.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_smbus.c +- bsps/arm/stm32h7/hal/stm32h7xx_hal_smbus_ex.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_spdifrx.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_spi.c - bsps/arm/stm32h7/hal/stm32h7xx_hal_spi_ex.c @@ -292,6 +305,7 @@ source: - bsps/arm/stm32h7/hal/stm32h7xx_ll_adc.c - bsps/arm/stm32h7/hal/stm32h7xx_ll_bdma.c - bsps/arm/stm32h7/hal/stm32h7xx_ll_comp.c +- bsps/arm/stm32h7/hal/stm32h7xx_ll_cordic.c - bsps/arm/stm32h7/hal/stm32h7xx_ll_crc.c - bsps/arm/stm32h7/hal/stm32h7xx_ll_crs.c - bsps/arm/stm32h7/hal/stm32h7xx_ll_dac.c @@ -299,6 +313,7 @@ source: - bsps/arm/stm32h7/hal/stm32h7xx_ll_dma.c - bsps/arm/stm32h7/hal/stm32h7xx_ll_dma2d.c - bsps/arm/stm32h7/hal/stm32h7xx_ll_exti.c +- bsps/arm/stm32h7/hal/stm32h7xx_ll_fmac.c - bsps/arm/stm32h7/hal/stm32h7xx_ll_fmc.c - bsps/arm/stm32h7/hal/stm32h7xx_ll_gpio.c - bsps/arm/stm32h7/hal/stm32h7xx_ll_hrtim.c @@ -320,25 +335,19 @@ source: - bsps/arm/stm32h7/hal/stm32h7xx_ll_utils.c - bsps/arm/stm32h7/start/bspstart.c - bsps/arm/stm32h7/start/bspstarthooks.c -- bsps/arm/stm32h7/start/ext-mem-ctl.c - bsps/arm/stm32h7/start/getentropy-rng.c - bsps/arm/stm32h7/start/mpu-config.c -- bsps/arm/stm32h7/start/stm32h7-config-clk.c - bsps/arm/stm32h7/start/stm32h7-config-fls.c -- bsps/arm/stm32h7/start/stm32h7-config-osc.c -- bsps/arm/stm32h7/start/stm32h7-config-per.c - bsps/arm/stm32h7/start/stm32h7-config-pwr.c - bsps/arm/stm32h7/start/stm32h7-hal-eth.c - bsps/arm/stm32h7/start/stm32h7-hal-sdmmc.c - bsps/arm/stm32h7/start/stm32h7-hal-uart.c - bsps/arm/stm32h7/start/stm32h7-hal.c -- bsps/arm/stm32h7/start/system_stm32h7xx.c -- bsps/shared/dev/btimer/btimer-stub.c +- bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/rtc/rtc-support.c - bsps/shared/dev/serial/console-termios.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/stm32h7/optbootcore.yml b/spec/build/bsps/arm/stm32h7/optbootcore.yml new file mode 100644 index 0000000000..1aa3cbd8e4 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/optbootcore.yml @@ -0,0 +1,29 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- script: | + cores = ["CORE_CM7", "CORE_CM4", "BOOT_CORE_DEFINE_NOT_NEEDED"] + if value not in cores: + conf.fatal("STM32H7 boot core '{}' is not one of {}".format(value, cores)) + conf.define_cond(value, True) +build-type: option +copyrights: +- Copyright (C) 2022 Karel Gardas <karel@functional.vision> +default: +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h757i-eval + value: CORE_CM7 +- enabled-by: + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval-m4 + value: CORE_CM4 +- enabled-by: true + value: BOOT_CORE_DEFINE_NOT_NEEDED +description: | + Select the boot core. Possible values are CORE_CM7 and CORE_CM4 +enabled-by: true +format: '{}' +links: [] +name: STM32H7_BOOT_CORE +type: build diff --git a/spec/build/bsps/arm/stm32h7/optenmpualign.yml b/spec/build/bsps/arm/stm32h7/optenmpualign.yml index 4005485940..60e45c708d 100644 --- a/spec/build/bsps/arm/stm32h7/optenmpualign.yml +++ b/spec/build/bsps/arm/stm32h7/optenmpualign.yml @@ -1,20 +1,25 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-boolean: null - env-assign: null - define-condition: null build-type: option -default: true -default-by-variant: [] -enabled-by: true -format: '{}' -links: [] -name: STM32H7_ENABLE_MPU_ALIGNMENT +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval-m4 + value: false +- enabled-by: true + value: true description: | Enable the alignment of the size of the combined start and text sections and the rodata section to meet MPU region alignment requirements. This increases the memory footprint. It enables a write-protection of the start, text, and rodata sections. It makes the data sections non-executable. +enabled-by: true +format: '{}' +links: [] +name: STM32H7_ENABLE_MPU_ALIGNMENT type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optenuart4.yml b/spec/build/bsps/arm/stm32h7/optenuart4.yml index cd5fd31370..b9428ddf86 100644 --- a/spec/build/bsps/arm/stm32h7/optenuart4.yml +++ b/spec/build/bsps/arm/stm32h7/optenuart4.yml @@ -1,16 +1,23 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-boolean: null - define-condition: null build-type: option -default: true -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + value: false +- enabled-by: true + value: true +description: | + Enable UART4 device in console driver. enabled-by: true format: '{}' links: [] name: STM32H7_CONSOLE_ENABLE_UART4 -description: | - Enable UART4 device in console driver. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optenuart5.yml b/spec/build/bsps/arm/stm32h7/optenuart5.yml index f124d72113..f33acbef2b 100644 --- a/spec/build/bsps/arm/stm32h7/optenuart5.yml +++ b/spec/build/bsps/arm/stm32h7/optenuart5.yml @@ -1,16 +1,24 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-boolean: null - define-condition: null build-type: option -default: true -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true +description: | + Enable UART5 device in console driver. enabled-by: true format: '{}' links: [] name: STM32H7_CONSOLE_ENABLE_UART5 -description: | - Enable UART5 device in console driver. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optenuart7.yml b/spec/build/bsps/arm/stm32h7/optenuart7.yml index 7310cef713..03efd2c36d 100644 --- a/spec/build/bsps/arm/stm32h7/optenuart7.yml +++ b/spec/build/bsps/arm/stm32h7/optenuart7.yml @@ -1,16 +1,24 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-boolean: null - define-condition: null build-type: option -default: true -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true +description: | + Enable UART7 device in console driver. enabled-by: true format: '{}' links: [] name: STM32H7_CONSOLE_ENABLE_UART7 -description: | - Enable UART7 device in console driver. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optenuart8.yml b/spec/build/bsps/arm/stm32h7/optenuart8.yml index f0407f6510..c4671afc4b 100644 --- a/spec/build/bsps/arm/stm32h7/optenuart8.yml +++ b/spec/build/bsps/arm/stm32h7/optenuart8.yml @@ -1,16 +1,22 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-boolean: null - define-condition: null build-type: option -default: true -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true +description: | + Enable UART8 device in console driver. enabled-by: true format: '{}' links: [] name: STM32H7_CONSOLE_ENABLE_UART8 -description: | - Enable UART8 device in console driver. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optenuart9.yml b/spec/build/bsps/arm/stm32h7/optenuart9.yml index 1a3ef49459..41d29d47d6 100644 --- a/spec/build/bsps/arm/stm32h7/optenuart9.yml +++ b/spec/build/bsps/arm/stm32h7/optenuart9.yml @@ -1,16 +1,24 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-boolean: null - define-condition: null build-type: option -default: true -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true +description: | + Enable UART9 device in console driver. enabled-by: true format: '{}' links: [] name: STM32H7_CONSOLE_ENABLE_UART9 -description: | - Enable UART9 device in console driver. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optenusart1.yml b/spec/build/bsps/arm/stm32h7/optenusart1.yml index a4f478f753..139a38928c 100644 --- a/spec/build/bsps/arm/stm32h7/optenusart1.yml +++ b/spec/build/bsps/arm/stm32h7/optenusart1.yml @@ -1,16 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-boolean: null - define-condition: null build-type: option -default: true -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true +description: | + Enable USART1 device in console driver. enabled-by: true format: '{}' links: [] name: STM32H7_CONSOLE_ENABLE_USART1 -description: | - Enable USART1 device in console driver. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optenusart10.yml b/spec/build/bsps/arm/stm32h7/optenusart10.yml index 659d1a96b6..160705bdb4 100644 --- a/spec/build/bsps/arm/stm32h7/optenusart10.yml +++ b/spec/build/bsps/arm/stm32h7/optenusart10.yml @@ -1,16 +1,24 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-boolean: null - define-condition: null build-type: option -default: true -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true +description: | + Enable USART10 device in console driver. enabled-by: true format: '{}' links: [] name: STM32H7_CONSOLE_ENABLE_USART10 -description: | - Enable USART10 device in console driver. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optenusart2.yml b/spec/build/bsps/arm/stm32h7/optenusart2.yml index 0bbec65278..e8890d9d0b 100644 --- a/spec/build/bsps/arm/stm32h7/optenusart2.yml +++ b/spec/build/bsps/arm/stm32h7/optenusart2.yml @@ -1,16 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-boolean: null - define-condition: null build-type: option -default: true -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + value: false +- enabled-by: true + value: true +description: | + Enable USART2 device in console driver. enabled-by: true format: '{}' links: [] name: STM32H7_CONSOLE_ENABLE_USART2 -description: | - Enable USART2 device in console driver. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optenusart3.yml b/spec/build/bsps/arm/stm32h7/optenusart3.yml index 09e673ff7f..a7aeda68bf 100644 --- a/spec/build/bsps/arm/stm32h7/optenusart3.yml +++ b/spec/build/bsps/arm/stm32h7/optenusart3.yml @@ -1,16 +1,24 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-boolean: null - define-condition: null build-type: option -default: true -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true +description: | + Enable USART3 device in console driver. enabled-by: true format: '{}' links: [] name: STM32H7_CONSOLE_ENABLE_USART3 -description: | - Enable USART3 device in console driver. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optenusart6.yml b/spec/build/bsps/arm/stm32h7/optenusart6.yml index e6524fd40d..5905eae1f0 100644 --- a/spec/build/bsps/arm/stm32h7/optenusart6.yml +++ b/spec/build/bsps/arm/stm32h7/optenusart6.yml @@ -1,16 +1,24 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-boolean: null - define-condition: null build-type: option -default: true -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + - arm/stm32h7b3i-dk + value: false +- enabled-by: true + value: true +description: | + Enable USART6 device in console driver. enabled-by: true format: '{}' links: [] name: STM32H7_CONSOLE_ENABLE_USART6 -description: | - Enable USART6 device in console driver. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml b/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml index fcd720f186..dd2ba5dd77 100644 --- a/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml +++ b/spec/build/bsps/arm/stm32h7/optethgpiobregs.yml @@ -1,19 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-string: null - define-unquoted: null build-type: option -default: null -default-by-variant: -- value: GPIO_PIN_13 - variants: - - arm/nucleo-h743zi +copyrights: +- Copyright (C) 2021 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/nucleo-h743zi + value: GPIO_PIN_13 +description: | + GPIO B pins used for the ETH pin configuration. enabled-by: true format: '{}' links: [] name: STM32H7_ETH_GPIOB_PINS -description: | - GPIO B pins used for the ETH pin configuration. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml b/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml index a6c0acbb7d..9935db94a7 100644 --- a/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml +++ b/spec/build/bsps/arm/stm32h7/optethgpiogregs.yml @@ -1,19 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-string: null - define-unquoted: null build-type: option -default: ( GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 ) -default-by-variant: -- value: ( GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13 ) - variants: - - arm/nucleo-h743zi +copyrights: +- Copyright (C) 2021 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/nucleo-h743zi + value: ( GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13 ) +- enabled-by: true + value: ( GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 ) +description: | + GPIO G pins used for the ETH pin configuration. enabled-by: true format: '{}' links: [] name: STM32H7_ETH_GPIOG_PINS -description: | - GPIO G pins used for the ETH pin configuration. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/opthse.yml b/spec/build/bsps/arm/stm32h7/opthse.yml index 51366932e1..f7b97d4aae 100644 --- a/spec/build/bsps/arm/stm32h7/opthse.yml +++ b/spec/build/bsps/arm/stm32h7/opthse.yml @@ -4,17 +4,19 @@ actions: - assert-uint32: null - format-and-define: null build-type: option -default: 25000000 -default-by-variant: -- value: 8000000 - variants: - - arm/nucleo-h743zi +copyrights: +- Copyright (C) 2021 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/nucleo-h743zi + value: 8000000 +- enabled-by: arm/stm32h7b3i-dk + value: 24000000 +- enabled-by: true + value: 25000000 +description: | + Frequency of the external high speed oscillator (HSE). enabled-by: true format: '{}' links: [] name: STM32H7_HSE_FREQUENCY -description: | - Frequency of the external high speed oscillator (HSE). type: build -copyrights: -- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optlinkcmds.yml b/spec/build/bsps/arm/stm32h7/optlinkcmds.yml index d0bb033cef..cee48a999e 100644 --- a/spec/build/bsps/arm/stm32h7/optlinkcmds.yml +++ b/spec/build/bsps/arm/stm32h7/optlinkcmds.yml @@ -1,17 +1,28 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-string: null - env-assign: null build-type: option -default: linkcmds.sdram -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/nucleo-h743zi + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h750b-dk + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + - arm/stm32h7b3i-dk + value: linkcmds.flash +- enabled-by: true + value: linkcmds.sdram +description: | + The default linker command file. Must be either linkcmds.flash, + linkcmds.sdram, linkcmds.sram, linkcmds.sram_sdram + or linkcmds.flash_sdram enabled-by: true format: '{}' links: [] name: STM32H7_DEFAULT_LINKCMDS -description: | - The default linker command file. Must be either linkcmds.flash or - linkcmds.sdram. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemdtcmsz.yml b/spec/build/bsps/arm/stm32h7/optmemdtcmsz.yml index e7c1a2bdf6..28f77a0654 100644 --- a/spec/build/bsps/arm/stm32h7/optmemdtcmsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemdtcmsz.yml @@ -1,16 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x20000 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00020000 +description: | + Size of the Data Tightly Coupled Memory (DTCM) in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_DTCM_SIZE -description: | - Size of the Data Tightly Coupled Memory (DTCM) in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml b/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml new file mode 100644 index 0000000000..facee637dc --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/optmemflashlatency.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- define-unquoted: null +build-type: option +copyrights: +- Copyright (C) 2022 Karel Gardas <karel@functional.vision> +default: +- enabled-by: arm/stm32h7b3i-dk + value: FLASH_LATENCY_6 +- enabled-by: true + value: FLASH_LATENCY_4 +description: | + Internal Flash latency +enabled-by: true +format: '{}' +links: [] +name: STM32H7_FLASH_LATENCY +type: build diff --git a/spec/build/bsps/arm/stm32h7/optmemflashorigin.yml b/spec/build/bsps/arm/stm32h7/optmemflashorigin.yml new file mode 100644 index 0000000000..1c6bb33545 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/optmemflashorigin.yml @@ -0,0 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- env-assign: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval-m4 + value: 0x08100000 +- enabled-by: true + value: 0x08000000 +description: | + Origin address of the internal flash. +enabled-by: true +format: '{:#010x}' +links: [] +name: STM32H7_MEMORY_FLASH_ORIGIN +type: build diff --git a/spec/build/bsps/arm/stm32h7/optmemflashsz.yml b/spec/build/bsps/arm/stm32h7/optmemflashsz.yml index 627543f9a8..b14e0c9da2 100644 --- a/spec/build/bsps/arm/stm32h7/optmemflashsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemflashsz.yml @@ -1,16 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x200000 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval-m4 + value: 0x00100000 +- enabled-by: true + value: 0x00200000 +description: | + Size of the internal flash in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_FLASH_SIZE -description: | - Size of the internal flash in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemitcmsz.yml b/spec/build/bsps/arm/stm32h7/optmemitcmsz.yml index 610de5f074..52cbb2bd8e 100644 --- a/spec/build/bsps/arm/stm32h7/optmemitcmsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemitcmsz.yml @@ -1,18 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0xff00 -default-by-variant: [] -enabled-by: true -format: '{:#010x}' -links: [] -name: STM32H7_MEMORY_ITCM_SIZE +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x0000ff00 description: | Size of the Instruction Tightly Coupled Memory (ITCM) in bytes. The size must take the NULL pointer protection memory area into account (STM32H7_MEMORY_NULL_SIZE). +enabled-by: true +format: '{:#010x}' +links: [] +name: STM32H7_MEMORY_ITCM_SIZE type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemnandsz.yml b/spec/build/bsps/arm/stm32h7/optmemnandsz.yml index 0bfbcc4623..22120a3ace 100644 --- a/spec/build/bsps/arm/stm32h7/optmemnandsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemnandsz.yml @@ -1,16 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00000000 +description: | + Size of the NAND flash in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_NAND_SIZE -description: | - Size of the NAND flash in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemnorsz.yml b/spec/build/bsps/arm/stm32h7/optmemnorsz.yml index d41d4e9e49..36f79a0295 100644 --- a/spec/build/bsps/arm/stm32h7/optmemnorsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemnorsz.yml @@ -1,16 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00000000 +description: | + Size of the NOR flash or PSRAM in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_NOR_SIZE -description: | - Size of the NOR flash or PSRAM in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemnullsz.yml b/spec/build/bsps/arm/stm32h7/optmemnullsz.yml index a31169adb1..99c8c0c07b 100644 --- a/spec/build/bsps/arm/stm32h7/optmemnullsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemnullsz.yml @@ -1,17 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 256 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00000100 +description: | + Size of the NULL pointer protection area in bytes. This memory area reduces + the size of the ITCM available to the application (STM32H7_MEMORY_ITCM_SIZE). enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_NULL_SIZE -description: | - Size of the NULL pointer protection area in bytes. This memory area reduces - the size of the ITCM available to the application (STM32H7_MEMORY_ITCM_SIZE). type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemperipheralsz.yml b/spec/build/bsps/arm/stm32h7/optmemperipheralsz.yml index 0a1bd610e7..3fed0ef2b2 100644 --- a/spec/build/bsps/arm/stm32h7/optmemperipheralsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemperipheralsz.yml @@ -1,16 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x20000000 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x20000000 +description: | + Size of the peripheral memory in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_PERIPHERAL_SIZE -description: | - Size of the peripheral memory in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemquadspisz.yml b/spec/build/bsps/arm/stm32h7/optmemquadspisz.yml index 11e5f943e0..821ae3c197 100644 --- a/spec/build/bsps/arm/stm32h7/optmemquadspisz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemquadspisz.yml @@ -1,16 +1,23 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null +- define-unquoted: null build-type: option -default: 0 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h750b-dk + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + value: 0x08000000 +- enabled-by: true + value: 0x00000000 +description: | + Size of the QUADSPI memory in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_QUADSPI_SIZE -description: | - Size of the QUADSPI memory in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml b/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml index 11228ddb92..bd1053db38 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml @@ -1,16 +1,25 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 33554432 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/nucleo-h743zi + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + - arm/stm32h7b3i-dk + value: 0x00000000 +- enabled-by: true + value: 0x02000000 +description: | + Size of the SDRAM 1 in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_SDRAM_1_SIZE -description: | - Size of the SDRAM 1 in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemsdram2sz.yml b/spec/build/bsps/arm/stm32h7/optmemsdram2sz.yml index 5a1ffdcace..5216e9b184 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsdram2sz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsdram2sz.yml @@ -1,16 +1,26 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + value: 0x02000000 +- enabled-by: + - arm/stm32h750b-dk + value: 0x01000000 +- enabled-by: true + value: 0x00000000 +description: | + Size of the SDRAM 2 in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_SDRAM_2_SIZE -description: | - Size of the SDRAM 2 in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemsram1sz.yml b/spec/build/bsps/arm/stm32h7/optmemsram1sz.yml index 01e9dbe1cc..364a983508 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsram1sz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsram1sz.yml @@ -1,16 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x20000 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32h7b3i-dk + value: 0x00010000 +- enabled-by: true + value: 0x00020000 +description: | + Size of the SRAM 1 (D2 domain) in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_SRAM_1_SIZE -description: | - Size of the SRAM 1 (D2 domain) in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemsram2sz.yml b/spec/build/bsps/arm/stm32h7/optmemsram2sz.yml index 2a4890730a..69bf938872 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsram2sz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsram2sz.yml @@ -1,16 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x20000 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32h7b3i-dk + value: 0x00010000 +- enabled-by: true + value: 0x00020000 +description: | + Size of the SRAM 2 (D2 domain) in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_SRAM_2_SIZE -description: | - Size of the SRAM 2 (D2 domain) in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemsram3sz.yml b/spec/build/bsps/arm/stm32h7/optmemsram3sz.yml index eca335fd81..2651b5fb43 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsram3sz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsram3sz.yml @@ -1,16 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x8000 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32h7b3i-dk + value: 0x00000000 +- enabled-by: true + value: 0x00008000 +description: | + Size of the SRAM 3 (D2 domain) in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_SRAM_3_SIZE -description: | - Size of the SRAM 3 (D2 domain) in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemsram4sz.yml b/spec/build/bsps/arm/stm32h7/optmemsram4sz.yml index cda2e722a4..378c7e66ec 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsram4sz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsram4sz.yml @@ -1,16 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x10000 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32h7b3i-dk + value: 0x00008000 +- enabled-by: true + value: 0x00010000 +description: | + Size of the SRAM 4 (D3 domain) in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_SRAM_4_SIZE -description: | - Size of the SRAM 4 (D3 domain) in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml b/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml index 9cb05540b7..a450d471d5 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsramaxisz.yml @@ -1,16 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x80000 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32h7b3i-dk + value: 0x000a0000 +- enabled-by: true + value: 0x00080000 +description: | + Size of the AXI SRAM (D1 domain) in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_SRAM_AXI_SIZE -description: | - Size of the AXI SRAM (D1 domain) in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optmemsrambackupsz.yml b/spec/build/bsps/arm/stm32h7/optmemsrambackupsz.yml index f1c5f60bac..d9ceebb5d3 100644 --- a/spec/build/bsps/arm/stm32h7/optmemsrambackupsz.yml +++ b/spec/build/bsps/arm/stm32h7/optmemsrambackupsz.yml @@ -1,16 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-integer: null - env-assign: null build-type: option -default: 0x1000 -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00001000 +description: | + Size of backup SRAM in bytes. enabled-by: true format: '{:#010x}' links: [] name: STM32H7_MEMORY_SRAM_BACKUP_SIZE -description: | - Size of backup SRAM in bytes. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optprintkinstance.yml b/spec/build/bsps/arm/stm32h7/optprintkinstance.yml index 6eaf4a2011..e02a9c4fb7 100644 --- a/spec/build/bsps/arm/stm32h7/optprintkinstance.yml +++ b/spec/build/bsps/arm/stm32h7/optprintkinstance.yml @@ -1,16 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-string: null - define-unquoted: null build-type: option -default: stm32h7_usart1_instance -default-by-variant: [] +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/nucleo-h743zi + - arm/stm32h750b-dk + value: stm32h7_usart3_instance +- enabled-by: true + value: stm32h7_usart1_instance +description: | + UART/USART instance used for printk() and getchark(). enabled-by: true format: '{}' links: [] name: STM32H7_PRINTK_INSTANCE -description: | - UART/USART instance used for printk() and getchark(). type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optpwrsupply.yml b/spec/build/bsps/arm/stm32h7/optpwrsupply.yml new file mode 100644 index 0000000000..2fec330314 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/optpwrsupply.yml @@ -0,0 +1,27 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- define-unquoted: null +build-type: option +copyrights: +- Copyright (C) 2022 Karel Gardas <karel@functional.vision> +default: +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + - arm/stm32h7b3i-dk + value: PWR_DIRECT_SMPS_SUPPLY +- enabled-by: true + value: PWR_LDO_SUPPLY +description: | + Board power supply mechanism configuration. WARNING: wrong configuration here + may result in your board being unaccessible using ST-Link interface! Please + consult board datasheet for more information about various power supply + options and about how to fix possible misconfiguration. +enabled-by: true +format: '{}' +links: [] +name: STM32H7_PWR_SUPPLY +type: build diff --git a/spec/build/bsps/arm/stm32h7/optuart7gpiopins.yml b/spec/build/bsps/arm/stm32h7/optuart7gpiopins.yml new file mode 100644 index 0000000000..0252bdab7c --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/optuart7gpiopins.yml @@ -0,0 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- define-unquoted: null +build-type: option +copyrights: +- Copyright (C) 2023 On-Line Applications Research (OAR) +default: +- enabled-by: true + value: ( GPIO_PIN_3 | GPIO_PIN_4 ) +description: | + GPIO pins used for the UART7 pin configuration. +enabled-by: true +format: '{}' +links: [] +name: STM32H7_UART7_GPIO_PINS +type: build diff --git a/spec/build/bsps/arm/stm32h7/optuart7gpioregs.yml b/spec/build/bsps/arm/stm32h7/optuart7gpioregs.yml new file mode 100644 index 0000000000..16ce3bf526 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/optuart7gpioregs.yml @@ -0,0 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- define-unquoted: null +build-type: option +copyrights: +- Copyright (C) 2023 On-Line Applications Research (OAR) +default: +- enabled-by: true + value: GPIOB +description: | + GPIO registers used for the UART7 pin configuration. +enabled-by: true +format: '{}' +links: [] +name: STM32H7_UART7_GPIO_REGS +type: build diff --git a/spec/build/bsps/arm/stm32h7/optusart1alternatefunc.yml b/spec/build/bsps/arm/stm32h7/optusart1alternatefunc.yml new file mode 100644 index 0000000000..b4b2b6b774 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/optusart1alternatefunc.yml @@ -0,0 +1,22 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- define-unquoted: null +build-type: option +copyrights: +- Copyright (C) 2022 Karel Gardas <karel@functional.vision> +default: +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h7b3i-dk + value: GPIO_AF7_USART1 +- enabled-by: true + value: GPIO_AF4_USART1 +description: | + Alternate function mapping for the USART1 pin configuration. +enabled-by: true +format: '{}' +links: [] +name: STM32H7_USART1_ALT_FUNC +type: build diff --git a/spec/build/bsps/arm/stm32h7/optusart1gpiopins.yml b/spec/build/bsps/arm/stm32h7/optusart1gpiopins.yml new file mode 100644 index 0000000000..e1ea0e77c3 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/optusart1gpiopins.yml @@ -0,0 +1,25 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- define-unquoted: null +build-type: option +copyrights: +- Copyright (C) 2021, 22 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h750b-dk + value: ( GPIO_PIN_6 | GPIO_PIN_7 ) +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h7b3i-dk + value: ( GPIO_PIN_9 | GPIO_PIN_10 ) +- enabled-by: true + value: ( GPIO_PIN_14 | GPIO_PIN_15 ) +description: | + GPIO pins used for the USART1 pin configuration. +enabled-by: true +format: '{}' +links: [] +name: STM32H7_USART1_GPIO_PINS +type: build diff --git a/spec/build/bsps/arm/stm32h7/optusart1gpioregs.yml b/spec/build/bsps/arm/stm32h7/optusart1gpioregs.yml new file mode 100644 index 0000000000..028f023fd7 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/optusart1gpioregs.yml @@ -0,0 +1,27 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- define-unquoted: null +build-type: option +copyrights: +- Copyright (C) 2021 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + - arm/stm32h7b3i-dk + value: GPIOA +- enabled-by: + - arm/stm32h750b-dk + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + value: GPIOB +- enabled-by: true + value: GPIOD +description: | + GPIO registers used for the USART1 pin configuration. +enabled-by: true +format: '{}' +links: [] +name: STM32H7_USART1_GPIO_REGS +type: build diff --git a/spec/build/bsps/arm/stm32h7/optusart2gpiopins.yml b/spec/build/bsps/arm/stm32h7/optusart2gpiopins.yml new file mode 100644 index 0000000000..731d9c07f5 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/optusart2gpiopins.yml @@ -0,0 +1,20 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- define-unquoted: null +build-type: option +copyrights: +- Copyright (C) 2023 On-Line Applications Research (OAR) +default: +- enabled-by: + - arm/stm32h750b-dk + value: ( GPIO_PIN_5 | GPIO_PIN_6 ) +- enabled-by: true + value: ( GPIO_PIN_2 | GPIO_PIN_3 ) +description: | + GPIO pins used for the USART1 pin configuration. +enabled-by: true +format: '{}' +links: [] +name: STM32H7_USART2_GPIO_PINS +type: build diff --git a/spec/build/bsps/arm/stm32h7/optusart2gpioregs.yml b/spec/build/bsps/arm/stm32h7/optusart2gpioregs.yml new file mode 100644 index 0000000000..9c297e2efd --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/optusart2gpioregs.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- define-unquoted: null +build-type: option +copyrights: +- Copyright (C) 2023 On-Line Applications Research (OAR) +default: +- enabled-by: arm/stm32h750b-dk + value: GPIOD +- enabled-by: true + value: GPIOA +description: | + GPIO registers used for the USART2 pin configuration. +enabled-by: true +format: '{}' +links: [] +name: STM32H7_USART2_GPIO_REGS +type: build diff --git a/spec/build/bsps/arm/stm32h7/optusart3gpiopins.yml b/spec/build/bsps/arm/stm32h7/optusart3gpiopins.yml index 87aad00ee0..e03d637e1a 100644 --- a/spec/build/bsps/arm/stm32h7/optusart3gpiopins.yml +++ b/spec/build/bsps/arm/stm32h7/optusart3gpiopins.yml @@ -1,16 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-string: null - define-unquoted: null build-type: option -default: ( GPIO_PIN_8 | GPIO_PIN_9 ) -default-by-variant: [] +copyrights: +- Copyright (C) 2021 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32h750b-dk + value: ( GPIO_PIN_10 | GPIO_PIN_11 ) +- enabled-by: true + value: ( GPIO_PIN_8 | GPIO_PIN_9 ) +description: | + GPIO pins used for the USART3 pin configuration. enabled-by: true format: '{}' links: [] name: STM32H7_USART3_GPIO_PINS -description: | - GPIO pins used for the USART3 pin configuration. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optusart3gpioregs.yml b/spec/build/bsps/arm/stm32h7/optusart3gpioregs.yml index 7168a00111..60dbd19c4f 100644 --- a/spec/build/bsps/arm/stm32h7/optusart3gpioregs.yml +++ b/spec/build/bsps/arm/stm32h7/optusart3gpioregs.yml @@ -1,16 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-string: null - define-unquoted: null build-type: option -default: GPIOD -default-by-variant: [] +copyrights: +- Copyright (C) 2021 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32h750b-dk + value: GPIOB +- enabled-by: true + value: GPIOD +description: | + GPIO registers used for the USART3 pin configuration. enabled-by: true format: '{}' links: [] name: STM32H7_USART3_GPIO_REGS -description: | - GPIO registers used for the USART3 pin configuration. type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/optvariant.yml b/spec/build/bsps/arm/stm32h7/optvariant.yml index 586fa2052b..a24f0db988 100644 --- a/spec/build/bsps/arm/stm32h7/optvariant.yml +++ b/spec/build/bsps/arm/stm32h7/optvariant.yml @@ -1,3 +1,4 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - get-string: null - script: | @@ -12,18 +13,31 @@ actions: ) conf.define_cond(value, True) build-type: option -default: STM32H743xx -default-by-variant: [] -enabled-by: true -format: '{}' -links: [] -name: STM32H7_VARIANT +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/stm32h7b3i-dk + value: STM32H7B3xxQ +- enabled-by: + - arm/stm32h757i-eval + - arm/stm32h757i-eval-m4 + value: STM32H757xx +- enabled-by: + - arm/stm32h747i-disco + - arm/stm32h747i-disco-m4 + value: STM32H747xx +- enabled-by: + - arm/stm32h750b-dk + value: STM32H750xx +- enabled-by: true + value: STM32H743xx description: | Select the STM32H7 series chip variant out of STM32H742xx, STM32H743xx, STM32H745xx, STM32H747xx, STM32H750xx, STM32H753xx, STM32H755xx, STM32H757xx, STM32H7A3xx, STM32H7A3xxQ, STM32H7B0xx, STM32H7B0xxQ, STM32H7B3xx, and STM32H7B3xxQ. +enabled-by: true +format: '{}' +links: [] +name: STM32H7_VARIANT type: build -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) diff --git a/spec/build/bsps/arm/stm32h7/tststm32h757i-eval.yml b/spec/build/bsps/arm/stm32h7/tststm32h757i-eval.yml new file mode 100644 index 0000000000..4880b59579 --- /dev/null +++ b/spec/build/bsps/arm/stm32h7/tststm32h757i-eval.yml @@ -0,0 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- set-test-state: + reason: null + state: exclude + tests: + - fsdosfsname01 + - linpack + - record02 +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] +description: '' +enabled-by: true +links: +- role: build-dependency + uid: ../../tstnoiconv +- role: build-dependency + uid: ../../tstnolibdl +type: build diff --git a/spec/build/bsps/arm/tms570/abi.yml b/spec/build/bsps/arm/tms570/abi.yml index 0177616e2a..912f2f5029 100644 --- a/spec/build/bsps/arm/tms570/abi.yml +++ b/spec/build/bsps/arm/tms570/abi.yml @@ -5,14 +5,15 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -march=armv7-r -- -mthumb -- -mbig-endian -- -mfpu=vfpv3-d16 -- -mfloat-abi=hard -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-r + - -mthumb + - -mbig-endian + - -mfpu=vfpv3-d16 + - -mfloat-abi=hard description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/tms570/bspls3137hdkwithloader.yml b/spec/build/bsps/arm/tms570/bsplc4357hdk.yml index f8e8cb81bb..54710fccb0 100644 --- a/spec/build/bsps/arm/tms570/bspls3137hdkwithloader.yml +++ b/spec/build/bsps/arm/tms570/bsplc4357hdk.yml @@ -1,10 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause arch: arm -bsp: tms570ls3137_hdk_with_loader +bsp: tms570lc4357_hdk build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2023 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: tms570 @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 - role: build-dependency uid: ../../tstsmallmem +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/tms570/bsplc4357hdksdram.yml b/spec/build/bsps/arm/tms570/bsplc4357hdksdram.yml new file mode 100644 index 0000000000..376b1635f6 --- /dev/null +++ b/spec/build/bsps/arm/tms570/bsplc4357hdksdram.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: tms570lc4357_hdk_sdram +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +cppflags: [] +enabled-by: true +family: tms570 +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/arm/tms570/bspls3137hdk.yml b/spec/build/bsps/arm/tms570/bspls3137hdk.yml index e2704a268d..14b783aef2 100644 --- a/spec/build/bsps/arm/tms570/bspls3137hdk.yml +++ b/spec/build/bsps/arm/tms570/bspls3137hdk.yml @@ -4,7 +4,7 @@ bsp: tms570ls3137_hdk build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: tms570 @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 - role: build-dependency uid: ../../tstsmallmem +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/tms570/bspls3137hdkintram.yml b/spec/build/bsps/arm/tms570/bspls3137hdkintram.yml index 77a21e861b..0a6464c25c 100644 --- a/spec/build/bsps/arm/tms570/bspls3137hdkintram.yml +++ b/spec/build/bsps/arm/tms570/bspls3137hdkintram.yml @@ -4,7 +4,7 @@ bsp: tms570ls3137_hdk_intram build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: tms570 @@ -12,10 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: tstls3137hdkintram - role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/tms570/bspls3137hdksdram.yml b/spec/build/bsps/arm/tms570/bspls3137hdksdram.yml index 8ffb5294d2..bd7bf47bd0 100644 --- a/spec/build/bsps/arm/tms570/bspls3137hdksdram.yml +++ b/spec/build/bsps/arm/tms570/bspls3137hdksdram.yml @@ -4,7 +4,7 @@ bsp: tms570ls3137_hdk_sdram build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: tms570 @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/tms570/grp.yml b/spec/build/bsps/arm/tms570/grp.yml index f7b84e2f57..5a3d4784be 100644 --- a/spec/build/bsps/arm/tms570/grp.yml +++ b/spec/build/bsps/arm/tms570/grp.yml @@ -1,13 +1,18 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] ldflags: [] links: - role: build-dependency + uid: optvariant +- role: build-dependency uid: ../grp - role: build-dependency uid: ../start @@ -16,25 +21,37 @@ links: - role: build-dependency uid: obj - role: build-dependency + uid: optlowinit +- role: build-dependency uid: objhwinit - role: build-dependency - uid: optcclk + uid: objnohwinit - role: build-dependency uid: optconirq - role: build-dependency - uid: optlowinit -- role: build-dependency uid: optmintskstksz - role: build-dependency uid: optoscmain - role: build-dependency - uid: optoscrtc -- role: build-dependency uid: optreginit - role: build-dependency uid: optscibaud - role: build-dependency - uid: opttms570ls3137 + uid: optlinkflags +- role: build-dependency + uid: optmemflashorigin +- role: build-dependency + uid: optmemflashsize +- role: build-dependency + uid: optmemsdramorigin +- role: build-dependency + uid: optmemsdramsize +- role: build-dependency + uid: optmemsramorigin +- role: build-dependency + uid: optmemsramsize +- role: build-dependency + uid: linkcmdsmemory - role: build-dependency uid: ../../linkcmds - role: build-dependency @@ -42,6 +59,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../bspopts type: build use-after: [] diff --git a/spec/build/bsps/arm/tms570/linkcmdsmemory.yml b/spec/build/bsps/arm/tms570/linkcmdsmemory.yml new file mode 100644 index 0000000000..33a87513bd --- /dev/null +++ b/spec/build/bsps/arm/tms570/linkcmdsmemory.yml @@ -0,0 +1,27 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: config-file +content: | + MEMORY { + ROM_INT : ORIGIN = ${TMS570_MEMORY_FLASH_ORIGIN:#010x}, LENGTH = ${TMS570_MEMORY_FLASH_SIZE:#010x} + RAM_INT : ORIGIN = ${TMS570_MEMORY_SRAM_ORIGIN:#010x}, LENGTH = ${TMS570_MEMORY_SRAM_SIZE:#010x} + RAM_EXT : ORIGIN = ${TMS570_MEMORY_SDRAM_ORIGIN:#010x}, LENGTH = ${TMS570_MEMORY_SDRAM_SIZE:#010x} + } + + tms570_memory_flash_begin = ORIGIN (ROM_INT); + tms570_memory_flash_end = ORIGIN (ROM_INT) + LENGTH (ROM_INT); + tms570_memory_flash_size = LENGTH (ROM_INT); + + tms570_memory_sram_begin = ORIGIN (RAM_INT); + tms570_memory_sram_end = ORIGIN (RAM_INT) + LENGTH (RAM_INT); + tms570_memory_sram_size = LENGTH (RAM_INT); + + tms570_memory_sdram_begin = ORIGIN (RAM_EXT); + tms570_memory_sdram_end = ORIGIN (RAM_EXT) + LENGTH (RAM_EXT); + tms570_memory_sdram_size = LENGTH (RAM_EXT); +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +enabled-by: true +install-path: ${BSP_LIBDIR} +links: [] +target: linkcmds.memory +type: build diff --git a/spec/build/bsps/arm/tms570/obj.yml b/spec/build/bsps/arm/tms570/obj.yml index 36f99a700e..d9f0043397 100644 --- a/spec/build/bsps/arm/tms570/obj.yml +++ b/spec/build/bsps/arm/tms570/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -11,7 +11,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/tms570/include/bsp.h - - bsps/arm/tms570/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/tms570/include/bsp/irq.h @@ -19,10 +18,7 @@ install: - bsps/arm/tms570/include/bsp/tms570-pinmux.h - bsps/arm/tms570/include/bsp/tms570-pins.h - bsps/arm/tms570/include/bsp/tms570-pom.h - - bsps/arm/tms570/include/bsp/tms570-rti.h - bsps/arm/tms570/include/bsp/tms570-sci-driver.h - - bsps/arm/tms570/include/bsp/tms570-sci.h - - bsps/arm/tms570/include/bsp/tms570-vim.h - bsps/arm/tms570/include/bsp/tms570.h - bsps/arm/tms570/include/bsp/tms570_hwinit.h - bsps/arm/tms570/include/bsp/tms570_selftest.h @@ -69,10 +65,11 @@ install: - bsps/arm/tms570/include/bsp/ti_herc/reg_vim.h - destination: ${BSP_LIBDIR} source: + - bsps/arm/tms570/start/linkcmds.tms570lc4357_hdk + - bsps/arm/tms570/start/linkcmds.tms570lc4357_hdk_sdram - bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk - bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_intram - bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_sdram - - bsps/arm/tms570/start/linkcmds.tms570ls3137_hdk_with_loader links: [] source: - bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c @@ -84,17 +81,17 @@ source: - bsps/arm/tms570/cpucounter/cpucounterread.c - bsps/arm/tms570/irq/irq.c - bsps/arm/tms570/start/bspreset.c +- bsps/arm/tms570/start/bsprestart.c - bsps/arm/tms570/start/bspstart.c -- bsps/arm/tms570/start/bspstarthooks.c - bsps/arm/tms570/start/pinmux.c - bsps/arm/tms570/start/tms570-pom.c -- bsps/shared/cache/nocache.c +- bsps/arm/shared/cache/cache-cp15.c +- bsps/arm/shared/cache/cache-v7ar-disable-data.S - bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c - bsps/shared/dev/serial/console-termios.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/tms570/objhwinit.yml b/spec/build/bsps/arm/tms570/objhwinit.yml index 04241dffc9..01b1502280 100644 --- a/spec/build/bsps/arm/tms570/objhwinit.yml +++ b/spec/build/bsps/arm/tms570/objhwinit.yml @@ -2,20 +2,26 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] -enabled-by: -- TMS570_USE_HWINIT_STARTUP +enabled-by: TMS570_USE_HWINIT_STARTUP includes: [] -install: [] -links: [] +install: +- destination: ${BSP_INCLUDEDIR}/bsp/ti_herc + source: + - bsps/arm/tms570/include/bsp/ti_herc/errata_SSWF021_45.h +links: +- role: build-dependency + uid: objhwinitls3137hdk +- role: build-dependency + uid: objhwinitlc4357hdk source: +- bsps/arm/tms570/start/bspstarthooks.c - bsps/arm/tms570/start/bspstarthooks-hwinit.c +- bsps/arm/tms570/start/errata_SSWF021_45.c - bsps/arm/tms570/start/fail_notification.c -- bsps/arm/tms570/start/init_emif_sdram.c - bsps/arm/tms570/start/init_esm.c -- bsps/arm/tms570/start/init_pinmux.c - bsps/arm/tms570/start/init_system.c - bsps/arm/tms570/start/tms570_selftest.c - bsps/arm/tms570/start/tms570_selftest_par_can.c diff --git a/spec/build/bsps/arm/tms570/objhwinitlc4357hdk.yml b/spec/build/bsps/arm/tms570/objhwinitlc4357hdk.yml new file mode 100644 index 0000000000..1b91475804 --- /dev/null +++ b/spec/build/bsps/arm/tms570/objhwinitlc4357hdk.yml @@ -0,0 +1,14 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] +enabled-by: arm/tms570lc4357_hdk +includes: [] +install: [] +links: [] +source: +- bsps/arm/tms570/start/hwinit-lc4357-hdk.c +type: build diff --git a/spec/build/bsps/arm/tms570/objhwinitls3137hdk.yml b/spec/build/bsps/arm/tms570/objhwinitls3137hdk.yml new file mode 100644 index 0000000000..9971a0a86f --- /dev/null +++ b/spec/build/bsps/arm/tms570/objhwinitls3137hdk.yml @@ -0,0 +1,14 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] +enabled-by: arm/tms570ls3137_hdk +includes: [] +install: [] +links: [] +source: +- bsps/arm/tms570/start/hwinit-ls3137-hdk.c +type: build diff --git a/spec/build/bsps/arm/tms570/objnohwinit.yml b/spec/build/bsps/arm/tms570/objnohwinit.yml new file mode 100644 index 0000000000..0d122b7d98 --- /dev/null +++ b/spec/build/bsps/arm/tms570/objnohwinit.yml @@ -0,0 +1,16 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2022 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] +enabled-by: + not: TMS570_USE_HWINIT_STARTUP +includes: [] +install: [] +links: [] +source: +- bsps/arm/shared/start/bspstarthook0-empty.c +- bsps/arm/tms570/start/bspstarthooks.c +type: build diff --git a/spec/build/bsps/arm/tms570/optconirq.yml b/spec/build/bsps/arm/tms570/optconirq.yml index 3e3dc5a836..80a5502ac2 100644 --- a/spec/build/bsps/arm/tms570/optconirq.yml +++ b/spec/build/bsps/arm/tms570/optconirq.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 1 description: | The tms570 console driver can operate in either polled or interrupt mode. enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optlinkflags.yml b/spec/build/bsps/arm/tms570/optlinkflags.yml new file mode 100644 index 0000000000..5c32e178b3 --- /dev/null +++ b/spec/build/bsps/arm/tms570/optlinkflags.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- split: null +- env-append: LINKFLAGS +- env-append: PKGCONFIG_LDFLAGS +build-type: option +copyrights: +- Copyright (C) 2022 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: + - -mbe32 +description: | + TMS570-specific flags passed to the linker. +enabled-by: true +links: [] +name: TMS570_LINKFLAGS +type: build diff --git a/spec/build/bsps/arm/tms570/optlowinit.yml b/spec/build/bsps/arm/tms570/optlowinit.yml index d889dd2573..32b84aa08c 100644 --- a/spec/build/bsps/arm/tms570/optlowinit.yml +++ b/spec/build/bsps/arm/tms570/optlowinit.yml @@ -5,11 +5,17 @@ actions: - env-enable: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/tms570ls3137_hdk + - arm/tms570lc4357_hdk + value: true +- enabled-by: true + value: false description: | - Include BSP startup code for TMS570LS3137 which allows to start RTEMS application directly after reset + Include BSP startup code for TMS570LS3137 or TMS57LC4357 which allows to + start RTEMS application directly after reset. enabled-by: true links: [] name: TMS570_USE_HWINIT_STARTUP diff --git a/spec/build/bsps/arm/tms570/optmemflashorigin.yml b/spec/build/bsps/arm/tms570/optmemflashorigin.yml new file mode 100644 index 0000000000..c25e230f5c --- /dev/null +++ b/spec/build/bsps/arm/tms570/optmemflashorigin.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- env-assign: null +- format-and-define: TMS570_MEMORY_FLASH_ORIGIN +build-type: option +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00000000 +description: | + Origin of the internal flash memory. +enabled-by: true +format: '{:#010x}' +links: [] +name: TMS570_MEMORY_FLASH_ORIGIN +type: build diff --git a/spec/build/bsps/arm/tms570/optmemflashsize.yml b/spec/build/bsps/arm/tms570/optmemflashsize.yml new file mode 100644 index 0000000000..defd82876e --- /dev/null +++ b/spec/build/bsps/arm/tms570/optmemflashsize.yml @@ -0,0 +1,20 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- env-assign: null +- format-and-define: TMS570_MEMORY_FLASH_SIZE +build-type: option +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +default: +- enabled-by: TMS570_VARIANT_4357 + value: 0x00400000 +- enabled-by: true + value: 0x00300000 +description: | + Size in bytes of the internal flash memory. +enabled-by: true +format: '{:#010x}' +links: [] +name: TMS570_MEMORY_FLASH_SIZE +type: build diff --git a/spec/build/bsps/arm/tms570/optmemsdramorigin.yml b/spec/build/bsps/arm/tms570/optmemsdramorigin.yml new file mode 100644 index 0000000000..2220fc07a0 --- /dev/null +++ b/spec/build/bsps/arm/tms570/optmemsdramorigin.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- env-assign: null +- format-and-define: TMS570_MEMORY_SDRAM_ORIGIN +build-type: option +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x80000000 +description: | + Origin of the external SDRAM memory. +enabled-by: true +format: '{:#010x}' +links: [] +name: TMS570_MEMORY_SDRAM_ORIGIN +type: build diff --git a/spec/build/bsps/arm/tms570/optmemsdramsize.yml b/spec/build/bsps/arm/tms570/optmemsdramsize.yml new file mode 100644 index 0000000000..e41cd24c40 --- /dev/null +++ b/spec/build/bsps/arm/tms570/optmemsdramsize.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- env-assign: null +- format-and-define: TMS570_MEMORY_SDRAM_SIZE +build-type: option +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00800000 +description: | + Size in bytes of the external SDRAM memory. +enabled-by: true +format: '{:#010x}' +links: [] +name: TMS570_MEMORY_SDRAM_SIZE +type: build diff --git a/spec/build/bsps/arm/tms570/optmemsramorigin.yml b/spec/build/bsps/arm/tms570/optmemsramorigin.yml new file mode 100644 index 0000000000..198eda69af --- /dev/null +++ b/spec/build/bsps/arm/tms570/optmemsramorigin.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- env-assign: null +- format-and-define: TMS570_MEMORY_SRAM_ORIGIN +build-type: option +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x08000000 +description: | + Origin of the internal SRAM memory. +enabled-by: true +format: '{:#010x}' +links: [] +name: TMS570_MEMORY_SRAM_ORIGIN +type: build diff --git a/spec/build/bsps/arm/tms570/optmemsramsize.yml b/spec/build/bsps/arm/tms570/optmemsramsize.yml new file mode 100644 index 0000000000..515819daad --- /dev/null +++ b/spec/build/bsps/arm/tms570/optmemsramsize.yml @@ -0,0 +1,20 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- env-assign: null +- format-and-define: TMS570_MEMORY_SRAM_SIZE +build-type: option +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +default: +- enabled-by: TMS570_VARIANT_4357 + value: 0x00080000 +- enabled-by: true + value: 0x00040000 +description: | + Size in bytes of the internal SRAM memory. +enabled-by: true +format: '{:#010x}' +links: [] +name: TMS570_MEMORY_SRAM_SIZE +type: build diff --git a/spec/build/bsps/arm/tms570/optmintskstksz.yml b/spec/build/bsps/arm/tms570/optmintskstksz.yml index 57e77ae551..ab61e0e502 100644 --- a/spec/build/bsps/arm/tms570/optmintskstksz.yml +++ b/spec/build/bsps/arm/tms570/optmintskstksz.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1024 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 1024 description: | Suggested minimum task stack size in bytes enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optoscmain.yml b/spec/build/bsps/arm/tms570/optoscmain.yml index 8ebd6bb82d..1755fdd85a 100644 --- a/spec/build/bsps/arm/tms570/optoscmain.yml +++ b/spec/build/bsps/arm/tms570/optoscmain.yml @@ -4,11 +4,17 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 12000000 -default-by-variant: [] +- Copyright (C) 2020, 2024 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/tms570lc4357_hdk + - arm/tms570lc4357_hdk_sdram + value: 16000000 +- enabled-by: true + value: 8000000 description: | - main oscillator frequency in Hz + The option value shall be the main oscillator (OSCIN) frequency in Hz of the + board. enabled-by: true format: '{}' links: [] diff --git a/spec/build/bsps/arm/tms570/optoscrtc.yml b/spec/build/bsps/arm/tms570/optoscrtc.yml deleted file mode 100644 index 8e14cbf9a8..0000000000 --- a/spec/build/bsps/arm/tms570/optoscrtc.yml +++ /dev/null @@ -1,16 +0,0 @@ -SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause -actions: -- get-integer: null -- define: null -build-type: option -copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 32768 -default-by-variant: [] -description: | - RTC oscillator frequency in Hz -enabled-by: true -format: '{}' -links: [] -name: TMS570_OSCILLATOR_RTC -type: build diff --git a/spec/build/bsps/arm/tms570/optreginit.yml b/spec/build/bsps/arm/tms570/optreginit.yml index 3f7e9f2bf2..8f3ea93556 100644 --- a/spec/build/bsps/arm/tms570/optreginit.yml +++ b/spec/build/bsps/arm/tms570/optreginit.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | The TMS570 needs to have the registers of its CPU initialized to avoid CCMR4F errors enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optscibaud.yml b/spec/build/bsps/arm/tms570/optscibaud.yml index e4eedd871b..e7454074d7 100644 --- a/spec/build/bsps/arm/tms570/optscibaud.yml +++ b/spec/build/bsps/arm/tms570/optscibaud.yml @@ -4,9 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 115200 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 115200 description: | baud for UARTs enabled-by: true diff --git a/spec/build/bsps/arm/tms570/optvariant.yml b/spec/build/bsps/arm/tms570/optvariant.yml new file mode 100644 index 0000000000..d8432a3fa0 --- /dev/null +++ b/spec/build/bsps/arm/tms570/optvariant.yml @@ -0,0 +1,29 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-in-set: + - 3137 + - 4357 +- define: null +- env-assign: null +- set-value: TMS570_VARIANT_${TMS570_VARIANT} +- substitute: null +- env-append: ENABLE +build-type: option +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/tms570lc4357_hdk + - arm/tms570lc4357_hdk_sdram + value: 4357 +- enabled-by: true + value: 3137 +description: | + Defines the TMS570 family variant. Use 3137 for the TMS570LS3137 and 4357 + for the TMSLC4357. +enabled-by: true +format: '{}' +links: [] +name: TMS570_VARIANT +type: build diff --git a/spec/build/bsps/arm/tms570/tstls3137hdkintram.yml b/spec/build/bsps/arm/tms570/tstls3137hdkintram.yml index aef6736d94..f93f69f74f 100644 --- a/spec/build/bsps/arm/tms570/tstls3137hdkintram.yml +++ b/spec/build/bsps/arm/tms570/tstls3137hdkintram.yml @@ -1,21 +1,19 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause actions: - set-test-state: - fileio: exclude - ftp01: exclude - iostream: exclude - loopback: exclude - mghttpd01: exclude - monitor02: exclude - pppd: exclude - rcxx01: exclude - syscall01: exclude - utf8proc01: exclude + reason: null + state: exclude + tests: + - fileio + - iostream + - monitor02 + - rcxx01 + - syscall01 + - utf8proc01 build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: null -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: [] description: '' enabled-by: true links: diff --git a/spec/build/bsps/arm/xen/abi.yml b/spec/build/bsps/arm/xen/abi.yml index ed581d94f4..3d7d863666 100644 --- a/spec/build/bsps/arm/xen/abi.yml +++ b/spec/build/bsps/arm/xen/abi.yml @@ -5,13 +5,14 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/xen/bspxen.yml b/spec/build/bsps/arm/xen/bspxen.yml index 0de27abf26..fd5d519083 100644 --- a/spec/build/bsps/arm/xen/bspxen.yml +++ b/spec/build/bsps/arm/xen/bspxen.yml @@ -4,7 +4,7 @@ bsp: xen_virtual build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: xen @@ -13,7 +13,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/xen/include/bsp.h - - bsps/arm/xen/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/xen/include/bsp/irq.h @@ -48,6 +47,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../optcachedata - role: build-dependency uid: ../../optcacheinst @@ -59,15 +60,17 @@ links: uid: ../../bspopts source: - bsps/arm/shared/cache/cache-cp15.c +- bsps/arm/shared/cache/cache-v7ar-disable-data.S - bsps/arm/shared/clock/arm-generic-timer-aarch32.c - bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c - bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c - bsps/arm/shared/start/bsp-start-memcpy.S +- bsps/arm/shared/start/bspstarthook0-empty.c - bsps/arm/xen/console/console.c - bsps/arm/xen/start/bspstart.c - bsps/arm/xen/start/bspstarthooks.c - bsps/arm/xen/start/bspstartmmu.c -- bsps/shared/dev/btimer/btimer-stub.c +- bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/clock/arm-generic-timer.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c - bsps/shared/dev/irq/arm-gicv2.c @@ -76,7 +79,6 @@ source: - bsps/shared/dev/serial/console-termios.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/bspreset-empty.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c diff --git a/spec/build/bsps/arm/xen/linkcmds.yml b/spec/build/bsps/arm/xen/linkcmds.yml index ab36af512b..0783165ee2 100644 --- a/spec/build/bsps/arm/xen/linkcmds.yml +++ b/spec/build/bsps/arm/xen/linkcmds.yml @@ -64,7 +64,7 @@ content: | INCLUDE linkcmds.armv4 copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG enabled-by: true install-path: ${BSP_LIBDIR} links: [] diff --git a/spec/build/bsps/arm/xen/optgentmunmask.yml b/spec/build/bsps/arm/xen/optgentmunmask.yml index 1e7c523f15..99ac071173 100644 --- a/spec/build/bsps/arm/xen/optgentmunmask.yml +++ b/spec/build/bsps/arm/xen/optgentmunmask.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | unmask the timer in the tick handler, since Xen will mask the virtual timer before injecting the interrupt to the guest enabled-by: true diff --git a/spec/build/bsps/arm/xen/optloadoff.yml b/spec/build/bsps/arm/xen/optloadoff.yml index 4589807f88..3860706802 100644 --- a/spec/build/bsps/arm/xen/optloadoff.yml +++ b/spec/build/bsps/arm/xen/optloadoff.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 32768 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00008000 description: | offset of RAM region from memory area base enabled-by: true diff --git a/spec/build/bsps/arm/xen/optnocachelen.yml b/spec/build/bsps/arm/xen/optnocachelen.yml index 389fbb596b..4b3539d499 100644 --- a/spec/build/bsps/arm/xen/optnocachelen.yml +++ b/spec/build/bsps/arm/xen/optnocachelen.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1048576 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00100000 description: | length of nocache RAM region enabled-by: true diff --git a/spec/build/bsps/arm/xen/optramlen.yml b/spec/build/bsps/arm/xen/optramlen.yml index 1d1b43615a..3722e3a0b2 100644 --- a/spec/build/bsps/arm/xen/optramlen.yml +++ b/spec/build/bsps/arm/xen/optramlen.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 8388608 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00800000 description: | length of memory area available to the BSP enabled-by: true diff --git a/spec/build/bsps/arm/xen/optramori.yml b/spec/build/bsps/arm/xen/optramori.yml index 95fbf64079..d81e732c64 100644 --- a/spec/build/bsps/arm/xen/optramori.yml +++ b/spec/build/bsps/arm/xen/optramori.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1073741824 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x40000000 description: | base address of memory area available to the BSP enabled-by: true diff --git a/spec/build/bsps/arm/xen/optzimghdr.yml b/spec/build/bsps/arm/xen/optzimghdr.yml index 56aa00c8b1..f6168f6d1d 100644 --- a/spec/build/bsps/arm/xen/optzimghdr.yml +++ b/spec/build/bsps/arm/xen/optzimghdr.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | include zImage boot header enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/abi.yml b/spec/build/bsps/arm/xilinx-zynq/abi.yml index a3a710c97d..280b42de1e 100644 --- a/spec/build/bsps/arm/xilinx-zynq/abi.yml +++ b/spec/build/bsps/arm/xilinx-zynq/abi.yml @@ -5,14 +5,15 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -- -mtune=cortex-a9 -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard + - -mtune=cortex-a9 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/bspmicrozed.yml b/spec/build/bsps/arm/xilinx-zynq/bspmicrozed.yml new file mode 100644 index 0000000000..6bd9f617af --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynq/bspmicrozed.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: xilinx_zynq_microzed +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2023 B. Moessner +cppflags: [] +enabled-by: true +family: xilinx-zynq +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/arm/xilinx-zynq/bsppicozed.yml b/spec/build/bsps/arm/xilinx-zynq/bsppicozed.yml new file mode 100644 index 0000000000..dc5504a1fa --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynq/bsppicozed.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: xilinx_zynq_picozed +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2023 B. Moessner +cppflags: [] +enabled-by: true +family: xilinx-zynq +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/arm/xilinx-zynq/bsppynq.yml b/spec/build/bsps/arm/xilinx-zynq/bsppynq.yml new file mode 100644 index 0000000000..8c39ca6109 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynq/bsppynq.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: xilinx_zynq_pynq +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2023 B. Moessner +cppflags: [] +enabled-by: true +family: xilinx-zynq +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/arm/xilinx-zynq/bspqemu.yml b/spec/build/bsps/arm/xilinx-zynq/bspqemu.yml index a8f59548d9..8068284d82 100644 --- a/spec/build/bsps/arm/xilinx-zynq/bspqemu.yml +++ b/spec/build/bsps/arm/xilinx-zynq/bspqemu.yml @@ -4,7 +4,7 @@ bsp: xilinx_zynq_a9_qemu build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: xilinx-zynq @@ -12,8 +12,10 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: ../../tstqemu +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/xilinx-zynq/bspzc702.yml b/spec/build/bsps/arm/xilinx-zynq/bspzc702.yml index 683c2c7b8c..a82254043d 100644 --- a/spec/build/bsps/arm/xilinx-zynq/bspzc702.yml +++ b/spec/build/bsps/arm/xilinx-zynq/bspzc702.yml @@ -4,7 +4,7 @@ bsp: xilinx_zynq_zc702 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: xilinx-zynq @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/xilinx-zynq/bspzc706.yml b/spec/build/bsps/arm/xilinx-zynq/bspzc706.yml index eca7aaf46c..2e188a51f5 100644 --- a/spec/build/bsps/arm/xilinx-zynq/bspzc706.yml +++ b/spec/build/bsps/arm/xilinx-zynq/bspzc706.yml @@ -4,7 +4,7 @@ bsp: xilinx_zynq_zc706 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: xilinx-zynq @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/xilinx-zynq/bspzedboard.yml b/spec/build/bsps/arm/xilinx-zynq/bspzedboard.yml index ba285c1b80..dae4f384db 100644 --- a/spec/build/bsps/arm/xilinx-zynq/bspzedboard.yml +++ b/spec/build/bsps/arm/xilinx-zynq/bspzedboard.yml @@ -4,7 +4,7 @@ bsp: xilinx_zynq_zedboard build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: xilinx-zynq @@ -12,8 +12,8 @@ includes: [] install: [] links: - role: build-dependency - uid: grp -- role: build-dependency uid: ../../opto2 +- role: build-dependency + uid: grp source: [] type: build diff --git a/spec/build/bsps/arm/xilinx-zynq/bspzybo.yml b/spec/build/bsps/arm/xilinx-zynq/bspzybo.yml new file mode 100644 index 0000000000..4c89826ca7 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynq/bspzybo.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: xilinx_zynq_zybo +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2023 B. Moessner +cppflags: [] +enabled-by: true +family: xilinx-zynq +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/arm/xilinx-zynq/bspzyboz7.yml b/spec/build/bsps/arm/xilinx-zynq/bspzyboz7.yml new file mode 100644 index 0000000000..591dab19e2 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynq/bspzyboz7.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: xilinx_zynq_zybo_z7 +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2023 B. Moessner +cppflags: [] +enabled-by: true +family: xilinx-zynq +includes: [] +install: [] +links: +- role: build-dependency + uid: ../../opto2 +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/arm/xilinx-zynq/grp.yml b/spec/build/bsps/arm/xilinx-zynq/grp.yml index 55eab20f84..529fdb320f 100644 --- a/spec/build/bsps/arm/xilinx-zynq/grp.yml +++ b/spec/build/bsps/arm/xilinx-zynq/grp.yml @@ -1,7 +1,10 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: group +cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG +cppflags: [] +cxxflags: [] enabled-by: true includes: [] install: [] @@ -32,8 +35,6 @@ links: - role: build-dependency uid: optconirq - role: build-dependency - uid: ../../optconminor -- role: build-dependency uid: optint0len - role: build-dependency uid: optint0ori @@ -62,6 +63,8 @@ links: - role: build-dependency uid: ../../objdevspixil - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: linkcmds - role: build-dependency uid: ../../bspopts diff --git a/spec/build/bsps/arm/xilinx-zynq/linkcmds.yml b/spec/build/bsps/arm/xilinx-zynq/linkcmds.yml index d7c0934f78..d6dbbe5a44 100644 --- a/spec/build/bsps/arm/xilinx-zynq/linkcmds.yml +++ b/spec/build/bsps/arm/xilinx-zynq/linkcmds.yml @@ -38,7 +38,7 @@ content: | INCLUDE linkcmds.armv4 copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG enabled-by: true install-path: ${BSP_LIBDIR} links: [] diff --git a/spec/build/bsps/arm/xilinx-zynq/obj.yml b/spec/build/bsps/arm/xilinx-zynq/obj.yml index f896b5a064..bc7259c10a 100644 --- a/spec/build/bsps/arm/xilinx-zynq/obj.yml +++ b/spec/build/bsps/arm/xilinx-zynq/obj.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: true @@ -11,13 +11,14 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/xilinx-zynq/include/bsp.h - - bsps/arm/xilinx-zynq/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - - bsps/include/dev/i2c/cadence-i2c-regs.h - - bsps/include/dev/i2c/cadence-i2c.h - bsps/arm/xilinx-zynq/include/bsp/i2c.h - bsps/arm/xilinx-zynq/include/bsp/irq.h +- destination: ${BSP_INCLUDEDIR}/dev/i2c + source: + - bsps/include/dev/i2c/cadence-i2c-regs.h + - bsps/include/dev/i2c/cadence-i2c.h links: [] source: - bsps/arm/shared/cache/cache-l2c-310.c @@ -25,22 +26,19 @@ source: - bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c - bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c - bsps/arm/shared/start/bsp-start-memcpy.S -- bsps/arm/xilinx-zynq/console/console-config.c - bsps/arm/xilinx-zynq/console/console-init.c -- bsps/arm/xilinx-zynq/console/debug-console.c - bsps/shared/dev/i2c/cadence-i2c.c - bsps/arm/xilinx-zynq/start/bspreset.c - bsps/arm/xilinx-zynq/start/bspstart.c - bsps/arm/xilinx-zynq/start/bspstarthooks.c - bsps/arm/xilinx-zynq/start/bspstartmmu.c -- bsps/shared/dev/btimer/btimer-stub.c +- bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c - bsps/shared/dev/irq/arm-gicv2.c - bsps/shared/dev/irq/arm-gicv2-get-attributes.c - bsps/shared/dev/serial/console-termios.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/xilinx-zynq/objsmp.yml b/spec/build/bsps/arm/xilinx-zynq/objsmp.yml index 587884f6a3..4aee7b0cf3 100644 --- a/spec/build/bsps/arm/xilinx-zynq/objsmp.yml +++ b/spec/build/bsps/arm/xilinx-zynq/objsmp.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: diff --git a/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml b/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml index 0b10b47bc2..efb883414c 100644 --- a/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml +++ b/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml @@ -4,17 +4,25 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 100000000 -default-by-variant: -- value: 333333333 - variants: - - arm/xilinx_zynq_zc702.* -- value: 666666667 - variants: - - arm/xilinx_zynq_zedboard.* +- Copyright (C) 2023 B. Moessner +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/xilinx_zynq_zc702 + - arm/xilinx_zynq_zc706 + - arm/xilinx_zynq_zedboard + - arm/xilinx_zynq_picozed + - arm/xilinx_zynq_zybo_z7 + - arm/xilinx_zynq_zybo_microzed + value: 333333333 +- enabled-by: + - arm/xilinx_zynq_zybo + - arm/xilinx_zynq_pynq + value: 325000000 +- enabled-by: true + value: 100000000 description: | - ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz + ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz. Set this to CPU Clock /2. enabled-by: true format: '{}' links: [] diff --git a/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml b/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml index 1664b0fc31..01b4959995 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: - - arm/.*qemu +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable data cache enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml b/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml index b191133af9..62607fb235 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: - - arm/.*qemu +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable instruction cache enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml b/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml index 1f93f52a8a..00d19bc4f1 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml @@ -4,15 +4,15 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 111111111 -default-by-variant: -- value: 111111111 - variants: - - arm/xilinx_zynq_zc702.* -- value: 111111111 - variants: - - arm/xilinx_zynq_zedboard.* +- Copyright (C) 2023 B. Moessner +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/xilinx_zynq_zybo + - arm/xilinx_zynq_pynq + value: 108333336 +- enabled-by: true + value: 111111111 description: | Zynq cpu_1x clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml b/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml index b800b20428..f0b83e1402 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/.*qemu +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: true +- enabled-by: true + value: false description: | This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml b/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml index 7d69273eb2..a8d44bc584 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml @@ -4,15 +4,15 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 50000000 -default-by-variant: -- value: 50000000 - variants: - - arm/xilinx_zynq_zc702.* -- value: 50000000 - variants: - - arm/xilinx_zynq_zedboard.* +- Copyright (C) 2023 B. Moessner +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/xilinx_zynq_zybo_z7 + - arm/xilinx_zynq_pynq + value: 100000000 +- enabled-by: true + value: 50000000 description: | Zynq UART clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optconirq.yml b/spec/build/bsps/arm/xilinx-zynq/optconirq.yml index ecb91d81a3..e9bc6bedc6 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optconirq.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optconirq.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | use interrupt driven mode for console devices (used by default) enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optint0len.yml b/spec/build/bsps/arm/xilinx-zynq/optint0len.yml index 90d77daeb7..6f3beb72d2 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optint0len.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optint0len.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 196608 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00030000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml b/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml index a8c4514fd9..3b59dd40f1 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00000000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynq/optint1len.yml b/spec/build/bsps/arm/xilinx-zynq/optint1len.yml index 32a2c8f3d6..cb26eb5705 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optint1len.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optint1len.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 65024 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x0000fe00 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml b/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml index f089c467c4..16d40bb49e 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 4294901760 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0xffff0000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml b/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml index 7a553ab9a2..ff5fb002e9 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1048576 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00100000 description: | length of nocache RAM region enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optramlen.yml b/spec/build/bsps/arm/xilinx-zynq/optramlen.yml index e51d3ebf38..94542aa809 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optramlen.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optramlen.yml @@ -6,21 +6,23 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 268435456 -default-by-variant: -- value: 268435456 - variants: - - arm/xilinx_zynq_a9_qemu -- value: 1073741824 - variants: +- Copyright (C) 2023 B. Moessner +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: - arm/xilinx_zynq_zc702 -- value: 1073741824 - variants: - arm/xilinx_zynq_zc706 -- value: 536870912 - variants: + - arm/xilinx_zynq_picozed + - arm/xilinx_zynq_zyno_z7 + - arm/xilinx_zynq_microzed + value: 0x40000000 +- enabled-by: - arm/xilinx_zynq_zedboard + - arm/xilinx_zynq_zybo + - arm/xilinx_zynq_pynq + value: 0x20000000 +- enabled-by: true + value: 0x10000000 description: | override a BSP's default RAM length enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynq/optramori.yml b/spec/build/bsps/arm/xilinx-zynq/optramori.yml index 5723b73d53..b4c7c5f82d 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optramori.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optramori.yml @@ -7,12 +7,12 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1048576 -default-by-variant: -- value: 4194304 - variants: - - arm/xilinx_zynq_zc706 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/xilinx_zynq_zc706 + value: 0x00400000 +- enabled-by: true + value: 0x00100000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml b/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml index efd1ea2b2a..206a6f2801 100644 --- a/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml +++ b/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml new file mode 100644 index 0000000000..06795eb416 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/abi.yml @@ -0,0 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-string: null +- split: null +- env-append: null +build-type: option +copyrights: +- Copyright (C) 2023 Reflex Aerospace GmbH +default: +- enabled-by: true + value: + - -march=armv7-r + - -mthumb + - -mfpu=vfpv3-d16 + - -mfloat-abi=hard +description: | + ABI flags +enabled-by: true +links: [] +name: ABI_FLAGS +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml new file mode 100644 index 0000000000..f6c228c79d --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/bspmercuryxu5.yml @@ -0,0 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: xilinx_zynqmp_mercuryxu5_rpu +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2023 Reflex Aerospace GmbH +cppflags: [] +enabled-by: true +family: xilinx-zynqmp-rpu +includes: [] +install: [] +links: +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/bsprpu.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/bsprpu.yml new file mode 100644 index 0000000000..d4073d8248 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/bsprpu.yml @@ -0,0 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +arch: arm +bsp: xilinx_zynqmp_rpu +build-type: bsp +cflags: [] +copyrights: +- Copyright (C) 2024 embedded brains GmbH +cppflags: [] +enabled-by: true +family: xilinx-zynqmp-rpu +includes: [] +install: [] +links: +- role: build-dependency + uid: grp +source: [] +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/grp.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/grp.yml new file mode 100644 index 0000000000..a088c69052 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/grp.yml @@ -0,0 +1,73 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: group +cflags: [] +copyrights: +- Copyright (C) 2023 Reflex Aerospace GmbH +cppflags: [] +cxxflags: [] +enabled-by: true +includes: +- bsps/include/xil +- bsps/include/xil/${XIL_SUPPORT_PATH} +install: [] +ldflags: [] +links: +- role: build-dependency + uid: ../grp +- role: build-dependency + uid: ../start +- role: build-dependency + uid: abi +- role: build-dependency + uid: optclkfastidle +- role: build-dependency + uid: optclkuart +- role: build-dependency + uid: optconirq +- role: build-dependency + uid: ../../optxilclockttcbaseaddr +- role: build-dependency + uid: ../../optxilclockttcirq +- role: build-dependency + uid: ../../optxilclockttcrefclk +- role: build-dependency + uid: optint0len +- role: build-dependency + uid: optint0ori +- role: build-dependency + uid: optint1len +- role: build-dependency + uid: optint1ori +- role: build-dependency + uid: optramlen +- role: build-dependency + uid: optramori +- role: build-dependency + uid: optresetvec +- role: build-dependency + uid: optnocachelen +- role: build-dependency + uid: obj +- role: build-dependency + uid: ../../obj +- role: build-dependency + uid: ../../objirq +- role: build-dependency + uid: ../../objdevserialzynq +- role: build-dependency + uid: ../../objdevspizynq +- role: build-dependency + uid: ../../objdevspixil +- role: build-dependency + uid: ../../objmem +- role: build-dependency + uid: ../../opto0 +- role: build-dependency + uid: linkcmds +- role: build-dependency + uid: ../../bspopts +- role: build-dependency + uid: ../../objxilinxsupport +type: build +use-after: [] +use-before: [] diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml new file mode 100644 index 0000000000..9c8a6d1cd6 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/linkcmds.yml @@ -0,0 +1,46 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: config-file +content: | + MEMORY { + RAM_INT_0 : ORIGIN = ${ZYNQMP_RPU_RAM_INT_0_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RPU_RAM_INT_0_LENGTH:#010x} + RAM_INT_1 : ORIGIN = ${ZYNQMP_RPU_RAM_INT_1_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RPU_RAM_INT_1_LENGTH:#010x} + RAM : ORIGIN = ${ZYNQMP_RPU_RAM_ORIGIN:#010x}, LENGTH = ${ZYNQMP_RPU_RAM_LENGTH:#010x} - ${ZYNQMP_RPU_RAM_ORIGIN:#010x} - ${ZYNQMP_RPU_RAM_NOCACHE_LENGTH:#010x} + NOCACHE : ORIGIN = ${ZYNQMP_RPU_RAM_LENGTH:#010x} - ${ZYNQMP_RPU_RAM_NOCACHE_LENGTH:#010x}, LENGTH = ${ZYNQMP_RPU_RAM_NOCACHE_LENGTH:#010x} + } + + REGION_ALIAS ("REGION_START", RAM_INT_0); + REGION_ALIAS ("REGION_VECTOR", RAM_INT_0); + REGION_ALIAS ("REGION_TEXT", RAM); + REGION_ALIAS ("REGION_TEXT_LOAD", RAM); + REGION_ALIAS ("REGION_RODATA", RAM); + REGION_ALIAS ("REGION_RODATA_LOAD", RAM); + REGION_ALIAS ("REGION_DATA", RAM); + REGION_ALIAS ("REGION_DATA_LOAD", RAM); + REGION_ALIAS ("REGION_FAST_TEXT", RAM); + REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM); + REGION_ALIAS ("REGION_FAST_DATA", RAM); + REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM); + REGION_ALIAS ("REGION_BSS", RAM); + REGION_ALIAS ("REGION_WORK", RAM); + REGION_ALIAS ("REGION_STACK", RAM); + REGION_ALIAS ("REGION_NOCACHE", NOCACHE); + REGION_ALIAS ("REGION_NOCACHE_LOAD", NOCACHE); + + bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024; + + bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M; + + bsp_vector_table_in_start_section = 1; + + INCLUDE linkcmds.armv4 + + # define symbols needed by the R5 xil_cache.c + _stack_end = bsp_section_stack_end; + __undef_stack = bsp_section_stack_begin; +copyrights: +- Copyright (C) 2023 Reflex Aerospace GmbH +enabled-by: true +install-path: ${BSP_LIBDIR} +links: [] +target: linkcmds +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/obj.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/obj.yml new file mode 100644 index 0000000000..4fb536c96a --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/obj.yml @@ -0,0 +1,42 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +build-type: objects +cflags: [] +copyrights: +- Copyright (C) 2023 Reflex Aerospace GmbH +cppflags: [] +cxxflags: [] +enabled-by: true +includes: [] +install: +- destination: ${BSP_INCLUDEDIR} + source: + - bsps/arm/xilinx-zynqmp-rpu/include/bsp.h +- destination: ${BSP_INCLUDEDIR}/bsp + source: + - bsps/arm/xilinx-zynqmp-rpu/include/bsp/irq.h +- destination: ${BSP_INCLUDEDIR}/peripheral_maps + source: + - bsps/include/peripheral_maps/xilinx_zynqmp.h +links: [] +source: +- bsps/shared/cache/nocache.c +- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c +- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c +- bsps/arm/shared/start/bsp-start-memcpy.S +- bsps/arm/xilinx-zynqmp-rpu/console/console-config.c +- bsps/arm/xilinx-zynqmp-rpu/start/bspreset.c +- bsps/arm/xilinx-zynqmp-rpu/start/bspstart.c +- bsps/arm/xilinx-zynqmp-rpu/start/bspstarthooks.c +- bsps/arm/xilinx-zynqmp-rpu/start/bspstartmpu.c +- bsps/shared/dev/clock/xil-ttc.c +- bsps/shared/dev/btimer/btimer-cpucounter.c +- bsps/shared/dev/getentropy/getentropy-cpucounter.c +- bsps/shared/dev/irq/arm-gicv2.c +- bsps/shared/dev/irq/arm-gicv2-zynqmp.c +- bsps/shared/dev/serial/console-termios.c +- bsps/shared/irq/irq-default-handler.c +- bsps/shared/start/bspfatal-default.c +- bsps/shared/start/gettargethash-default.c +- bsps/shared/start/sbrk.c +- bsps/shared/start/stackalloc.c +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optclkfastidle.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optclkfastidle.yml new file mode 100644 index 0000000000..f0b83e1402 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optclkfastidle.yml @@ -0,0 +1,21 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: true +- enabled-by: true + value: false +description: | + This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. +enabled-by: true +links: [] +name: CLOCK_DRIVER_USE_FAST_IDLE +type: build diff --git a/spec/build/bsps/arm/tms570/optcclk.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optclkuart.yml index 674ec1ac86..4ee4e63dbb 100644 --- a/spec/build/bsps/arm/tms570/optcclk.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optclkuart.yml @@ -4,13 +4,14 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 96000000 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 100000000 description: | - CPU clock in Hz + Zynq UART clock frequency in Hz enabled-by: true format: '{}' links: [] -name: TMS570_CCLK +name: ZYNQ_CLOCK_UART type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optconirq.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optconirq.yml new file mode 100644 index 0000000000..e9bc6bedc6 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optconirq.yml @@ -0,0 +1,16 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true +description: | + use interrupt driven mode for console devices (used by default) +enabled-by: true +links: [] +name: ZYNQ_CONSOLE_USE_INTERRUPTS +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optint0len.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optint0len.yml new file mode 100644 index 0000000000..0799dd6205 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optint0len.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00010000 +description: '' +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RPU_RAM_INT_0_LENGTH +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optint0ori.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optint0ori.yml new file mode 100644 index 0000000000..34c42efe17 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optint0ori.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00000000 +description: '' +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RPU_RAM_INT_0_ORIGIN +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optint1len.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optint1len.yml new file mode 100644 index 0000000000..667c38549e --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optint1len.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00010000 +description: '' +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RPU_RAM_INT_1_LENGTH +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optint1ori.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optint1ori.yml new file mode 100644 index 0000000000..0a1fd3e989 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optint1ori.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00020000 +description: '' +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RPU_RAM_INT_1_ORIGIN +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optnocachelen.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optnocachelen.yml new file mode 100644 index 0000000000..349190fe43 --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optnocachelen.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00100000 +description: | + length of nocache RAM region +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RPU_RAM_NOCACHE_LENGTH +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml new file mode 100644 index 0000000000..d684f5a06d --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optprocunitrpu.yml @@ -0,0 +1,17 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-boolean: null +- define-condition: null +build-type: option +copyrights: +- Copyright (C) 2023 Reflex Aerospace GmbH +default: +- enabled-by: true + value: true +description: | + Sets the target processing unit to the RPU (R5F) cores. +enabled-by: true +format: '{}' +links: [] +name: ZYNQMP_PROC_UNIT_RPU +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optramlen.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optramlen.yml new file mode 100644 index 0000000000..b7d84b933e --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optramlen.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x10000000 +description: | + override a BSP's default RAM length +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RPU_RAM_LENGTH +type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp-rpu/optramori.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optramori.yml new file mode 100644 index 0000000000..d5b163781a --- /dev/null +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optramori.yml @@ -0,0 +1,18 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- assert-uint32: null +- env-assign: null +- format-and-define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00100000 +description: '' +enabled-by: true +format: '{:#010x}' +links: [] +name: ZYNQMP_RPU_RAM_ORIGIN +type: build diff --git a/spec/build/bsps/arm/tms570/opttms570ls3137.yml b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optresetvec.yml index 344f209ca1..206a6f2801 100644 --- a/spec/build/bsps/arm/tms570/opttms570ls3137.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp-rpu/optresetvec.yml @@ -4,12 +4,13 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | - target used for identify TMS570LS3137 board + reset vector address for BSP start enabled-by: true links: [] -name: ARM_TMS570LS3137 +name: BSP_START_RESET_VECTOR type: build diff --git a/spec/build/bsps/arm/xilinx-zynqmp/abi.yml b/spec/build/bsps/arm/xilinx-zynqmp/abi.yml index 23c66bb5b8..3945b46365 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/abi.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/abi.yml @@ -5,14 +5,15 @@ actions: - env-append: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG default: -- -march=armv7-a -- -mthumb -- -mfpu=neon -- -mfloat-abi=hard -- -mtune=cortex-a53 -default-by-variant: [] +- enabled-by: true + value: + - -march=armv7-a + - -mthumb + - -mfpu=neon + - -mfloat-abi=hard + - -mtune=cortex-a53 description: | ABI flags enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml b/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml index 0d336cc6cf..d947123247 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/bspxilinxzynqmp.yml @@ -4,7 +4,7 @@ bsp: xilinx_zynqmp_ultra96 build-type: bsp cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] enabled-by: true family: xilinx-zynqmp @@ -13,7 +13,6 @@ install: - destination: ${BSP_INCLUDEDIR} source: - bsps/arm/xilinx-zynqmp/include/bsp.h - - bsps/arm/xilinx-zynqmp/include/tm27.h - destination: ${BSP_INCLUDEDIR}/bsp source: - bsps/arm/xilinx-zynqmp/include/bsp/irq.h @@ -44,8 +43,6 @@ links: - role: build-dependency uid: optconirq - role: build-dependency - uid: ../../optconminor -- role: build-dependency uid: optint0len - role: build-dependency uid: optint0ori @@ -74,6 +71,8 @@ links: - role: build-dependency uid: ../../objdevspixil - role: build-dependency + uid: ../../objmem +- role: build-dependency uid: ../../opto2 - role: build-dependency uid: linkcmds @@ -81,16 +80,18 @@ links: uid: ../../bspopts source: - bsps/arm/shared/cache/cache-cp15.c +- bsps/arm/shared/cache/cache-v7ar-disable-data.S - bsps/arm/shared/clock/arm-generic-timer-aarch32.c - bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c - bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c - bsps/arm/shared/start/bsp-start-memcpy.S +- bsps/arm/shared/start/bspstarthook0-empty.c - bsps/arm/xilinx-zynqmp/console/console-config.c - bsps/arm/xilinx-zynqmp/start/bspreset.c - bsps/arm/xilinx-zynqmp/start/bspstart.c - bsps/arm/xilinx-zynqmp/start/bspstarthooks.c - bsps/arm/xilinx-zynqmp/start/bspstartmmu.c -- bsps/shared/dev/btimer/btimer-stub.c +- bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/clock/arm-generic-timer.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c - bsps/shared/dev/irq/arm-gicv2.c @@ -98,7 +99,6 @@ source: - bsps/shared/dev/serial/console-termios.c - bsps/shared/irq/irq-default-handler.c - bsps/shared/start/bspfatal-default.c -- bsps/shared/start/bspgetworkarea-default.c - bsps/shared/start/gettargethash-default.c - bsps/shared/start/sbrk.c - bsps/shared/start/stackalloc.c diff --git a/spec/build/bsps/arm/xilinx-zynqmp/linkcmds.yml b/spec/build/bsps/arm/xilinx-zynqmp/linkcmds.yml index 77bd5fb763..f23369b1de 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/linkcmds.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/linkcmds.yml @@ -38,7 +38,7 @@ content: | INCLUDE linkcmds.armv4 copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG enabled-by: true install-path: ${BSP_LIBDIR} links: [] diff --git a/spec/build/bsps/arm/xilinx-zynqmp/objsmp.yml b/spec/build/bsps/arm/xilinx-zynqmp/objsmp.yml index e8b954b5cb..8ae414e9b6 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/objsmp.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/objsmp.yml @@ -2,7 +2,7 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause build-type: objects cflags: [] copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +- Copyright (C) 2020 embedded brains GmbH & Co. KG cppflags: [] cxxflags: [] enabled-by: diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml b/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml index 1664b0fc31..01b4959995 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: - - arm/.*qemu +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable data cache enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml b/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml index b191133af9..62607fb235 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: -- value: false - variants: - - arm/.*qemu +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: false +- enabled-by: true + value: true description: | enable instruction cache enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml b/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml index b800b20428..f0b83e1402 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml @@ -4,12 +4,15 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: -- value: true - variants: - - arm/.*qemu +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: + - arm/lm3s6965_qemu + - arm/realview_pbx_a9_qemu + - arm/xilinx_zynq_a9_qemu + value: true +- enabled-by: true + value: false description: | This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing. This can significantly reduce simulation times. enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml b/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml index a2def36606..4ee4e63dbb 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml @@ -4,12 +4,10 @@ actions: - define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 100000000 -default-by-variant: -- value: 100000000 - variants: - - arm/xilinx_zynqmp_ultra96.* +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 100000000 description: | Zynq UART clock frequency in Hz enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml b/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml index ecb91d81a3..e9bc6bedc6 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optconirq.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: true -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: true description: | use interrupt driven mode for console devices (used by default) enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml index 55b3487553..dacb8d2541 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optint0len.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 196608 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00030000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint0ori.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint0ori.yml index f6a8b5f7d4..8f83ceeb07 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optint0ori.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optint0ori.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 0 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00000000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint1len.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint1len.yml index bdaef49951..6d0576bb24 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optint1len.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optint1len.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 65024 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x0000fe00 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optint1ori.yml b/spec/build/bsps/arm/xilinx-zynqmp/optint1ori.yml index 55caa6f4a2..04c44dedff 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optint1ori.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optint1ori.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 4294901760 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0xffff0000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optnocachelen.yml b/spec/build/bsps/arm/xilinx-zynqmp/optnocachelen.yml index 4b9118d926..b82dfa7410 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optnocachelen.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optnocachelen.yml @@ -6,9 +6,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1048576 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00100000 description: | length of nocache RAM region enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optramlen.yml b/spec/build/bsps/arm/xilinx-zynqmp/optramlen.yml index 6efaf7b13b..1cdb31d4d7 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optramlen.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optramlen.yml @@ -6,12 +6,12 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 268435456 -default-by-variant: -- value: 2147483648 - variants: - - arm/xilinx_zynqmp_ultra96 +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: arm/xilinx_zynqmp_ultra96 + value: 0x80000000 +- enabled-by: true + value: 0x10000000 description: | override a BSP's default RAM length enabled-by: true diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optramori.yml b/spec/build/bsps/arm/xilinx-zynqmp/optramori.yml index 401b8ec3a3..082be7e826 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optramori.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optramori.yml @@ -7,9 +7,10 @@ actions: - format-and-define: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: 1048576 -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: 0x00100000 description: '' enabled-by: true format: '{:#010x}' diff --git a/spec/build/bsps/arm/xilinx-zynqmp/optresetvec.yml b/spec/build/bsps/arm/xilinx-zynqmp/optresetvec.yml index efd1ea2b2a..206a6f2801 100644 --- a/spec/build/bsps/arm/xilinx-zynqmp/optresetvec.yml +++ b/spec/build/bsps/arm/xilinx-zynqmp/optresetvec.yml @@ -4,9 +4,10 @@ actions: - define-condition: null build-type: option copyrights: -- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) -default: false -default-by-variant: [] +- Copyright (C) 2020 embedded brains GmbH & Co. KG +default: +- enabled-by: true + value: false description: | reset vector address for BSP start enabled-by: true |