16 files changed, 68 insertions, 73 deletions
diff --git a/spec/build/bsps/arm/xilinx-zynq/abi.yml b/spec/build/bsps/arm/xilinx-zynq/abi.yml
index a3a710c97d..d3161d624d 100644
--- a/spec/build/bsps/arm/xilinx-zynq/abi.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/abi.yml
@@ -7,12 +7,13 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default:
-- -march=armv7-a
-- -mthumb
-- -mfpu=neon
-- -mfloat-abi=hard
-- -mtune=cortex-a9
-default-by-variant: []
+- enabled-by: true
+  value:
+  - -march=armv7-a
+  - -mthumb
+  - -mfpu=neon
+  - -mfloat-abi=hard
+  - -mtune=cortex-a9
 description: |
   ABI flags
 enabled-by: true
diff --git a/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml b/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml
index 39cb972a74..d74103c349 100644
--- a/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml
@@ -5,14 +5,13 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 100000000
-default-by-variant:
-- value: 333333333
-  variants:
-  - arm/xilinx_zynq_zc702
-- value: 666666667
-  variants:
-  - arm/xilinx_zynq_zedboard
+default:
+- enabled-by: arm/xilinx_zynq_zc702
+  value: 333333333
+- enabled-by: arm/xilinx_zynq_zedboard
+  value: 666666667
+- enabled-by: true
+  value: 100000000
 description: |
   ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz
 enabled-by: true
diff --git a/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml b/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml
index 23b1410385..c86800df35 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optcachedata.yml
@@ -5,13 +5,14 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant:
-- value: false
-  variants:
+default:
+- enabled-by:
   - arm/lm3s6965_qemu
   - arm/realview_pbx_a9_qemu
   - arm/xilinx_zynq_a9_qemu
+  value: false
+- enabled-by: true
+  value: true
 description: |
   enable data cache
 enabled-by: true
diff --git a/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml b/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml
index f172cc4b58..90e0e1301a 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml
@@ -5,13 +5,14 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant:
-- value: false
-  variants:
+default:
+- enabled-by:
   - arm/lm3s6965_qemu
   - arm/realview_pbx_a9_qemu
   - arm/xilinx_zynq_a9_qemu
+  value: false
+- enabled-by: true
+  value: true
 description: |
   enable instruction cache
 enabled-by: true
diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml b/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml
index 57b7187cdf..5525a0a7b4 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml
@@ -5,14 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 111111111
-default-by-variant:
-- value: 111111111
-  variants:
-  - arm/xilinx_zynq_zc702
-- value: 111111111
-  variants:
-  - arm/xilinx_zynq_zedboard
+default:
+- enabled-by: true
+  value: 111111111
 description: |
   Zynq cpu_1x clock frequency in Hz
 enabled-by: true
diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml b/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml
index 61333a11f1..e303a8bf9f 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml
@@ -5,13 +5,14 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant:
-- value: true
-  variants:
+default:
+- enabled-by:
   - arm/lm3s6965_qemu
   - arm/realview_pbx_a9_qemu
   - arm/xilinx_zynq_a9_qemu
+  value: true
+- enabled-by: true
+  value: false
 description: |
   This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing.  This can significantly reduce simulation times.
 enabled-by: true
diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml b/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml
index 56a6056687..49a7216dd9 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml
@@ -5,14 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 50000000
-default-by-variant:
-- value: 50000000
-  variants:
-  - arm/xilinx_zynq_zc702
-- value: 50000000
-  variants:
-  - arm/xilinx_zynq_zedboard
+default:
+- enabled-by: true
+  value: 50000000
 description: |
   Zynq UART clock frequency in Hz
 enabled-by: true
diff --git a/spec/build/bsps/arm/xilinx-zynq/optconirq.yml b/spec/build/bsps/arm/xilinx-zynq/optconirq.yml
index ecb91d81a3..ea13fa4561 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optconirq.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optconirq.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: true
-default-by-variant: []
+default:
+- enabled-by: true
+  value: true
 description: |
   use interrupt driven mode for console devices (used by default)
 enabled-by: true
diff --git a/spec/build/bsps/arm/xilinx-zynq/optint0len.yml b/spec/build/bsps/arm/xilinx-zynq/optint0len.yml
index 9d793e561b..7da268ffca 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optint0len.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optint0len.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x00030000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00030000
 description: ''
 enabled-by: true
 format: '{:#010x}'
diff --git a/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml b/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml
index f23ab23bb9..a1098fc60f 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optint0ori.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x00000000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00000000
 description: ''
 enabled-by: true
 format: '{:#010x}'
diff --git a/spec/build/bsps/arm/xilinx-zynq/optint1len.yml b/spec/build/bsps/arm/xilinx-zynq/optint1len.yml
index 776834ac49..889fc50877 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optint1len.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optint1len.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x0000fe00
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x0000fe00
 description: ''
 enabled-by: true
 format: '{:#010x}'
diff --git a/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml b/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml
index 21bba0d6bf..857537fce4 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optint1ori.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0xffff0000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0xffff0000
 description: ''
 enabled-by: true
 format: '{:#010x}'
diff --git a/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml b/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml
index c9b0e27275..fe201cf7a0 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optnocachelen.yml
@@ -7,8 +7,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x00100000
-default-by-variant: []
+default:
+- enabled-by: true
+  value: 0x00100000
 description: |
   length of nocache RAM region
 enabled-by: true
diff --git a/spec/build/bsps/arm/xilinx-zynq/optramlen.yml b/spec/build/bsps/arm/xilinx-zynq/optramlen.yml
index be26a59cd3..1593cc786e 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optramlen.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optramlen.yml
@@ -7,20 +7,15 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x10000000
-default-by-variant:
-- value: 0x10000000
-  variants:
-  - arm/xilinx_zynq_a9_qemu
-- value: 0x40000000
-  variants:
+default:
+- enabled-by:
   - arm/xilinx_zynq_zc702
-- value: 0x40000000
-  variants:
   - arm/xilinx_zynq_zc706
-- value: 0x20000000
-  variants:
-  - arm/xilinx_zynq_zedboard
+  value: 0x40000000
+- enabled-by: arm/xilinx_zynq_zedboard
+  value: 0x20000000
+- enabled-by: true
+  value: 0x10000000
 description: |
   override a BSP's default RAM length
 enabled-by: true
diff --git a/spec/build/bsps/arm/xilinx-zynq/optramori.yml b/spec/build/bsps/arm/xilinx-zynq/optramori.yml
index b48fe23d60..9730ed590f 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optramori.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optramori.yml
@@ -8,11 +8,11 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 0x00100000
-default-by-variant:
-- value: 0x00400000
-  variants:
-  - arm/xilinx_zynq_zc706
+default:
+- enabled-by: arm/xilinx_zynq_zc706
+  value: 0x00400000
+- enabled-by: true
+  value: 0x00100000
 description: ''
 enabled-by: true
 format: '{:#010x}'
diff --git a/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml b/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml
index efd1ea2b2a..bac5c79627 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optresetvec.yml
@@ -5,8 +5,9 @@ actions:
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: false
-default-by-variant: []
+default:
+- enabled-by: true
+  value: false
 description: |
   reset vector address for BSP start
 enabled-by: true