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-rw-r--r--spec/build/bsps/arm/xilinx-zynq/optclkuart.yml19
1 files changed, 9 insertions, 10 deletions
diff --git a/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml b/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml
index 89874793d1..a8d44bc584 100644
--- a/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/optclkuart.yml
@@ -4,16 +4,15 @@ actions:
- define: null
build-type: option
copyrights:
-- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
-default: 50000000
-default-by-family: []
-default-by-variant:
-- value: 50000000
- variants:
- - arm/xilinx_zynq_zc702.*
-- value: 50000000
- variants:
- - arm/xilinx_zynq_zedboard.*
+- Copyright (C) 2023 B. Moessner
+- Copyright (C) 2020 embedded brains GmbH & Co. KG
+default:
+- enabled-by:
+ - arm/xilinx_zynq_zybo_z7
+ - arm/xilinx_zynq_pynq
+ value: 100000000
+- enabled-by: true
+ value: 50000000
description: |
Zynq UART clock frequency in Hz
enabled-by: true