15 files changed, 15 insertions, 0 deletions
diff --git a/spec/build/bsps/arm/atsam/abi.yml b/spec/build/bsps/arm/atsam/abi.yml
index 7a95742c36..82ab336152 100644
--- a/spec/build/bsps/arm/atsam/abi.yml
+++ b/spec/build/bsps/arm/atsam/abi.yml
@@ -11,6 +11,7 @@ default:
 - -mcpu=cortex-m7
 - -mfpu=fpv5-d16
 - -mfloat-abi=hard
+default-by-family: []
 default-by-variant: []
 description: |
   ABI flags
diff --git a/spec/build/bsps/arm/atsam/optchgclksram.yml b/spec/build/bsps/arm/atsam/optchgclksram.yml
index 58dca377d7..6875941849 100644
--- a/spec/build/bsps/arm/atsam/optchgclksram.yml
+++ b/spec/build/bsps/arm/atsam/optchgclksram.yml
@@ -6,6 +6,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
+default-by-family: []
 default-by-variant: []
 description: |
   Move the functions that set up the clock into the SRAM.  This allows to change the clock frequency even if the application is started from SDRAM.  Requires a TCM_SIZE > 0.
diff --git a/spec/build/bsps/arm/atsam/optchip.yml b/spec/build/bsps/arm/atsam/optchip.yml
index 16998e6c2a..baf74e3577 100644
--- a/spec/build/bsps/arm/atsam/optchip.yml
+++ b/spec/build/bsps/arm/atsam/optchip.yml
@@ -44,6 +44,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: samv71q21
+default-by-family: []
 default-by-variant: []
 description: |
   Chip variant
diff --git a/spec/build/bsps/arm/atsam/optconbaud.yml b/spec/build/bsps/arm/atsam/optconbaud.yml
index b0e34e7505..de59323904 100644
--- a/spec/build/bsps/arm/atsam/optconbaud.yml
+++ b/spec/build/bsps/arm/atsam/optconbaud.yml
@@ -6,6 +6,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 115200
+default-by-family: []
 default-by-variant: []
 description: |
   initial baud for console devices (default 115200)
diff --git a/spec/build/bsps/arm/atsam/optconidx.yml b/spec/build/bsps/arm/atsam/optconidx.yml
index 42fb3b142a..d40cae546d 100644
--- a/spec/build/bsps/arm/atsam/optconidx.yml
+++ b/spec/build/bsps/arm/atsam/optconidx.yml
@@ -6,6 +6,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
+default-by-family: []
 default-by-variant: []
 description: |
   device index for /dev/console (default 1, e.g. USART1)
diff --git a/spec/build/bsps/arm/atsam/optconirq.yml b/spec/build/bsps/arm/atsam/optconirq.yml
index a410e05060..8dcb1a0ca3 100644
--- a/spec/build/bsps/arm/atsam/optconirq.yml
+++ b/spec/build/bsps/arm/atsam/optconirq.yml
@@ -6,6 +6,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
+default-by-family: []
 default-by-variant: []
 description: |
   use interrupt driven mode for console devices (used by default)
diff --git a/spec/build/bsps/arm/atsam/optcontype.yml b/spec/build/bsps/arm/atsam/optcontype.yml
index eddbee1063..1b50fd6056 100644
--- a/spec/build/bsps/arm/atsam/optcontype.yml
+++ b/spec/build/bsps/arm/atsam/optcontype.yml
@@ -6,6 +6,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: false
+default-by-family: []
 default-by-variant: []
 description: |
   device type for /dev/console, use 0 for USART and 1 for UART (default USART)
diff --git a/spec/build/bsps/arm/atsam/optmck.yml b/spec/build/bsps/arm/atsam/optmck.yml
index d216542285..1f4c920cf2 100644
--- a/spec/build/bsps/arm/atsam/optmck.yml
+++ b/spec/build/bsps/arm/atsam/optmck.yml
@@ -6,6 +6,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 123000000
+default-by-family: []
 default-by-variant: []
 description: |
   Frequency of the MCK in Hz. Set to 0 to force application defined speed.  See start/pmc-config.c for available clock configurations.
diff --git a/spec/build/bsps/arm/atsam/optnocachesz.yml b/spec/build/bsps/arm/atsam/optnocachesz.yml
index 433633d3b0..f9bb25db71 100644
--- a/spec/build/bsps/arm/atsam/optnocachesz.yml
+++ b/spec/build/bsps/arm/atsam/optnocachesz.yml
@@ -7,6 +7,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 4096
+default-by-family: []
 default-by-variant: []
 description: |
   size of NOCACHE section in bytes
diff --git a/spec/build/bsps/arm/atsam/optoscmain.yml b/spec/build/bsps/arm/atsam/optoscmain.yml
index 4cafffea37..4fb3a7ebf6 100644
--- a/spec/build/bsps/arm/atsam/optoscmain.yml
+++ b/spec/build/bsps/arm/atsam/optoscmain.yml
@@ -6,6 +6,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 12000000
+default-by-family: []
 default-by-variant: []
 description: |
   Main oscillator frequency in Hz (default 12MHz)
diff --git a/spec/build/bsps/arm/atsam/optqspiflashsz.yml b/spec/build/bsps/arm/atsam/optqspiflashsz.yml
index a9a71b049f..62ebd78241 100644
--- a/spec/build/bsps/arm/atsam/optqspiflashsz.yml
+++ b/spec/build/bsps/arm/atsam/optqspiflashsz.yml
@@ -7,6 +7,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 2097152
+default-by-family: []
 default-by-variant: []
 description: |
   size of QSPI flash in bytes
diff --git a/spec/build/bsps/arm/atsam/optsdram.yml b/spec/build/bsps/arm/atsam/optsdram.yml
index c07edd9ba5..6cd29f0700 100644
--- a/spec/build/bsps/arm/atsam/optsdram.yml
+++ b/spec/build/bsps/arm/atsam/optsdram.yml
@@ -19,6 +19,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: is42s16100e-7bli
+default-by-family: []
 default-by-variant: []
 description: |
   SDRAM variant
diff --git a/spec/build/bsps/arm/atsam/opttcmsz.yml b/spec/build/bsps/arm/atsam/opttcmsz.yml
index 7e8b1121e8..33ac8ad1bd 100644
--- a/spec/build/bsps/arm/atsam/opttcmsz.yml
+++ b/spec/build/bsps/arm/atsam/opttcmsz.yml
@@ -7,6 +7,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: 0
+default-by-family: []
 default-by-variant: []
 description: |
   size of tightly coupled memories (TCM) in bytes
diff --git a/spec/build/bsps/arm/atsam/optusextal.yml b/spec/build/bsps/arm/atsam/optusextal.yml
index 6353956d15..1537d6f16d 100644
--- a/spec/build/bsps/arm/atsam/optusextal.yml
+++ b/spec/build/bsps/arm/atsam/optusextal.yml
@@ -6,6 +6,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: true
+default-by-family: []
 default-by-variant: []
 description: |
   Use the external crystal as source for the slow clock instead of the internal RC oscillator. Note that on the ATSAM the NRST pin seems to depend on the slow clock as well as all watchdogs. If ATSAM_SLOWCLOCK_USE_XTAL is set to 1 without a external crystal connected, the controller might hang in the switching process without a working NRST pin.
diff --git a/spec/build/bsps/arm/atsam/tstatsamv.yml b/spec/build/bsps/arm/atsam/tstatsamv.yml
index 41d28657e9..442a5be12e 100644
--- a/spec/build/bsps/arm/atsam/tstatsamv.yml
+++ b/spec/build/bsps/arm/atsam/tstatsamv.yml
@@ -28,6 +28,7 @@ build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 default: null
+default-by-family: []
 default-by-variant: []
 description: ''
 enabled-by: true