diff options
Diffstat (limited to 'cpukit/score')
78 files changed, 659 insertions, 1686 deletions
diff --git a/cpukit/score/cpu/aarch64/aarch64-exception-frame-print.c b/cpukit/score/cpu/aarch64/aarch64-exception-frame-print.c index c5b477c72f..04a3dfdc0d 100644 --- a/cpukit/score/cpu/aarch64/aarch64-exception-frame-print.c +++ b/cpukit/score/cpu/aarch64/aarch64-exception-frame-print.c @@ -45,7 +45,7 @@ #include <inttypes.h> #include <rtems/score/cpu.h> -#include <rtems/score/io.h> +#include <rtems/dev/io.h> #include <rtems/bspIo.h> typedef struct { diff --git a/cpukit/score/cpu/aarch64/include/libcpu/mmu-vmsav8-64.h b/cpukit/score/cpu/aarch64/include/libcpu/mmu-vmsav8-64.h index 0d65004f88..ca9b60e6d1 100644 --- a/cpukit/score/cpu/aarch64/include/libcpu/mmu-vmsav8-64.h +++ b/cpukit/score/cpu/aarch64/include/libcpu/mmu-vmsav8-64.h @@ -70,7 +70,7 @@ extern "C" { #define AARCH64_MMU_CODE_RW_CACHED AARCH64_MMU_DATA_RW_CACHED #define AARCH64_MMU_DATA_RO \ - ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 1 ) | MMU_DESC_WRITE_DISABLE ) + ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 2 ) | MMU_DESC_WRITE_DISABLE ) #define AARCH64_MMU_CODE AARCH64_MMU_DATA_RO #define AARCH64_MMU_CODE_RW AARCH64_MMU_DATA_RW @@ -78,7 +78,7 @@ extern "C" { #define AARCH64_MMU_DATA_RW_CACHED \ ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 3 ) ) #define AARCH64_MMU_DATA_RW \ - ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 1 ) ) + ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 2 ) ) #define AARCH64_MMU_DEVICE ( AARCH64_MMU_FLAGS_BASE | MMU_DESC_MAIR_ATTR( 0 ) ) rtems_status_code aarch64_mmu_map( diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/aarch64/include/rtems/score/cpuatomic.h deleted file mode 100644 index ed8091d73c..0000000000 --- a/cpukit/score/cpu/aarch64/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,42 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * @file - * - * @ingroup RTEMSScoreCPU - * - * @brief AArch64 Atomics support - */ - -/* - * Copyright (C) 2020 On-Line Applications Research Corporation (OAR) - * Written by Kinsey Moore <kinsey.moore@oarcorp.com> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h index b520e8bffb..8a0e476899 100644 --- a/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h @@ -174,6 +174,13 @@ static inline void _CPU_Use_thread_local_storage( ); } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + return (void *)(uintptr_t) context->thread_id; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/arm/__tls_get_addr.c b/cpukit/score/cpu/arm/__tls_get_addr.c index 7ef42fdcb4..407bf3d639 100644 --- a/cpukit/score/cpu/arm/__tls_get_addr.c +++ b/cpukit/score/cpu/arm/__tls_get_addr.c @@ -48,7 +48,7 @@ void *__tls_get_addr(const TLS_Index *ti) { const Thread_Control *executing = _Thread_Get_executing(); void *tls_data = (char *) executing->Registers.thread_id - + _TLS_Get_thread_control_block_area_size(); + + _TLS_Get_thread_control_block_area_size( &_TLS_Configuration ); assert(ti->module == 1); diff --git a/cpukit/score/cpu/arm/arm-exception-frame-print.c b/cpukit/score/cpu/arm/arm-exception-frame-print.c index 7bc6795ea5..b089648184 100644 --- a/cpukit/score/cpu/arm/arm-exception-frame-print.c +++ b/cpukit/score/cpu/arm/arm-exception-frame-print.c @@ -41,11 +41,14 @@ #include <inttypes.h> #include <rtems/score/cpu.h> +#if defined(ARM_MULTILIB_ARCH_V7M) +#include <rtems/score/armv7m.h> +#endif #include <rtems/bspIo.h> static void _ARM_VFP_context_print( const ARM_VFP_context *vfp_context ) { -#ifdef ARM_MULTILIB_VFP_D32 +#ifdef ARM_MULTILIB_VFP if ( vfp_context != NULL ) { const uint64_t *dx = &vfp_context->register_d0; int i; @@ -56,7 +59,14 @@ static void _ARM_VFP_context_print( const ARM_VFP_context *vfp_context ) vfp_context->register_fpscr ); - for ( i = 0; i < 32; ++i ) { +#if defined(ARM_MULTILIB_VFP_D32) + int regcount = 32; +#elif defined(ARM_MULTILIB_VFP_D16) + int regcount = 16; +#else + int regcount = 0; +#endif + for ( i = 0; i < regcount; ++i ) { uint32_t low = (uint32_t) dx[i]; uint32_t high = (uint32_t) (dx[i] >> 32); @@ -66,6 +76,136 @@ static void _ARM_VFP_context_print( const ARM_VFP_context *vfp_context ) #endif } +static void _ARM_Cortex_M_fault_info_print( void ) +{ +#if defined(ARM_MULTILIB_ARCH_V7M) + /* + * prints content of additional debugging registers + * available on Cortex-Mx where x > 0 cores. + */ + uint32_t cfsr = _ARMV7M_SCB->cfsr; + uint8_t mmfsr = ARMV7M_SCB_CFSR_MMFSR_GET( cfsr ); + uint8_t bfsr = ( ARMV7M_SCB_CFSR_BFSR_GET( cfsr ) >> 8 ); + uint16_t ufsr = ( ARMV7M_SCB_CFSR_UFSR_GET( cfsr ) >> 16 ); + uint32_t hfsr = _ARMV7M_SCB->hfsr; + if ( mmfsr > 0 ) { + printk( "MMFSR= 0x%08" PRIx32 " (memory fault)\n", mmfsr ); + if ( ( mmfsr & 0x1 ) != 0 ) { + printk( " IACCVIOL : 1 (instruction access violation)\n" ); + } + if ( ( mmfsr & 0x2 ) != 0 ) { + printk( " DACCVIOL : 1 (data access violation)\n" ); + } + if ( (mmfsr & 0x8 ) != 0 ) { + printk( + " MUNSTKERR : 1 (fault on unstacking on exception return)\n" + ); + } + if ( ( mmfsr & 0x10 ) != 0 ) { + printk( " MSTKERR : 1 (fault on stacking on exception entry)\n" ); + } + if ( (mmfsr & 0x20 ) != 0 ) { + printk( " MLSPERR : 1 (fault during lazy FP stack preservation)\n" ); + } + if ( (mmfsr & 0x80 ) != 0 ) { + printk( + " MMFARVALID : 1 -> 0x%08" PRIx32 " (error address)\n", + _ARMV7M_SCB->mmfar + ); + } + else { + printk( " MMFARVALID : 0 (undetermined error address)\n" ); + } + } + if ( bfsr > 0 ) { + printk( "BFSR = 0x%08" PRIx32 " (bus fault)\n", bfsr ); + if ( ( bfsr & 0x1 ) != 0 ) { + printk( " IBUSERR : 1 (instruction fetch error)\n" ); + } + if ( (bfsr & 0x2 ) != 0 ) { + printk( + " PRECISERR : 1 (data bus error with known exact location)\n" + ); + } + if ( ( bfsr & 0x4) != 0 ) { + printk( + " IMPRECISERR: 1 (data bus error without known exact location)\n" + ); + } + if ( (bfsr & 0x8 ) != 0 ) { + printk( + " UNSTKERR : 1 (fault on unstacking on exception return)\n" + ); + } + if ( ( bfsr & 0x10 ) != 0 ) { + printk( " STKERR : 1 (fault on stacking on exception entry)\n" ); + } + if ( ( bfsr & 0x20 ) != 0 ) { + printk( " LSPERR : 1 (fault during lazy FP stack preservation)\n" ); + } + if ( (bfsr & 0x80 ) != 0 ) { + printk( + " BFARVALID : 1 -> 0x%08" PRIx32 " (error address)\n", + _ARMV7M_SCB->bfar + ); + } + else { + printk( " BFARVALID : 0 (undetermined error address)\n" ); + } + } + if ( ufsr > 0 ) { + printk( "UFSR = 0x%08" PRIx32 " (usage fault)\n", ufsr); + if ( (ufsr & 0x1 ) != 0 ) { + printk( " UNDEFINSTR : 1 (undefined instruction issued)\n"); + } + if ( (ufsr & 0x2 ) != 0 ) { + printk( + " INVSTATE : 1" + " (invalid instruction state" + " (Thumb not set in EPSR or invalid IT state in EPSR))\n" + ); + } + if ( (ufsr & 0x4 ) != 0 ) { + printk( " INVPC : 1 (integrity check failure on EXC_RETURN)\n" ); + } + if ( (ufsr & 0x8 ) != 0 ) { + printk( + " NOCP : 1" + " (coprocessor instruction issued" + " but coprocessor disabled or non existent)\n" + ); + } + if ( ( ufsr & 0x100) != 0 ) { + printk( " UNALIGNED : 1 (unaligned access operation occurred)\n" ); + } + if ( ( ufsr & 0x200) != 0 ) { + printk( " DIVBYZERO : 1 (division by zero)" ); + } + } + if ( (hfsr & ( + ARMV7M_SCB_HFSR_VECTTBL_MASK + | ARMV7M_SCB_HFSR_DEBUGEVT_MASK + | ARMV7M_SCB_HFSR_FORCED_MASK + ) ) != 0 ) { + printk( "HFSR = 0x%08" PRIx32 " (hard fault)\n", hfsr ); + if ( (hfsr & ARMV7M_SCB_HFSR_VECTTBL_MASK ) != 0 ) { + printk( + " VECTTBL : 1 (error in address located in vector table)\n" + ); + } + if ( (hfsr & ARMV7M_SCB_HFSR_FORCED_MASK ) != 0 ) { + printk( + " FORCED : 1 (configurable fault escalated to hard fault)\n" + ); + } + if ( (hfsr & ARMV7M_SCB_HFSR_DEBUGEVT_MASK ) != 0 ) { + printk( + " DEBUGEVT : 1 (debug event occurred with debug system disabled)\n" + ); + } + } +#endif +} void _CPU_Exception_frame_print( const CPU_Exception_frame *frame ) { printk( @@ -109,4 +249,5 @@ void _CPU_Exception_frame_print( const CPU_Exception_frame *frame ) ); _ARM_VFP_context_print( frame->vfp_context ); + _ARM_Cortex_M_fault_info_print(); } diff --git a/cpukit/score/src/ioprintf.c b/cpukit/score/cpu/arm/armv4-isr-install-vector.c index 8ae4213ab1..739b02f8bf 100644 --- a/cpukit/score/src/ioprintf.c +++ b/cpukit/score/cpu/arm/armv4-isr-install-vector.c @@ -3,14 +3,19 @@ /** * @file * - * @ingroup RTEMSScoreIO + * @ingroup RTEMSScoreCPUARM * - * @brief This source file contains the implementation of - * _IO_Printf(). + * @brief This source file contains the ARM-specific _CPU_ISR_install_vector(). */ /* - * Copyright (c) 2017 embedded brains GmbH & Co. KG + * COPYRIGHT (c) 2000 Canon Research Centre France SA. + * Emmanuel Raguet, mailto:raguet@crf.canon.fr + * + * Copyright (c) 2002 Advent Networks, Inc + * Jay Monkman <jmonkman@adventnetworks.com> + * + * Copyright (C) 2009, 2017 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -38,16 +43,33 @@ #include "config.h" #endif -#include <rtems/score/io.h> +#include <rtems/score/cpu.h> + +#ifdef ARM_MULTILIB_ARCH_V4 -int _IO_Printf( IO_Put_char put_char, void *arg, char const *fmt, ... ) +void _CPU_ISR_install_vector( + uint32_t vector, + CPU_ISR_handler new_handler, + CPU_ISR_handler *old_handler +) { - va_list ap; - int len; +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Warray-bounds" + /* Redirection table starts at the end of the vector table */ + CPU_ISR_handler volatile *table = (CPU_ISR_handler *) (MAX_EXCEPTIONS * 4); - va_start( ap, fmt ); - len = _IO_Vprintf( put_char, arg, fmt, ap ); - va_end( ap ); + CPU_ISR_handler current_handler = table [vector]; - return len; + /* The current handler is now the old one */ + if (old_handler != NULL) { + *old_handler = current_handler; + } + + /* Write only if necessary to avoid writes to a maybe read-only memory */ + if (current_handler != new_handler) { + table [vector] = new_handler; + } +#pragma GCC diagnostic pop } + +#endif /* ARM_MULTILIB_ARCH_V4 */ diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c index 65f1ad2014..c27f4de9f9 100644 --- a/cpukit/score/cpu/arm/cpu.c +++ b/cpukit/score/cpu/arm/cpu.c @@ -8,8 +8,7 @@ * @brief This source file contains static assertions to ensure the consistency * of interfaces used in C and assembler and it contains the ARM-specific * implementation of _CPU_Initialize(), _CPU_ISR_Get_level(), - * _CPU_ISR_Set_level(), _CPU_ISR_install_vector(), - * _CPU_Context_Initialize(), and _CPU_Fatal_halt(). + * _CPU_ISR_Set_level(), _CPU_Context_Initialize(), and _CPU_Fatal_halt(). */ /* @@ -160,31 +159,6 @@ uint32_t _CPU_ISR_Get_level( void ) return ( level & ARM_PSR_I ) != 0; } -void _CPU_ISR_install_vector( - uint32_t vector, - CPU_ISR_handler new_handler, - CPU_ISR_handler *old_handler -) -{ -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Warray-bounds" - /* Redirection table starts at the end of the vector table */ - CPU_ISR_handler volatile *table = (CPU_ISR_handler *) (MAX_EXCEPTIONS * 4); - - CPU_ISR_handler current_handler = table [vector]; - - /* The current handler is now the old one */ - if (old_handler != NULL) { - *old_handler = current_handler; - } - - /* Write only if necessary to avoid writes to a maybe read-only memory */ - if (current_handler != new_handler) { - table [vector] = new_handler; - } -#pragma GCC diagnostic pop -} - void _CPU_Initialize( void ) { /* Do nothing */ diff --git a/cpukit/score/cpu/arm/include/libcpu/arm-cp15.h b/cpukit/score/cpu/arm/include/libcpu/arm-cp15.h index 333cd7c8a0..c239eaccc8 100644 --- a/cpukit/score/cpu/arm/include/libcpu/arm-cp15.h +++ b/cpukit/score/cpu/arm/include/libcpu/arm-cp15.h @@ -1309,15 +1309,17 @@ arm_cp15_data_cache_test_and_clean(void) ); } -/* In DDI0301H_arm1176jzfs_r0p7_trm - * 'MCR p15, 0, <Rd>, c7, c14, 0' means - * Clean and Invalidate Entire Data Cache - */ ARM_CP15_TEXT_SECTION static inline void arm_cp15_data_cache_clean_and_invalidate(void) { ARM_SWITCH_REGISTERS; +#if __ARM_ARCH >= 6 + /* + * In DDI0301H_arm1176jzfs_r0p7_trm + * 'MCR p15, 0, <Rd>, c7, c14, 0' means + * Clean and Invalidate Entire Data Cache + */ uint32_t sbz = 0; __asm__ volatile ( @@ -1328,6 +1330,22 @@ arm_cp15_data_cache_clean_and_invalidate(void) : [sbz] "r" (sbz) : "memory" ); +#else + /* + * Assume this is an ARM926EJ-S. Use the test, clean, and invalidate DCache + * operation. + */ + __asm__ volatile ( + ARM_SWITCH_TO_ARM + "1:\n" + "mrc p15, 0, r15, c7, c14, 3\n" + "bne 1b\n" + ARM_SWITCH_BACK + : ARM_SWITCH_OUTPUT + : + : "memory" + ); +#endif } ARM_CP15_TEXT_SECTION static inline void diff --git a/cpukit/score/cpu/arm/include/rtems/score/armv7m.h b/cpukit/score/cpu/arm/include/rtems/score/armv7m.h index 0f129f1d2e..7fa48b3aa5 100644 --- a/cpukit/score/cpu/arm/include/rtems/score/armv7m.h +++ b/cpukit/score/cpu/arm/include/rtems/score/armv7m.h @@ -159,8 +159,19 @@ typedef struct { #define ARMV7M_SCB_SHCSR_MEMFAULTENA (1U << 16) uint32_t shcsr; +#define ARMV7M_SCB_CFSR_MMFSR_MASK 0xff +#define ARMV7M_SCB_CFSR_MMFSR_GET(n) (n & ARMV7M_SCB_CFSR_MMFSR_MASK) +#define ARMV7M_SCB_CFSR_BFSR_MASK 0xff00 +#define ARMV7M_SCB_CFSR_BFSR_GET(n) (n & ARMV7M_SCB_CFSR_BFSR_MASK) +#define ARMV7M_SCB_CFSR_UFSR_MASK 0xffff0000 +#define ARMV7M_SCB_CFSR_UFSR_GET(n) (n & ARMV7M_SCB_CFSR_UFSR_MASK) uint32_t cfsr; + +#define ARMV7M_SCB_HFSR_VECTTBL_MASK 0x2 +#define ARMV7M_SCB_HFSR_FORCED_MASK (1U << 30) +#define ARMV7M_SCB_HFSR_DEBUGEVT_MASK (1U << 31) uint32_t hfsr; + uint32_t dfsr; uint32_t mmfar; uint32_t bfar; diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu.h b/cpukit/score/cpu/arm/include/rtems/score/cpu.h index 3cd43970b1..a462b48cf1 100644 --- a/cpukit/score/cpu/arm/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/arm/include/rtems/score/cpu.h @@ -585,7 +585,7 @@ typedef enum { ARM_EXCEPTION_IRQ = 6, ARM_EXCEPTION_FIQ = 7, MAX_EXCEPTIONS = 8, - ARM_EXCEPTION_MAKE_ENUM_32_BIT = 0xffffffff + ARM_EXCEPTION_MAKE_ENUM_32_BIT = 0x7fffffff } Arm_symbolic_exception_name; #endif /* defined(ARM_MULTILIB_ARCH_V4) */ diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/arm/include/rtems/score/cpuatomic.h deleted file mode 100644 index 01bb99cda3..0000000000 --- a/cpukit/score/cpu/arm/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h index f9b40889f5..04d23f0ea7 100644 --- a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h @@ -178,6 +178,13 @@ static inline void _CPU_Use_thread_local_storage( #endif } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + return (void *) context->thread_id; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/bfin/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/bfin/include/rtems/score/cpuatomic.h deleted file mode 100644 index 598ee76b20..0000000000 --- a/cpukit/score/cpu/bfin/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h index 05628a2c0b..5a445d9420 100644 --- a/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h @@ -41,11 +41,15 @@ RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { + (void) pattern; + /* TODO */ } static inline void _CPU_Context_validate( uintptr_t pattern ) { + (void) pattern; + while (1) { /* TODO */ } @@ -68,6 +72,14 @@ static inline void _CPU_Use_thread_local_storage( (void) context; } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + (void) context; + return NULL; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/i386/cpu_asm.S b/cpukit/score/cpu/i386/cpu_asm.S index 6b114e94e1..bb5c096e72 100644 --- a/cpukit/score/cpu/i386/cpu_asm.S +++ b/cpukit/score/cpu/i386/cpu_asm.S @@ -67,11 +67,13 @@ .p2align 1 PUBLIC (_CPU_Context_switch) + PUBLIC (_CPU_Context_switch_no_return) .set RUNCONTEXT_ARG, 4 /* save context argument */ .set HEIRCONTEXT_ARG, 8 /* restore context argument */ SYM (_CPU_Context_switch): +SYM (_CPU_Context_switch_no_return): movl RUNCONTEXT_ARG(esp),eax /* eax = running threads context */ GET_SELF_CPU_CONTROL edx /* edx has address for per_CPU information */ movl PER_CPU_ISR_DISPATCH_DISABLE(edx),ecx diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpu.h b/cpukit/score/cpu/i386/include/rtems/score/cpu.h index 6aa97d309e..a12b0f2b92 100644 --- a/cpukit/score/cpu/i386/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/i386/include/rtems/score/cpu.h @@ -2,9 +2,9 @@ /** * @file - * + * * @brief Intel I386 CPU Dependent Source - * + * * This include file contains information pertaining to the Intel * i386 processor. */ @@ -51,7 +51,7 @@ extern "C" { #include <rtems/score/paravirt.h> #endif #include <rtems/score/i386.h> - + /** * @defgroup RTEMSScoreCPUi386 i386 Specific Support * @@ -163,7 +163,7 @@ typedef struct { } Context_Control; #define _CPU_Context_Get_SP( _context ) \ - (_context)->esp + (uintptr_t) (_context)->esp #ifdef RTEMS_SMP static inline bool _CPU_Context_Get_is_executing( @@ -572,6 +572,11 @@ void _CPU_Context_switch( Context_Control *heir ); +RTEMS_NO_RETURN void _CPU_Context_switch_no_return( + Context_Control *executing, + Context_Control *heir +); + /* * _CPU_Context_restore * diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/i386/include/rtems/score/cpuatomic.h deleted file mode 100644 index 01bb99cda3..0000000000 --- a/cpukit/score/cpu/i386/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h index f0e4088218..da38ecacf7 100644 --- a/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h @@ -62,11 +62,15 @@ RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { + (void) pattern; + /* TODO */ } static inline void _CPU_Context_validate( uintptr_t pattern ) { + (void) pattern; + while (1) { /* TODO */ } @@ -108,6 +112,13 @@ static inline void _CPU_Use_thread_local_storage( ); } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + return (void *) &context->gs; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/lm32/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/lm32/include/rtems/score/cpuatomic.h deleted file mode 100644 index 598ee76b20..0000000000 --- a/cpukit/score/cpu/lm32/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h index 679ef452f4..70a1db1d4d 100644 --- a/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h @@ -40,11 +40,15 @@ RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { + (void) pattern; + /* TODO */ } static inline void _CPU_Context_validate( uintptr_t pattern ) { + (void) pattern; + while (1) { /* TODO */ } @@ -67,6 +71,14 @@ static inline void _CPU_Use_thread_local_storage( (void) context; } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + (void) context; + return NULL; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/m68k/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/m68k/include/rtems/score/cpuatomic.h deleted file mode 100644 index 01bb99cda3..0000000000 --- a/cpukit/score/cpu/m68k/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h index ec90a41ae2..521e9fc4c2 100644 --- a/cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h @@ -60,11 +60,15 @@ RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { + (void) pattern; + /* TODO */ } static inline void _CPU_Context_validate( uintptr_t pattern ) { + (void) pattern; + while (1) { /* TODO */ } @@ -91,6 +95,13 @@ static inline void _CPU_Use_thread_local_storage( (void) context; } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + return (void *) context->thread_pointer; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/microblaze/include/machine/elf_machdep.h b/cpukit/score/cpu/microblaze/include/machine/elf_machdep.h new file mode 100644 index 0000000000..e6d661c596 --- /dev/null +++ b/cpukit/score/cpu/microblaze/include/machine/elf_machdep.h @@ -0,0 +1,83 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2023 On-Line Applications Research Corporation (OAR) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _MICROBLAZE_ELF_MACHDEP_H_ +#define _MICROBLAZE_ELF_MACHDEP_H_ + +#define ELF64_MACHDEP_ID EM_MICROBLAZE +#define ELF32_MACHDEP_ID EM_MICROBLAZE + +#define ELF64_MACHDEP_ENDIANNESS ELFDATA2LSB +#define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB + +#define ELF32_MACHDEP_ID_CASES \ + case EM_MICROBLAZE: \ + break; + +#define ELF64_MACHDEP_ID_CASES \ + case EM_MICROBLAZE: \ + break; + +#define KERN_ELFSIZE 32 +#define ARCH_ELFSIZE 32 /* MD native binary size */ + +/* Processor specific relocation types */ + +#define R_MICROBLAZE_NONE 0 +#define R_MICROBLAZE_32 1 +#define R_MICROBLAZE_32_PCREL 2 +#define R_MICROBLAZE_64_PCREL 3 +#define R_MICROBLAZE_32_PCREL_LO 4 +#define R_MICROBLAZE_64 5 +#define R_MICROBLAZE_32_LO 6 +#define R_MICROBLAZE_SRO32 7 +#define R_MICROBLAZE_SRW32 8 +#define R_MICROBLAZE_64_NONE 9 +#define R_MICROBLAZE_32_SYM_OP_SYM 10 +#define R_MICROBLAZE_GNU_VTINHERIT 11 +#define R_MICROBLAZE_GNU_VTENTRY 12 +#define R_MICROBLAZE_GOTPC_64 13 +#define R_MICROBLAZE_GOT_64 14 +#define R_MICROBLAZE_PLT_64 15 +#define R_MICROBLAZE_REL 16 +#define R_MICROBLAZE_JUMP_SLOT 17 +#define R_MICROBLAZE_GLOB_DAT 18 +#define R_MICROBLAZE_GOTOFF_64 19 +#define R_MICROBLAZE_GOTOFF_32 20 +#define R_MICROBLAZE_COPY 21 +#define R_MICROBLAZE_TLS 22 +#define R_MICROBLAZE_TLSGD 23 +#define R_MICROBLAZE_TLSLD 24 +#define R_MICROBLAZE_TLSDTPMOD32 25 +#define R_MICROBLAZE_TLSDTPREL32 26 +#define R_MICROBLAZE_TLSDTPREL64 27 +#define R_MICROBLAZE_TLSGOTTPREL32 28 +#define R_MICROBLAZE_TLSTPREL32 29 + +#define R_TYPE( name ) R_MICROBLAZE_##name + +#endif /* _MICROBLAZE_ELF_MACHDEP_H_ */ diff --git a/cpukit/score/cpu/microblaze/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/microblaze/include/rtems/score/cpuatomic.h deleted file mode 100644 index 6dc769b95a..0000000000 --- a/cpukit/score/cpu/microblaze/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,41 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * @file - * - * @ingroup RTEMSScoreCPU - * - * @brief MicroBlaze atomic support - */ - -/* - * Copyright (C) 2021 On-Line Applications Research Corporation (OAR) - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h index 4e315e856d..760ebbfbbb 100644 --- a/cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h @@ -100,6 +100,13 @@ static inline void _CPU_Use_thread_local_storage( (void) context; } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + return (void *) context->thread_pointer; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/mips/include/rtems/score/cpuatomic.h deleted file mode 100644 index 01bb99cda3..0000000000 --- a/cpukit/score/cpu/mips/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h index ad6b7ae615..98ed1c492f 100644 --- a/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h @@ -60,11 +60,15 @@ RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { + (void) pattern; + /* TODO */ } static inline void _CPU_Context_validate( uintptr_t pattern ) { + (void) pattern; + while (1) { /* TODO */ } @@ -87,6 +91,14 @@ static inline void _CPU_Use_thread_local_storage( (void) context; } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + (void) context; + return NULL; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/moxie/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/moxie/include/rtems/score/cpuatomic.h deleted file mode 100644 index 01bb99cda3..0000000000 --- a/cpukit/score/cpu/moxie/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h index 8ded8c34e9..44c70cc56d 100644 --- a/cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h @@ -60,11 +60,15 @@ RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { + (void) pattern; + /* TODO */ } static inline void _CPU_Context_validate( uintptr_t pattern ) { + (void) pattern; + while (1) { /* TODO */ } @@ -87,6 +91,14 @@ static inline void _CPU_Use_thread_local_storage( (void) context; } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + (void) context; + return NULL; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/nios2/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/nios2/include/rtems/score/cpuatomic.h deleted file mode 100644 index 01bb99cda3..0000000000 --- a/cpukit/score/cpu/nios2/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h index e1beaca74c..3c9c6734ec 100644 --- a/cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h @@ -84,6 +84,13 @@ static inline void _CPU_Use_thread_local_storage( __asm__ volatile ( "" : : "r" ( r23 ) ); } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + return (void *) context->r23; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/no_cpu/cpuidle.c b/cpukit/score/cpu/no_cpu/cpuidle.c index bff1309d39..dbaf109905 100644 --- a/cpukit/score/cpu/no_cpu/cpuidle.c +++ b/cpukit/score/cpu/no_cpu/cpuidle.c @@ -1,5 +1,14 @@ /* SPDX-License-Identifier: BSD-2-Clause */ +/** + * @file + * + * @ingroup RTEMSScoreCPU + * + * @brief This source file contains the implementation of the + * _CPU_Thread_Idle_body(). + */ + /* * Copyright (C) 2013, 2014 embedded brains GmbH & Co. KG * @@ -33,6 +42,13 @@ void *_CPU_Thread_Idle_body( uintptr_t ignored ) { + /* + * This is a workaround for: + * + * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108658 + */ + __asm__ volatile (""); + while ( true ) { /* Do nothing */ } diff --git a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h index 61afcdd014..61f1ab7ba5 100644 --- a/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h @@ -201,6 +201,22 @@ static inline void _CPU_Use_thread_local_storage( (void) context; } +/** + * @brief Gets the thread pointer of the context. + * + * The thread pointer is used to get the address of thread-local storage + * objects associated with a thread. + * + * @param context is the processor context containing the thread pointer. + */ +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + (void) context; + return NULL; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/or1k/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/or1k/include/rtems/score/cpuatomic.h deleted file mode 100644 index 01bb99cda3..0000000000 --- a/cpukit/score/cpu/or1k/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h index 5e6865eb1f..9b58b1b77a 100644 --- a/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h @@ -79,6 +79,14 @@ static inline void _CPU_Use_thread_local_storage( (void) context; } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + (void) context; + return NULL; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/powerpc/include/rtems/asm.h b/cpukit/score/cpu/powerpc/include/rtems/asm.h index 27af64e724..94f54245b4 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/asm.h +++ b/cpukit/score/cpu/powerpc/include/rtems/asm.h @@ -75,23 +75,21 @@ #define __PROC_LABEL_PREFIX__ __USER_LABEL_PREFIX__ #endif -#include <rtems/concat.h> - /* Use the right prefix for global labels. */ -#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x) +#define SYM(x) RTEMS_XCONCAT (__USER_LABEL_PREFIX__, x) /* Use the right prefix for procedure labels. */ -#define PROC(x) CONCAT1 (__PROC_LABEL_PREFIX__, x) +#define PROC(x) RTEMS_XCONCAT (__PROC_LABEL_PREFIX__, x) /* Use the right prefix for registers. */ -#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) +#define REG(x) RTEMS_XCONCAT (__REGISTER_PREFIX__, x) /* Use the right prefix for floating point registers. */ -#define FREG(x) CONCAT1 (__FLOAT_REGISTER_PREFIX__, x) +#define FREG(x) RTEMS_XCONCAT (__FLOAT_REGISTER_PREFIX__, x) /* * define macros for all of the registers on this CPU diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpuatomic.h deleted file mode 100644 index 01bb99cda3..0000000000 --- a/cpukit/score/cpu/powerpc/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h index 6d984b92e4..68b7165546 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h @@ -301,6 +301,13 @@ static inline void _CPU_Use_thread_local_storage( __asm__ volatile ( "" : : "r" ( tp ) ); } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + return (void *) ppc_get_context( context )->tp; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/riscv/include/rtems/score/cpuatomic.h deleted file mode 100644 index 8ee9606b44..0000000000 --- a/cpukit/score/cpu/riscv/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h index 47cf2e338c..13fd60ed8c 100644 --- a/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h @@ -454,6 +454,13 @@ static inline void _CPU_Use_thread_local_storage( __asm__ volatile ( "" : : "r" ( tp ) ); } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + return (void *) context->tp; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/sh/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/sh/include/rtems/score/cpuatomic.h deleted file mode 100644 index 598ee76b20..0000000000 --- a/cpukit/score/cpu/sh/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h index 3e37c8f57d..e5f45eb363 100644 --- a/cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h @@ -41,11 +41,15 @@ RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { + (void) pattern; + /* TODO */ } static inline void _CPU_Context_validate( uintptr_t pattern ) { + (void) pattern; + while (1) { /* TODO */ } @@ -68,6 +72,14 @@ static inline void _CPU_Use_thread_local_storage( (void) context; } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + (void) context; + return NULL; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/sparc/cpu_asm.S b/cpukit/score/cpu/sparc/cpu_asm.S index 8947064ff8..fd7186b499 100644 --- a/cpukit/score/cpu/sparc/cpu_asm.S +++ b/cpukit/score/cpu/sparc/cpu_asm.S @@ -246,6 +246,14 @@ done_flushing: mov %g1, %psr ! restore status register and ! **** ENABLE TRAPS **** + /* + * WARNING: This code does not run with the restored stack pointer. In + * SMP configurations, it uses a processor-specific stack. In + * uniprocessor configurations, it uses the stack of the caller. In + * this case, the caller shall ensure that it is not the interrupt + * stack (which is also the system initialization stack). + */ + ld [%o1 + G5_OFFSET], %g5 ! restore the global registers ld [%o1 + G7_OFFSET], %g7 @@ -266,7 +274,9 @@ done_flushing: ldd [%o1 + I4_OFFSET], %i4 ldd [%o1 + I6_FP_OFFSET], %i6 - ldd [%o1 + O6_SP_OFFSET], %o6 ! restore the output registers + ldd [%o1 + O6_SP_OFFSET], %o6 ! restore the non-volatile output + ! registers (stack pointer, + ! link register) jmp %o7 + 8 ! return nop ! delay slot @@ -325,6 +335,23 @@ SYM(_CPU_Context_restore): ba SYM(_CPU_Context_restore_heir) mov %i0, %o1 ! in the delay slot +#if !defined(RTEMS_SMP) + .align 4 + PUBLIC(_SPARC_Start_multitasking) +SYM(_SPARC_Start_multitasking): + /* + * Restore the stack pointer right now, so that the window flushing and + * interrupts during _CPU_Context_restore_heir() use the stack of the + * heir thread. This is crucial for the interrupt handling to prevent + * a concurrent use of the interrupt stack (which is also the system + * initialization stack). + */ + ld [%o0 + O6_SP_OFFSET], %o6 + + ba SYM(_CPU_Context_restore) + nop +#endif + /* * void _SPARC_Interrupt_trap() * @@ -496,9 +523,7 @@ dont_do_the_window: bnz dont_switch_stacks ! No, then do not switch stacks #if defined(RTEMS_PROFILING) - sethi %hi(_SPARC_Counter), %o5 - ld [%o5 + %lo(_SPARC_Counter)], %l4 - call %l4 + call SYM(_SPARC_Counter_read_ISR_disabled) nop mov %o0, %o5 #else @@ -577,7 +602,7 @@ dont_switch_stacks: cmp %l7, 0 bne profiling_not_outer_most_exit nop - call %l4 ! Call _SPARC_Counter.counter_read + call SYM(_SPARC_Counter_read_ISR_disabled) mov %g1, %l4 ! Save previous interrupt status mov %o0, %o2 ! o2 = 3rd arg = interrupt exit instant mov %l3, %o1 ! o1 = 2nd arg = interrupt entry instant diff --git a/cpukit/score/cpu/sparc/include/libcpu/grlib-tn-0018.h b/cpukit/score/cpu/sparc/include/libcpu/grlib-tn-0018.h index bb43234128..10f34c6123 100644 --- a/cpukit/score/cpu/sparc/include/libcpu/grlib-tn-0018.h +++ b/cpukit/score/cpu/sparc/include/libcpu/grlib-tn-0018.h @@ -1,5 +1,14 @@ /* SPDX-License-Identifier: BSD-2-Clause */ +/** + * @file + * + * @ingroup RTEMSScoreCPUSPARC + * + * @brief This header file provides interfaces of the GRLIB-TN-0018 LEON3FT + * RETT Restart Errata fixes. + */ + /* * Copyright (C) 2020 Cobham Gaisler AB * diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h index 43b9b75bec..a21cef371f 100644 --- a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h @@ -993,6 +993,25 @@ RTEMS_NO_RETURN void _CPU_Context_switch_no_return( */ RTEMS_NO_RETURN void _CPU_Context_restore( Context_Control *new_context ); +#if !defined(RTEMS_SMP) +/** + * @brief Starts multitasking in uniprocessor configurations. + * + * This function just sets the stack of the heir thread and then calls + * _CPU_Context_restore(). + * + * This is causes that the window flushing and interrupts during + * _CPU_Context_restore() use the stack of the heir thread. This is crucial + * for the interrupt handling to prevent a concurrent use of the interrupt + * stack (which is also the system initialization stack). + * + * @param[in] heir is the context of the heir thread. + */ +RTEMS_NO_RETURN void _SPARC_Start_multitasking( Context_Control *heir ); + +#define _CPU_Start_multitasking( _heir ) _SPARC_Start_multitasking( _heir ) +#endif + #if defined(RTEMS_SMP) uint32_t _CPU_SMP_Initialize( void ); @@ -1132,31 +1151,7 @@ typedef uint32_t CPU_Counter_ticks; uint32_t _CPU_Counter_frequency( void ); -typedef CPU_Counter_ticks ( *SPARC_Counter_read )( void ); - -/* - * The SPARC processors supported by RTEMS have no built-in CPU counter - * support. We have to use some hardware counter module for this purpose, for - * example the GPTIMER instance used by the clock driver. The BSP must provide - * an implementation of the CPU counter read function. This allows the use of - * dynamic hardware enumeration. - */ -typedef struct { - SPARC_Counter_read read_isr_disabled; - SPARC_Counter_read read; - volatile const CPU_Counter_ticks *counter_register; - volatile const uint32_t *pending_register; - uint32_t pending_mask; - CPU_Counter_ticks accumulated; - CPU_Counter_ticks interval; -} SPARC_Counter; - -extern const SPARC_Counter _SPARC_Counter; - -static inline CPU_Counter_ticks _CPU_Counter_read( void ) -{ - return ( *_SPARC_Counter.read )(); -} +CPU_Counter_ticks _CPU_Counter_read( void ); /** Type that can store a 32-bit integer or a pointer. */ typedef uintptr_t CPU_Uint32ptr; diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/sparc/include/rtems/score/cpuatomic.h deleted file mode 100644 index 01bb99cda3..0000000000 --- a/cpukit/score/cpu/sparc/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h index e15be48e9e..9697209a97 100644 --- a/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h @@ -251,6 +251,20 @@ static inline void _CPU_Use_thread_local_storage( __asm__ volatile ( "" : : "r" ( g7 ) ); } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + return (void *) context->g7; +} + +#if defined(RTEMS_PROFILING) +/** + * @brief Reads the CPU counter while interrupts are disabled. + */ +CPU_Counter_ticks _SPARC_Counter_read_ISR_disabled( void ); +#endif + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/sparc/include/rtems/score/sparcimpl.h b/cpukit/score/cpu/sparc/include/rtems/score/sparcimpl.h deleted file mode 100644 index d9be984179..0000000000 --- a/cpukit/score/cpu/sparc/include/rtems/score/sparcimpl.h +++ /dev/null @@ -1,105 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * @file - * - * @ingroup RTEMSScoreCPUSPARC - * - * @brief This header file provides interfaces used by the SPARC port of RTEMS. - */ - -/* - * Copyright (C) 2016, 2018 embedded brains GmbH & Co. KG - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_SPARCIMPL_H -#define _RTEMS_SCORE_SPARCIMPL_H - -#include <rtems/score/cpu.h> - -#ifdef __cplusplus -extern "C" { -#endif /* __cplusplus */ - -struct timecounter; - -/* - * Provides a mutable alias to _SPARC_Counter for use in - * _SPARC_Counter_initialize(). The _SPARC_Counter and _SPARC_Counter_mutable - * are defined via the SPARC_COUNTER_DEFINITION define. - */ -extern SPARC_Counter _SPARC_Counter_mutable; - -void _SPARC_Counter_at_tick_clock( void ); - -CPU_Counter_ticks _SPARC_Counter_read_default( void ); - -CPU_Counter_ticks _SPARC_Counter_read_up( void ); - -CPU_Counter_ticks _SPARC_Counter_read_down( void ); - -CPU_Counter_ticks _SPARC_Counter_read_clock_isr_disabled( void ); - -CPU_Counter_ticks _SPARC_Counter_read_clock( void ); - -CPU_Counter_ticks _SPARC_Counter_read_asr23( void ); - -uint32_t _SPARC_Get_timecount_up( struct timecounter * ); - -uint32_t _SPARC_Get_timecount_down( struct timecounter * ); - -uint32_t _SPARC_Get_timecount_clock( struct timecounter * ); - -uint32_t _SPARC_Get_timecount_asr23( struct timecounter * ); - -/* - * Defines the _SPARC_Counter and _SPARC_Counter_mutable global variables. - * Place this define in the global file scope of the CPU counter support file - * of the BSP. - */ -#define SPARC_COUNTER_DEFINITION \ - __asm__ ( \ - "\t.global\t_SPARC_Counter\n" \ - "\t.global\t_SPARC_Counter_mutable\n" \ - "\t.section\t.data._SPARC_Counter,\"aw\",@progbits\n" \ - "\t.align\t4\n" \ - "\t.type\t_SPARC_Counter, #object\n" \ - "\t.size\t_SPARC_Counter, 28\n" \ - "_SPARC_Counter:\n" \ - "_SPARC_Counter_mutable:\n" \ - "\t.long\t_SPARC_Counter_read_default\n" \ - "\t.long\t_SPARC_Counter_read_default\n" \ - "\t.long\t0\n" \ - "\t.long\t0\n" \ - "\t.long\t0\n" \ - "\t.long\t0\n" \ - "\t.long\t0\n" \ - "\t.previous\n" \ - ) - -#ifdef __cplusplus -} -#endif /* __cplusplus */ - -#endif /* _RTEMS_SCORE_SPARCIMPL_H */ diff --git a/cpukit/score/cpu/sparc/sparc-counter-asm.S b/cpukit/score/cpu/sparc/sparc-counter-asm.S deleted file mode 100644 index 890876eff1..0000000000 --- a/cpukit/score/cpu/sparc/sparc-counter-asm.S +++ /dev/null @@ -1,151 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * Copyright (C) 2016, 2018 embedded brains GmbH & Co. KG - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include <rtems/asm.h> - - /* - * All functions except _SPARC_Counter_read_clock() in this module are - * sometimes called with traps disabled. - */ - - .section ".text" - .align 4 - - PUBLIC(_SPARC_Counter_read_default) -SYM(_SPARC_Counter_read_default): - sethi %hi(_SPARC_Counter + 12), %o1 - ld [%o1 + %lo(_SPARC_Counter + 12)], %o0 - add %o0, 1, %o0 - st %o0, [%o1 + %lo(_SPARC_Counter + 12)] - jmp %o7 + 8 - nop - - PUBLIC(_SPARC_Counter_read_up) - PUBLIC(_SPARC_Get_timecount_up) -SYM(_SPARC_Counter_read_up): -SYM(_SPARC_Get_timecount_up): - sethi %hi(_SPARC_Counter + 8), %o0 - ld [%o0 + %lo(_SPARC_Counter + 8)], %o0 - jmp %o7 + 8 - ld [%o0], %o0 - - PUBLIC(_SPARC_Counter_read_down) - PUBLIC(_SPARC_Get_timecount_down) -SYM(_SPARC_Counter_read_down): -SYM(_SPARC_Get_timecount_down): - sethi %hi(_SPARC_Counter + 8), %o0 - ld [%o0 + %lo(_SPARC_Counter + 8)], %o0 - ld [%o0], %o0 - jmp %o7 + 8 - xnor %g0, %o0, %o0 - - /* - * For the corresponding C code is something like this: - * - * CPU_Counter_ticks _SPARC_Counter_read_clock_isr_disabled( void ) - * { - * const SPARC_Counter *ctr; - * CPU_Counter_ticks ticks; - * CPU_Counter_ticks accumulated; - * - * ctr = &_SPARC_Counter; - * ticks = *ctr->counter_register; - * accumulated = ctr->accumulated; - * - * if ( ( *ctr->pending_register & ctr->pending_mask ) != 0 ) { - * ticks = *ctr->counter_register; - * accumulated += ctr->interval; - * } - * - * return accumulated - ticks; - * } - */ - PUBLIC(_SPARC_Counter_read_clock_isr_disabled) -SYM(_SPARC_Counter_read_clock_isr_disabled): - sethi %hi(_SPARC_Counter), %o5 - or %o5, %lo(_SPARC_Counter), %o5 - ld [%o5 + 8], %o3 - ld [%o5 + 12], %o4 - ld [%o5 + 16], %o2 - ld [%o3], %o0 - ld [%o4], %o1 - btst %o1, %o2 - bne .Lpending_isr_disabled - ld [%o5 + 20], %o4 - jmp %o7 + 8 - sub %o4, %o0, %o0 -.Lpending_isr_disabled: - ld [%o5 + 24], %o5 - ld [%o3], %o0 - add %o4, %o5, %o4 - jmp %o7 + 8 - sub %o4, %o0, %o0 - - /* - * For the corresponding C code see - * _SPARC_Counter_read_clock_isr_disabled() above. - */ - PUBLIC(_SPARC_Counter_read_clock) - PUBLIC(_SPARC_Get_timecount_clock) -SYM(_SPARC_Counter_read_clock): -SYM(_SPARC_Get_timecount_clock): - sethi %hi(_SPARC_Counter), %o5 - or %o5, %lo(_SPARC_Counter), %o5 - ta SPARC_SWTRAP_IRQDIS - ld [%o5 + 8], %o3 - ld [%o5 + 12], %o4 - ld [%o5 + 16], %o2 - ld [%o3], %o0 - ld [%o4], %o1 - btst %o1, %o2 - bne .Lpending - ld [%o5 + 20], %o4 - ta SPARC_SWTRAP_IRQEN -#ifdef __FIX_LEON3FT_TN0018 - /* A nop is added to work around the GRLIB-TN-0018 errata */ - nop -#endif - jmp %o7 + 8 - sub %o4, %o0, %o0 -.Lpending: - ld [%o5 + 24], %o5 - ld [%o3], %o0 - ta SPARC_SWTRAP_IRQEN - add %o4, %o5, %o4 - jmp %o7 + 8 - sub %o4, %o0, %o0 - - PUBLIC(_SPARC_Counter_read_asr23) - PUBLIC(_SPARC_Get_timecount_asr23) -SYM(_SPARC_Counter_read_asr23): -SYM(_SPARC_Get_timecount_asr23): - jmp %o7 + 8 - mov %asr23, %o0 diff --git a/cpukit/score/cpu/sparc/sparc-isr-handler.S b/cpukit/score/cpu/sparc/sparc-isr-handler.S index cb4fb345a3..9ecb44e870 100644 --- a/cpukit/score/cpu/sparc/sparc-isr-handler.S +++ b/cpukit/score/cpu/sparc/sparc-isr-handler.S @@ -231,9 +231,7 @@ dont_do_the_window: bnz dont_switch_stacks ! No, then do not switch stacks #if defined(RTEMS_PROFILING) - sethi %hi(_SPARC_Counter), %o5 - ld [%o5 + %lo(_SPARC_Counter)], %l4 - call %l4 + call SYM(_SPARC_Counter_read_ISR_disabled) nop mov %o0, %o5 #else @@ -335,7 +333,7 @@ pil_fixed: cmp %l7, 0 bne profiling_not_outer_most_exit nop - call %l4 ! Call _SPARC_Counter.counter_read + call SYM(_SPARC_Counter_read_ISR_disabled) mov %g1, %l4 ! Save previous interrupt status mov %o0, %o2 ! o2 = 3rd arg = interrupt exit instant mov %l3, %o1 ! o1 = 2nd arg = interrupt entry instant diff --git a/cpukit/score/cpu/sparc/syscall.S b/cpukit/score/cpu/sparc/syscall.S index 0beffd4162..ee21c1b005 100644 --- a/cpukit/score/cpu/sparc/syscall.S +++ b/cpukit/score/cpu/sparc/syscall.S @@ -44,8 +44,10 @@ SYM(syscall): ta 0 ! syscall 1, halt with %g1,%g2,%g3 info PUBLIC(sparc_syscall_exit) + PUBLIC(_CPU_Fatal_halt) SYM(sparc_syscall_exit): +SYM(_CPU_Fatal_halt): mov SYS_exit, %g1 mov %o0, %g2 ! Additional exit code 1 diff --git a/cpukit/score/cpu/sparc/syscall.h b/cpukit/score/cpu/sparc/syscall.h index 2f20886840..6fc8fa3a6f 100644 --- a/cpukit/score/cpu/sparc/syscall.h +++ b/cpukit/score/cpu/sparc/syscall.h @@ -1 +1,9 @@ +/** + * @file + * + * @ingroup RTEMSScoreCPUSPARC + * + * @brief This header file provides system call interfaces. + */ + #define SYS_exit 1 diff --git a/cpukit/score/cpu/sparc64/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/sparc64/include/rtems/score/cpuatomic.h deleted file mode 100644 index 01bb99cda3..0000000000 --- a/cpukit/score/cpu/sparc64/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h index c49c637805..25a362c350 100644 --- a/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h @@ -60,11 +60,15 @@ RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { + (void) pattern; + /* TODO */ } static inline void _CPU_Context_validate( uintptr_t pattern ) { + (void) pattern; + while (1) { /* TODO */ } @@ -87,6 +91,14 @@ static inline void _CPU_Use_thread_local_storage( (void) context; } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + (void) context; + return NULL; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/v850/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/v850/include/rtems/score/cpuatomic.h deleted file mode 100644 index 01bb99cda3..0000000000 --- a/cpukit/score/cpu/v850/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h index 5ec528961c..5bc1c42459 100644 --- a/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h @@ -60,11 +60,15 @@ RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { + (void) pattern; + /* TODO */ } static inline void _CPU_Context_validate( uintptr_t pattern ) { + (void) pattern; + while (1) { /* TODO */ } @@ -87,6 +91,14 @@ static inline void _CPU_Use_thread_local_storage( (void) context; } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + (void) context; + return NULL; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/x86_64/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/x86_64/include/rtems/score/cpuatomic.h deleted file mode 100644 index 598ee76b20..0000000000 --- a/cpukit/score/cpu/x86_64/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h index e0e301b6bc..d4b7a71009 100644 --- a/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h @@ -44,21 +44,25 @@ RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { - /* TODO */ -} + (void) pattern; -static inline void _CPU_Instruction_illegal( void ) -{ - __asm__ volatile ( ".word 0" ); + /* TODO */ } static inline void _CPU_Context_validate( uintptr_t pattern ) { + (void) pattern; + while (1) { /* TODO */ } } +static inline void _CPU_Instruction_illegal( void ) +{ + __asm__ volatile ( ".word 0" ); +} + static inline void _CPU_Instruction_no_operation( void ) { __asm__ volatile ( "nop" ); @@ -71,6 +75,14 @@ static inline void _CPU_Use_thread_local_storage( (void) context; } +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + (void) context; + return NULL; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/src/gcovdumpinfo.c b/cpukit/score/src/gcovdumpinfo.c deleted file mode 100644 index be00df2db8..0000000000 --- a/cpukit/score/src/gcovdumpinfo.c +++ /dev/null @@ -1,96 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * @file - * - * @ingroup RTEMSScoreIO - * - * @brief This source file contains the implementation of _Gcov_Ddump_info(). - */ - -/* - * Copyright (C) 2021, 2022 embedded brains GmbH & Co. KG - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include <rtems/score/gcov.h> - -typedef struct { - IO_Put_char put_char; - void *arg; -} Gcov_Context; - -static void _Gcov_Dump( const void *data, unsigned length, void *arg ) -{ - Gcov_Context *ctx; - IO_Put_char put_char; - void *ctx_arg; - const char *in; - const void *end; - - ctx = arg; - in = data; - end = in + length; - put_char = ctx->put_char; - ctx_arg = ctx->arg; - - while ( in != end ) { - ( *put_char )( *in, ctx_arg ); - ++in; - } -} - -static void _Gcov_Filename( const char *filename, void *arg ) -{ - __gcov_filename_to_gcfn( filename, _Gcov_Dump, arg ); -} - -static void *_Gcov_Allocate( unsigned length, void *arg ) -{ - (void) length; - (void) arg; - return NULL; -} - -void _Gcov_Dump_info( IO_Put_char put_char, void *arg ) -{ - Gcov_Context ctx; - const struct gcov_info * const *item; - - ctx.put_char = put_char; - ctx.arg = arg; - - RTEMS_LINKER_SET_FOREACH( gcov_info, item ) { - __gcov_info_to_gcda( - *item, - _Gcov_Filename, - _Gcov_Dump, - _Gcov_Allocate, - &ctx - ); - } -} diff --git a/cpukit/score/src/gcovdumpinfobase64.c b/cpukit/score/src/gcovdumpinfobase64.c deleted file mode 100644 index b7a9849084..0000000000 --- a/cpukit/score/src/gcovdumpinfobase64.c +++ /dev/null @@ -1,104 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * @file - * - * @ingroup RTEMSScoreIO - * - * @brief This source file contains the implementation of - * _Gcov_Dump_info_base64(). - */ - -/* - * Copyright (C) 2021, 2022 embedded brains GmbH & Co. KG - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include <rtems/score/gcov.h> - -#include <limits.h> -#include <string.h> - -typedef struct { - IO_Put_char put_char; - void *arg; - int out; - size_t index; - char buf[ 57 ]; -} Gcov_Base64_context; - -static void _Gcov_Base64_put_char( int c, void *arg ) -{ - Gcov_Base64_context *ctx; - - ctx = arg; - - ( *ctx->put_char )( c, ctx->arg ); - ++ctx->out; - - if ( ctx->out >= 76 ) { - ctx->out = 0; - ( *ctx->put_char )( '\n', ctx->arg ); - } -} - -static void _Gcov_Base64_encode( int c, void *arg ) -{ - Gcov_Base64_context *ctx; - size_t index; - - ctx = arg; - index = ctx->index; - ctx->buf[ index ] = (char) c; - - if ( index == RTEMS_ARRAY_SIZE( ctx->buf ) - 1 ) { - index = 0; - _IO_Base64( - _Gcov_Base64_put_char, - ctx, - ctx->buf, - sizeof( ctx->buf ), - NULL, - INT_MAX - ); - } else { - ++index; - } - - ctx->index = index; -} - -void _Gcov_Dump_info_base64( IO_Put_char put_char, void *arg ) -{ - Gcov_Base64_context ctx; - - memset( &ctx, 0, sizeof( ctx ) ); - ctx.put_char = put_char; - ctx.arg = arg; - _Gcov_Dump_info( _Gcov_Base64_encode, &ctx ); - _IO_Base64( _Gcov_Base64_put_char, &ctx, ctx.buf, ctx.index, NULL, INT_MAX ); -} diff --git a/cpukit/score/src/gcovinfoset.c b/cpukit/score/src/gcovinfoset.c deleted file mode 100644 index cb22e8252b..0000000000 --- a/cpukit/score/src/gcovinfoset.c +++ /dev/null @@ -1,43 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * @file - * - * @ingroup RTEMSScoreIO - * - * @brief This source file contains the definition of the gcov information - * linker set. - */ - -/* - * Copyright (C) 2021, 2022 embedded brains GmbH & Co. KG - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include <rtems/score/gcov.h> - -RTEMS_LINKER_ROSET( gcov_info, const struct gcov_info * ); diff --git a/cpukit/score/src/hash.c b/cpukit/score/src/hash.c index dc9143f4c0..0b9f127e54 100644 --- a/cpukit/score/src/hash.c +++ b/cpukit/score/src/hash.c @@ -39,7 +39,7 @@ #include <rtems/score/hash.h> #include <rtems/score/assert.h> -#include <rtems/score/io.h> +#include <rtems/base64.h> #include <limits.h> @@ -64,7 +64,7 @@ void _Hash_Finalize( Hash_Context *context, Hash_Control *hash ) context->hash = hash; context->index = 0; hash->chars[ sizeof( *hash ) - 1 ] = '\0'; - n = _IO_Base64url( + n = _Base64url_Encode( _Hash_Put_char, context, digest, diff --git a/cpukit/score/src/iobase64.c b/cpukit/score/src/iobase64.c deleted file mode 100644 index 27b977c8a0..0000000000 --- a/cpukit/score/src/iobase64.c +++ /dev/null @@ -1,111 +0,0 @@ -/* SPDX-License-Identifier: ISC */ - -/** - * @file - * - * @ingroup RTEMSScoreIO - * - * @brief This source file contains the implementation of - * _IO_Base64() and _IO_Base64url(). - */ - -/* - * Copyright (C) 2020, 2021 embedded brains GmbH & Co. KG - * Copyright (C) 2004, 2005, 2007, 2009 Internet Systems Consortium, Inc. ("ISC") - * Copyright (C) 1998-2001, 2003 Internet Software Consortium. - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES WITH - * REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY - * AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE FOR ANY SPECIAL, DIRECT, - * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM - * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE - * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR - * PERFORMANCE OF THIS SOFTWARE. - */ - -#include <rtems/score/io.h> - -static void -_IO_Put(int c, void *arg, IO_Put_char put_char) -{ - (*put_char)(c, arg); -} - -static int -_IO_Base64_with_encoding(IO_Put_char put_char, void *arg, const void *src, - size_t srclen, const char *wordbreak, int wordlen, const char *encoding) -{ - unsigned int loops = 0; - const unsigned char *in = src; - int out = 0; - - if (wordlen < 4) { - wordlen = 4; - } - - while (srclen > 2) { - _IO_Put(encoding[(in[0]>>2)&0x3f], arg, put_char); - _IO_Put(encoding[((in[0]<<4)&0x30)| - ((in[1]>>4)&0x0f)], arg, put_char); - _IO_Put(encoding[((in[1]<<2)&0x3c)| - ((in[2]>>6)&0x03)], arg, put_char); - _IO_Put(encoding[in[2]&0x3f], arg, put_char); - in += 3; - srclen -= 3; - out += 4; - - loops++; - if (srclen != 0 && - (int)((loops + 1) * 4) >= wordlen) - { - const char *w = wordbreak; - loops = 0; - while (*w != '\0') { - _IO_Put(*w, arg, put_char); - ++w; - ++out; - } - } - } - if (srclen == 2) { - _IO_Put(encoding[(in[0]>>2)&0x3f], arg, put_char); - _IO_Put(encoding[((in[0]<<4)&0x30)| - ((in[1]>>4)&0x0f)], arg, put_char); - _IO_Put(encoding[((in[1]<<2)&0x3c)], arg, put_char); - _IO_Put('=', arg, put_char); - out += 4; - } else if (srclen == 1) { - _IO_Put(encoding[(in[0]>>2)&0x3f], arg, put_char); - _IO_Put(encoding[((in[0]<<4)&0x30)], arg, put_char); - _IO_Put('=', arg, put_char); - _IO_Put('=', arg, put_char); - out += 4; - } - return out; -} - -static const char base64[] = - "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/="; - -int -_IO_Base64(IO_Put_char put_char, void *arg, const void *src, size_t srclen, - const char *wordbreak, int wordlen) -{ - return _IO_Base64_with_encoding(put_char, arg, src, srclen, wordbreak, - wordlen, base64); -} - -static const char base64url[] = - "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789-_="; - -int -_IO_Base64url(IO_Put_char put_char, void *arg, const void *src, size_t srclen, - const char *wordbreak, int wordlen) -{ - return _IO_Base64_with_encoding(put_char, arg, src, srclen, wordbreak, - wordlen, base64url); -} diff --git a/cpukit/score/src/iorelax.c b/cpukit/score/src/iorelax.c deleted file mode 100644 index 1b155377a9..0000000000 --- a/cpukit/score/src/iorelax.c +++ /dev/null @@ -1,53 +0,0 @@ -/* SPDX-License-Identifier: BSD-2-Clause */ - -/** - * @file - * - * @ingroup RTEMSScoreIO - * - * @brief This source file contains the implementation of _IO_Relax(). - */ - -/* - * Copyright (C) 2021 embedded brains GmbH & Co. KG - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifdef HAVE_CONFIG_H -#include "config.h" -#endif - -#include <rtems/score/io.h> -#include <rtems/score/cpuimpl.h> - -void _IO_Relax( void ) -{ - _CPU_Instruction_no_operation(); - _CPU_Instruction_no_operation(); - _CPU_Instruction_no_operation(); - _CPU_Instruction_no_operation(); - _CPU_Instruction_no_operation(); - _CPU_Instruction_no_operation(); - _CPU_Instruction_no_operation(); - _CPU_Instruction_no_operation(); -} diff --git a/cpukit/score/src/iovprintf.c b/cpukit/score/src/iovprintf.c deleted file mode 100644 index 0e8eb0b47b..0000000000 --- a/cpukit/score/src/iovprintf.c +++ /dev/null @@ -1,377 +0,0 @@ -/** - * @file - * - * @ingroup RTEMSScoreIO - * - * @brief This source file contains the implementation of - * _IO_Vprintf(). - */ - -/*- - * SPDX-License-Identifier: BSD-3-Clause - * - * Copyright (c) 1986, 1988, 1991, 1993 - * The Regents of the University of California. All rights reserved. - * (c) UNIX System Laboratories, Inc. - * All or some portions of this file are derived from material licensed - * to the University of California by American Telephone and Telegraph - * Co. or Unix System Laboratories, Inc. and are reproduced herein with - * the permission of UNIX System Laboratories, Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * @(#)subr_prf.c 8.3 (Berkeley) 1/21/94 - */ - -#include <rtems/score/io.h> - -#include <sys/cdefs.h> -__FBSDID("$FreeBSD: head/sys/kern/subr_prf.c 336417 2018-07-17 14:56:54Z markj $"); - -#include <sys/param.h> -#include <string.h> - -/* Max number conversion buffer length: a intmax_t in base 8, plus NUL byte. */ -#define MAXNBUF (howmany(sizeof(intmax_t) * NBBY, 3) + 1) - -static inline int imax(int a, int b) { return (a > b ? a : b); } - -static char const hex2ascii_data[2][16] = { - { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', - 'a', 'b', 'c', 'd', 'e', 'f' }, - { '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', - 'A', 'B', 'C', 'D', 'E', 'F' } -}; - -static inline char -hex2ascii(int hex) -{ - - return (hex2ascii_data[0][hex]); -} - -/* - * Put a NUL-terminated ASCII number (base <= 16) in a buffer in reverse - * order; return an optional length and a pointer to the last character - * written in the buffer (i.e., the first character of the string). - * The buffer pointed to by `nbuf' must have length >= MAXNBUF. - */ -static char * -ksprintn(char *nbuf, uintmax_t num, int base, int *lenp, int upper) -{ - char *p; - - p = nbuf; - *p = '\0'; - do { - *++p = hex2ascii_data[upper][num % base]; - } while (num /= base); - if (lenp) - *lenp = p - nbuf; - return (p); -} - -int -_IO_Vprintf(IO_Put_char put_char, void *arg, char const *fmt, va_list ap) -{ -#define PCHAR(c) {int cc=(c); (*put_char)(cc, arg); retval++; } - char nbuf[MAXNBUF]; - const char *p, *percent, *q; - u_char *up; - int ch, n; - uintmax_t num; - int base, lflag, tmp, width, ladjust, sharpflag, neg, sign, dot; - int cflag, hflag, jflag; - RTEMS_STATIC_ASSERT(sizeof(intmax_t) == sizeof(long long), _IO_Vprintf_j); -#if __SIZEOF_PTRDIFF_T__ == __SIZEOF_LONG__ -#define tflag lflag -#else - int tflag; -#endif -#if __SIZEOF_SIZE_T__ == __SIZEOF_LONG__ -#define zflag lflag -#else - int zflag; -#endif - int dwidth, upper; - char padc; - int stop = 0, retval = 0; - - num = 0; - - if (fmt == NULL) - fmt = "(fmt null)\n"; - - for (;;) { - padc = ' '; - width = 0; - while ((ch = (u_char)*fmt++) != '%' || stop) { - if (ch == '\0') - return (retval); - PCHAR(ch); - } - percent = fmt - 1; - lflag = 0; ladjust = 0; sharpflag = 0; neg = 0; - sign = 0; dot = 0; dwidth = 0; upper = 0; - cflag = 0; hflag = 0; jflag = 0; tflag = 0; zflag = 0; -reswitch: switch (ch = (u_char)*fmt++) { - case '.': - dot = 1; - goto reswitch; - case '#': - sharpflag = 1; - goto reswitch; - case '+': - sign = 1; - goto reswitch; - case '-': - ladjust = 1; - goto reswitch; - case '%': - PCHAR(ch); - break; - case '*': - if (!dot) { - width = va_arg(ap, int); - if (width < 0) { - ladjust = !ladjust; - width = -width; - } - } else { - dwidth = va_arg(ap, int); - } - goto reswitch; - case '0': - if (!dot) { - padc = '0'; - goto reswitch; - } - /* FALLTHROUGH */ - case '1': case '2': case '3': case '4': - case '5': case '6': case '7': case '8': case '9': - for (n = 0;; ++fmt) { - n = n * 10 + ch - '0'; - ch = *fmt; - if (ch < '0' || ch > '9') - break; - } - if (dot) - dwidth = n; - else - width = n; - goto reswitch; - case 'c': - width -= 1; - - if (!ladjust && width > 0) - while (width--) - PCHAR(padc); - PCHAR(va_arg(ap, int)); - if (ladjust && width > 0) - while (width--) - PCHAR(padc); - break; - case 'D': - up = va_arg(ap, u_char *); - p = va_arg(ap, char *); - if (!width) - width = 16; - while(width--) { - PCHAR(hex2ascii(*up >> 4)); - PCHAR(hex2ascii(*up & 0x0f)); - up++; - if (width) - for (q=p;*q;q++) - PCHAR(*q); - } - break; - case 'd': - case 'i': - base = 10; - sign = 1; - goto handle_sign; - case 'h': - if (hflag) { - hflag = 0; - cflag = 1; - } else - hflag = 1; - goto reswitch; - case 'j': - jflag = 1; - goto reswitch; - case 'l': - if (lflag) { - jflag = 1; - } else - lflag = 1; - goto reswitch; - case 'o': - base = 8; - goto handle_nosign; - case 'p': - base = 16; - sharpflag = (width == 0); - sign = 0; - num = (uintptr_t)va_arg(ap, void *); - goto number; - case 's': - p = va_arg(ap, char *); - if (p == NULL) - p = "(null)"; - if (!dot) - n = strlen (p); - else - for (n = 0; n < dwidth && p[n]; n++) - continue; - - width -= n; - - if (!ladjust && width > 0) - while (width--) - PCHAR(padc); - while (n--) - PCHAR(*p++); - if (ladjust && width > 0) - while (width--) - PCHAR(padc); - break; - case 't': - tflag = 1; - goto reswitch; - case 'u': - base = 10; - goto handle_nosign; - case 'X': - upper = 1; - case 'x': - base = 16; - goto handle_nosign; - case 'y': - base = 16; - sign = 1; - goto handle_sign; - case 'z': - zflag = 1; - goto reswitch; -handle_nosign: - sign = 0; - if (jflag) - num = va_arg(ap, uintmax_t); -#if __SIZEOF_PTRDIFF_T__ != __SIZEOF_LONG__ - else if (tflag) - num = va_arg(ap, ptrdiff_t); -#endif - else if (lflag) - num = va_arg(ap, u_long); -#if __SIZEOF_SIZE_T__ != __SIZEOF_LONG__ - else if (zflag) - num = va_arg(ap, size_t); -#endif - else if (hflag) - num = (u_short)va_arg(ap, int); - else if (cflag) - num = (u_char)va_arg(ap, int); - else - num = va_arg(ap, u_int); - goto number; -handle_sign: - if (jflag) - num = va_arg(ap, intmax_t); -#if __SIZEOF_PTRDIFF_T__ == __SIZEOF_LONG__ - else if (tflag) - num = va_arg(ap, ptrdiff_t); -#endif - else if (lflag) - num = va_arg(ap, long); -#if __SIZEOF_SIZE_T__ == __SIZEOF_LONG__ - else if (zflag) - num = va_arg(ap, ssize_t); -#endif - else if (hflag) - num = (short)va_arg(ap, int); - else if (cflag) - num = (char)va_arg(ap, int); - else - num = va_arg(ap, int); -number: - if (sign && (intmax_t)num < 0) { - neg = 1; - num = -(intmax_t)num; - } - p = ksprintn(nbuf, num, base, &n, upper); - tmp = 0; - if (sharpflag && num != 0) { - if (base == 8) - tmp++; - else if (base == 16) - tmp += 2; - } - if (neg) - tmp++; - - if (!ladjust && padc == '0') - dwidth = width - tmp; - width -= tmp + imax(dwidth, n); - dwidth -= n; - if (!ladjust) - while (width-- > 0) - PCHAR(' '); - if (neg) - PCHAR('-'); - if (sharpflag && num != 0) { - if (base == 8) { - PCHAR('0'); - } else if (base == 16) { - PCHAR('0'); - PCHAR('x'); - } - } - while (dwidth-- > 0) - PCHAR('0'); - - while (*p) - PCHAR(*p--); - - if (ladjust) - while (width-- > 0) - PCHAR(' '); - - break; - default: - while (percent < fmt) - PCHAR(*percent++); - /* - * Since we ignore a formatting argument it is no - * longer safe to obey the remaining formatting - * arguments as the arguments will no longer match - * the format specs. - */ - stop = 1; - break; - } - } -#undef PCHAR -} diff --git a/cpukit/score/src/isr.c b/cpukit/score/src/isr.c index 75df00e228..7337028b0f 100644 --- a/cpukit/score/src/isr.c +++ b/cpukit/score/src/isr.c @@ -44,6 +44,8 @@ #include <rtems/score/percpu.h> #include <rtems/config.h> +const char * const volatile _ISR_Stack_size_object = _ISR_Stack_size; + void _ISR_Handler_initialization( void ) { uint32_t cpu_max; diff --git a/cpukit/score/src/objectextendinformation.c b/cpukit/score/src/objectextendinformation.c index 414766f219..9a627b1a7c 100644 --- a/cpukit/score/src/objectextendinformation.c +++ b/cpukit/score/src/objectextendinformation.c @@ -59,7 +59,7 @@ Objects_Maximum _Objects_Extend_information( uint32_t index_base; uint32_t index_end; uint32_t index; - Objects_Maximum extend_count; + uint32_t extend_count; Objects_Maximum old_maximum; uint32_t new_maximum; size_t object_block_size; diff --git a/cpukit/score/src/objectinitializeinformation.c b/cpukit/score/src/objectinitializeinformation.c index 3482f2871e..7c1bfd877f 100644 --- a/cpukit/score/src/objectinitializeinformation.c +++ b/cpukit/score/src/objectinitializeinformation.c @@ -42,7 +42,6 @@ #include <rtems/score/objectimpl.h> #include <rtems/score/address.h> #include <rtems/score/chainimpl.h> -#include <rtems/score/interr.h> #include <rtems/score/sysstate.h> void _Objects_Initialize_information( diff --git a/cpukit/score/src/processormaskcopy.c b/cpukit/score/src/processormaskcopy.c index 863bd1574e..3f1c2cf250 100644 --- a/cpukit/score/src/processormaskcopy.c +++ b/cpukit/score/src/processormaskcopy.c @@ -39,7 +39,7 @@ #include "config.h" #endif -#include <rtems/score/processormask.h> +#include <rtems/score/processormaskimpl.h> const Processor_mask _Processor_mask_The_one_and_only = { .__bits[ 0 ] = 1 }; diff --git a/cpukit/score/src/threadchangepriority.c b/cpukit/score/src/threadchangepriority.c index ca49f6f417..78291b7798 100644 --- a/cpukit/score/src/threadchangepriority.c +++ b/cpukit/score/src/threadchangepriority.c @@ -111,6 +111,7 @@ static void _Thread_Priority_action_change( void *arg ) { + (void) arg; _Thread_Set_scheduler_node_priority( priority_aggregation, priority_group_order diff --git a/cpukit/score/src/threadq.c b/cpukit/score/src/threadq.c index e694029a46..3c6d72bd14 100644 --- a/cpukit/score/src/threadq.c +++ b/cpukit/score/src/threadq.c @@ -179,5 +179,7 @@ void _Thread_queue_MP_callout_do_nothing( ) { /* Do nothing */ + (void) the_proxy; + (void) mp_id; } #endif diff --git a/cpukit/score/src/threadqenqueue.c b/cpukit/score/src/threadqenqueue.c index e43efd925b..038c483f65 100644 --- a/cpukit/score/src/threadqenqueue.c +++ b/cpukit/score/src/threadqenqueue.c @@ -400,6 +400,7 @@ void _Thread_queue_Deadlock_status( Thread_Control *the_thread ) void _Thread_queue_Deadlock_fatal( Thread_Control *the_thread ) { + (void) the_thread; _Internal_error( INTERNAL_ERROR_THREAD_QUEUE_DEADLOCK ); } diff --git a/cpukit/score/src/threadqops.c b/cpukit/score/src/threadqops.c index 83e00ca3ae..9a09b4c442 100644 --- a/cpukit/score/src/threadqops.c +++ b/cpukit/score/src/threadqops.c @@ -156,6 +156,8 @@ static void _Thread_queue_FIFO_do_initialize( { Scheduler_Node *scheduler_node; + (void) queue; + (void) queue_context; scheduler_node = _Thread_Scheduler_get_home_node( the_thread ); _Chain_Initialize_node( &scheduler_node->Wait.Priority.Node.Node.Chain ); @@ -291,6 +293,7 @@ static Thread_queue_Priority_queue *_Thread_queue_Priority_queue_by_index( ) { #if defined(RTEMS_SMP) + _Assert( scheduler_index < _Scheduler_Count ); return &heads->Priority[ scheduler_index ]; #else (void) scheduler_index; diff --git a/cpukit/score/src/threadqtimeout.c b/cpukit/score/src/threadqtimeout.c index acb3c1d048..e30a2ffded 100644 --- a/cpukit/score/src/threadqtimeout.c +++ b/cpukit/score/src/threadqtimeout.c @@ -53,6 +53,7 @@ void _Thread_queue_Add_timeout_ticks( { Watchdog_Interval ticks; + (void) queue; ticks = queue_context->Timeout.ticks; if ( ticks != WATCHDOG_NO_TIMEOUT ) { diff --git a/cpukit/score/src/threadrestart.c b/cpukit/score/src/threadrestart.c index 16b09a96eb..72326682ca 100644 --- a/cpukit/score/src/threadrestart.c +++ b/cpukit/score/src/threadrestart.c @@ -46,10 +46,8 @@ #include <rtems/score/apimutex.h> #include <rtems/score/assert.h> #include <rtems/score/chainimpl.h> -#include <rtems/score/freechainimpl.h> #include <rtems/score/isrlock.h> #include <rtems/score/schedulerimpl.h> -#include <rtems/score/stackimpl.h> #include <rtems/score/sysstate.h> #include <rtems/score/threadqimpl.h> #include <rtems/score/userextimpl.h> @@ -85,6 +83,7 @@ static Thread_Control *_Thread_Join_flush_filter( { Thread_Join_context *join_context; + (void) queue; join_context = (Thread_Join_context *) queue_context; the_thread->Wait.return_argument = join_context->exit_value; diff --git a/cpukit/score/src/tlsallocsize.c b/cpukit/score/src/tlsallocsize.c index f78239192c..fa28391b83 100644 --- a/cpukit/score/src/tlsallocsize.c +++ b/cpukit/score/src/tlsallocsize.c @@ -10,7 +10,7 @@ */ /* - * Copyright (C) 2014, 2022 embedded brains GmbH & Co. KG + * Copyright (C) 2014, 2023 embedded brains GmbH & Co. KG * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -42,14 +42,47 @@ #include <rtems/score/interr.h> #include <rtems/score/thread.h> +extern char _TLS_Data_begin[]; + +extern char _TLS_Data_size[]; + +extern char _TLS_BSS_begin[]; + +extern char _TLS_BSS_size[]; + +extern char _TLS_Size[]; + +/** + * @brief The TLS section alignment. + * + * This symbol is provided by the linker command file as the maximum alignment + * of the .tdata and .tbss sections. The linker ensures that the first TLS + * output section is aligned to the maximum alignment of all TLS output + * sections, see function _bfd_elf_tls_setup() in bfd/elflink.c of the GNU + * Binutils sources. The linker command file must take into account the case + * that the .tdata section is empty and the .tbss section is non-empty. + */ +extern char _TLS_Alignment[]; + +const volatile TLS_Configuration _TLS_Configuration = { + .data_begin = _TLS_Data_begin, + .data_size = _TLS_Data_size, + .bss_begin = _TLS_BSS_begin, + .bss_size = _TLS_BSS_size, + .size = _TLS_Size, + .alignment = _TLS_Alignment +}; + static uintptr_t _TLS_Allocation_size; uintptr_t _TLS_Get_allocation_size( void ) { - uintptr_t size; - uintptr_t allocation_size; + const volatile TLS_Configuration *config; + uintptr_t size; + uintptr_t allocation_size; - size = _TLS_Get_size(); + config = &_TLS_Configuration; + size = (uintptr_t) config->size; if ( size == 0 ) { return 0; @@ -66,7 +99,7 @@ uintptr_t _TLS_Get_allocation_size( void ) * shall meet the stack alignment requirement. */ stack_align = CPU_STACK_ALIGNMENT; - tls_align = RTEMS_ALIGN_UP( (uintptr_t) _TLS_Alignment, stack_align ); + tls_align = RTEMS_ALIGN_UP( (uintptr_t) config->alignment, stack_align ); #ifndef __i386__ /* Reserve space for the dynamic thread vector */ diff --git a/cpukit/score/src/userextiterate.c b/cpukit/score/src/userextiterate.c index 25f0f9658b..cae76d173c 100644 --- a/cpukit/score/src/userextiterate.c +++ b/cpukit/score/src/userextiterate.c @@ -47,8 +47,6 @@ #include <rtems/score/userextimpl.h> -#include <pthread.h> - User_extensions_List _User_extensions_List = { CHAIN_INITIALIZER_EMPTY( _User_extensions_List.Active ), CHAIN_ITERATOR_REGISTRY_INITIALIZER( _User_extensions_List.Iterators ) @@ -120,6 +118,8 @@ void _User_extensions_Thread_begin_visitor( { User_extensions_thread_begin_extension callout = callouts->thread_begin; + (void) arg; + if ( callout != NULL ) { (*callout)( executing ); } |