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-rw-r--r--cpukit/score/src/percpustatewait.c45
1 files changed, 29 insertions, 16 deletions
diff --git a/cpukit/score/src/percpustatewait.c b/cpukit/score/src/percpustatewait.c
index 9d9f590df5..54ab92427f 100644
--- a/cpukit/score/src/percpustatewait.c
+++ b/cpukit/score/src/percpustatewait.c
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
/**
* @file
*
@@ -8,17 +10,28 @@
*/
/*
- * Copyright (c) 2014 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2014 embedded brains GmbH & Co. KG
*
- * embedded brains GmbH
- * Dornierstr. 4
- * 82178 Puchheim
- * Germany
- * <rtems@embedded-brains.de>
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
*
- * The license and distribution terms for this file may be
- * found in the file LICENSE in this distribution or at
- * http://www.rtems.org/license/LICENSE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
*/
#ifdef HAVE_CONFIG_H
@@ -33,8 +46,11 @@ bool _Per_CPU_State_wait_for_non_initial_state(
uint32_t timeout_in_ns
)
{
- const Per_CPU_Control *cpu = _Per_CPU_Get_by_index( cpu_index );
- Per_CPU_State state = cpu->state;
+ const Per_CPU_Control *cpu;
+ Per_CPU_State state;
+
+ cpu = _Per_CPU_Get_by_index( cpu_index );
+ state = _Per_CPU_Get_state( cpu );
if ( timeout_in_ns > 0 ) {
rtems_counter_ticks ticks =
@@ -45,19 +61,16 @@ bool _Per_CPU_State_wait_for_non_initial_state(
while ( ticks > delta && state == PER_CPU_STATE_INITIAL ) {
rtems_counter_ticks b;
- _CPU_SMP_Processor_event_receive();
- state = cpu->state;
+ state = _Per_CPU_Get_state( cpu );
ticks -= delta;
-
b = rtems_counter_read();
delta = rtems_counter_difference( b, a );
a = b;
}
} else {
while ( state == PER_CPU_STATE_INITIAL ) {
- _CPU_SMP_Processor_event_receive();
- state = cpu->state;
+ state = _Per_CPU_Get_state( cpu );
}
}