5 files changed, 46 insertions, 0 deletions
diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
index 7020261619..ed1b605d09 100644
--- a/cpukit/score/cpu/arm/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
@@ -443,6 +443,20 @@ void _CPU_Context_validate( uintptr_t pattern );
   #define _CPU_Context_switch_to_first_task_smp( _context ) \
     _CPU_Context_restore( _context )
 
+  RTEMS_COMPILER_PURE_ATTRIBUTE static inline uint32_t
+    _CPU_SMP_Get_current_processor( void )
+  {
+    uint32_t mpidr;
+
+    /* Use ARMv7 Multiprocessor Affinity Register (MPIDR) */
+    __asm__ volatile (
+      "mrc p15, 0, %[mpidr], c0, c0, 5\n"
+      : [mpidr] "=&r" (mpidr)
+    );
+
+    return mpidr & 0xffU;
+  }
+
   static inline void _ARM_Data_memory_barrier( void )
   {
     __asm__ volatile ( "dmb" : : : "memory" );
diff --git a/cpukit/score/cpu/i386/rtems/score/cpu.h b/cpukit/score/cpu/i386/rtems/score/cpu.h
index 3f7a331c3f..b00ae3bfd8 100644
--- a/cpukit/score/cpu/i386/rtems/score/cpu.h
+++ b/cpukit/score/cpu/i386/rtems/score/cpu.h
@@ -455,6 +455,8 @@ uint32_t   _CPU_ISR_Get_level( void );
   #define _CPU_Context_switch_to_first_task_smp( _the_context ) \
      _CPU_Context_restore( (_the_context) );
 
+  RTEMS_COMPILER_PURE_ATTRIBUTE uint32_t _CPU_SMP_Get_current_processor( void );
+
   static inline void _CPU_Processor_event_broadcast( void )
   {
     __asm__ volatile ( "" : : : "memory" );
diff --git a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
index e2c6d94c10..d368e51c5f 100644
--- a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
+++ b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
@@ -1404,6 +1404,19 @@ static inline uint32_t CPU_swap_u32(
 
 #ifdef RTEMS_SMP
   /**
+   * @brief Returns the index of the current processor.
+   *
+   * An architecture specific method must be used to obtain the index of the
+   * current processor in the system.  The set of processor indices is the
+   * range of integers starting with zero up to the processor count minus one.
+   */
+  RTEMS_COMPILER_PURE_ATTRIBUTE static inline uint32_t
+    _CPU_SMP_Get_current_processor( void )
+  {
+    return 123;
+  }
+
+  /**
    * @brief Broadcasts a processor event.
    *
    * Some architectures provide a low-level synchronization primitive for
diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
index e3c40981b5..8362c64b3f 100644
--- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
@@ -1000,6 +1000,21 @@ void _CPU_Context_validate( uintptr_t pattern );
   #define _CPU_Context_switch_to_first_task_smp( _context ) \
     _CPU_Context_restore( _context )
 
+  RTEMS_COMPILER_PURE_ATTRIBUTE static inline uint32_t
+    _CPU_SMP_Get_current_processor( void )
+  {
+    uint32_t pir;
+
+    /* Use Book E Processor ID Register (PIR) */
+    __asm__ volatile (
+      "mfspr %[pir], 286"
+      : [pir] "=&r" (pir)
+    );
+
+    return pir;
+  }
+
+
   static inline void _CPU_Processor_event_broadcast( void )
   {
     __asm__ volatile ( "" : : : "memory" );
diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h
index defc01a779..e4eb65e88a 100644
--- a/cpukit/score/cpu/sparc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h
@@ -1186,6 +1186,8 @@ void _CPU_Context_restore(
     Context_Control *new_context
   );
 
+  RTEMS_COMPILER_PURE_ATTRIBUTE uint32_t _CPU_SMP_Get_current_processor( void );
+
   static inline void _CPU_Processor_event_broadcast( void )
   {
     __asm__ volatile ( "" : : : "memory" );