diff options
Diffstat (limited to 'cpukit/score/cpu/sparc/rtems')
-rw-r--r-- | cpukit/score/cpu/sparc/rtems/score/cpu.h | 2 | ||||
-rw-r--r-- | cpukit/score/cpu/sparc/rtems/score/sparc.h | 44 |
2 files changed, 45 insertions, 1 deletions
diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h index 532d8824fc..c01000584f 100644 --- a/cpukit/score/cpu/sparc/rtems/score/cpu.h +++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h @@ -1192,7 +1192,7 @@ register struct Per_CPU_Control *_SPARC_Per_CPU_current __asm__( "g6" ); void _CPU_SMP_Finalize_initialization( uint32_t cpu_count ); - #if defined(__leon__) + #if defined(__leon__) && !defined(RTEMS_PARAVIRT) static inline uint32_t _CPU_SMP_Get_current_processor( void ) { return _LEON3_Get_current_processor(); diff --git a/cpukit/score/cpu/sparc/rtems/score/sparc.h b/cpukit/score/cpu/sparc/rtems/score/sparc.h index 75f6d96e74..abd0f8b987 100644 --- a/cpukit/score/cpu/sparc/rtems/score/sparc.h +++ b/cpukit/score/cpu/sparc/rtems/score/sparc.h @@ -164,17 +164,37 @@ extern "C" { * * This macro returns the current contents of the PSR register in @a _psr. */ +#if defined(RTEMS_PARAVIRT) + +uint32_t _SPARC_Get_PSR( void ); + +#define sparc_get_psr( _psr ) \ + (_psr) = _SPARC_Get_PSR() + +#else /* RTEMS_PARAVIRT */ + #define sparc_get_psr( _psr ) \ do { \ (_psr) = 0; \ __asm__ volatile( "rd %%psr, %0" : "=r" (_psr) : "0" (_psr) ); \ } while ( 0 ) +#endif /* RTEMS_PARAVIRT */ + /** * @brief Macro to set the PSR. * * This macro sets the PSR register to the value in @a _psr. */ +#if defined(RTEMS_PARAVIRT) + +void _SPARC_Set_PSR( uint32_t new_psr ); + +#define sparc_set_psr( _psr ) \ + _SPARC_Set_PSR( _psr ) + +#else /* RTEMS_PARAVIRT */ + #define sparc_set_psr( _psr ) \ do { \ __asm__ volatile ( "mov %0, %%psr " : "=r" ((_psr)) : "0" ((_psr)) ); \ @@ -183,27 +203,51 @@ extern "C" { nop(); \ } while ( 0 ) +#endif /* RTEMS_PARAVIRT */ + /** * @brief Macro to obtain the TBR. * * This macro returns the current contents of the TBR register in @a _tbr. */ +#if defined(RTEMS_PARAVIRT) + +uint32_t _SPARC_Get_TBR( void ); + +#define sparc_get_tbr( _tbr ) \ + (_tbr) = _SPARC_Get_TBR() + +#else /* RTEMS_PARAVIRT */ + #define sparc_get_tbr( _tbr ) \ do { \ (_tbr) = 0; /* to avoid unitialized warnings */ \ __asm__ volatile( "rd %%tbr, %0" : "=r" (_tbr) : "0" (_tbr) ); \ } while ( 0 ) +#endif /* RTEMS_PARAVIRT */ + /** * @brief Macro to set the TBR. * * This macro sets the TBR register to the value in @a _tbr. */ +#if defined(RTEMS_PARAVIRT) + +void _SPARC_Set_TBR( uint32_t new_tbr ); + +#define sparc_set_tbr( _tbr ) \ + _SPARC_Set_TBR((_tbr)) + +#else /* RTEMS_PARAVIRT */ + #define sparc_set_tbr( _tbr ) \ do { \ __asm__ volatile( "wr %0, 0, %%tbr" : "=r" (_tbr) : "0" (_tbr) ); \ } while ( 0 ) +#endif /* RTEMS_PARAVIRT */ + /** * @brief Macro to obtain the WIM. * |