diff options
Diffstat (limited to 'cpukit/score/cpu/sh/rtems/score')
-rw-r--r-- | cpukit/score/cpu/sh/rtems/score/cpu.h | 20 | ||||
-rw-r--r-- | cpukit/score/cpu/sh/rtems/score/sh.h | 34 | ||||
-rw-r--r-- | cpukit/score/cpu/sh/rtems/score/sh_io.h | 4 |
3 files changed, 29 insertions, 29 deletions
diff --git a/cpukit/score/cpu/sh/rtems/score/cpu.h b/cpukit/score/cpu/sh/rtems/score/cpu.h index 56b651fa4a..6962414fbe 100644 --- a/cpukit/score/cpu/sh/rtems/score/cpu.h +++ b/cpukit/score/cpu/sh/rtems/score/cpu.h @@ -14,7 +14,7 @@ * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * + * * * COPYRIGHT (c) 1998-2006. * On-Line Applications Research Corporation (OAR). @@ -125,11 +125,11 @@ extern "C" { /* * We define the interrupt stack in the linker script */ -#define CPU_ALLOCATE_INTERRUPT_STACK FALSE +#define CPU_ALLOCATE_INTERRUPT_STACK FALSE /* * Does the RTEMS invoke the user's ISR with the vector number and - * a pointer to the saved interrupt frame (1) or just the vector + * a pointer to the saved interrupt frame (1) or just the vector * number (0)? */ @@ -293,7 +293,7 @@ extern "C" { #define CPU_BIG_ENDIAN TRUE #define CPU_LITTLE_ENDIAN FALSE #endif - + /* * The following defines the number of bits actually used in the * interrupt field of the task mode. How those bits map to the @@ -374,7 +374,7 @@ typedef struct { uint32_t *r0; /* arg return */ uint32_t gbr; - uint32_t sr; + uint32_t sr; } Context_Control; @@ -536,9 +536,9 @@ SCORE_EXTERN void CPU_delay( uint32_t microseconds ); * * SH Specific Information: NONE */ - + #define _CPU_Initialize_vectors() - + /* * Disable all interrupts for an RTEMS critical section. The previous * level is returned in _level. @@ -607,7 +607,7 @@ uint32_t _CPU_ISR_Get_level( void ); * where the PSR contains an enable FPU bit. */ -/* +/* * FIXME: defined as a function for debugging - should be a macro */ SCORE_EXTERN void _CPU_Context_Initialize( @@ -818,10 +818,10 @@ void _CPU_Initialize(void); /* * _CPU_ISR_install_raw_handler * - * This routine installs a "raw" interrupt handler directly into the + * This routine installs a "raw" interrupt handler directly into the * processor's vector table. */ - + void _CPU_ISR_install_raw_handler( uint32_t vector, proc_ptr new_handler, diff --git a/cpukit/score/cpu/sh/rtems/score/sh.h b/cpukit/score/cpu/sh/rtems/score/sh.h index 32b7d6b05a..160dc60e8e 100644 --- a/cpukit/score/cpu/sh/rtems/score/sh.h +++ b/cpukit/score/cpu/sh/rtems/score/sh.h @@ -14,7 +14,7 @@ * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE - * + * * * COPYRIGHT (c) 1998-2001. * On-Line Applications Research Corporation (OAR). @@ -36,14 +36,14 @@ extern "C" { /* * This file contains the information required to build * RTEMS for a particular member of the "SH" family. - * + * * It does this by setting variables to indicate which implementation * dependent features are present in a particular member of the family. */ /* - * Figure out all CPU Model Feature Flags based upon compiler - * predefines. + * Figure out all CPU Model Feature Flags based upon compiler + * predefines. */ #if defined(__SH2E__) || defined(__SH3E__) @@ -53,7 +53,7 @@ extern "C" { #elif defined(__SH4__) || defined(__SH4_SINGLE_ONLY__) -/* +/* * Define this if you want to use XD-registers. * Then this registers will be saved/restored on context switch. * ! They will not be saved/restored on interrupts! @@ -68,7 +68,7 @@ extern "C" { #define SH_HAS_FPU 0 #endif -#elif defined(__sh1__) || defined(__sh2__) || defined(__sh3__) +#elif defined(__sh1__) || defined(__sh2__) || defined(__sh3__) #define SH_HAS_FPU 0 #else #warning Cannot detect FPU support, assuming no FPU @@ -108,7 +108,7 @@ extern "C" { "stc sr,%0\n\t" \ "ldc %1,sr\n\t"\ : "=&r" (_level ) \ - : "r" (SH_IRQDIS_VALUE) ); + : "r" (SH_IRQDIS_VALUE) ); #define sh_enable_interrupts( _level ) \ asm volatile( "ldc %0,sr\n\t" \ @@ -121,7 +121,7 @@ extern "C" { * sections into two or more parts. The parameter _level is not * modified. */ - + #define sh_flash_interrupts( _level ) \ asm volatile( \ "ldc %1,sr\n\t" \ @@ -142,7 +142,7 @@ extern "C" { "ldc r5,sr\n\t"\ : "=&r" (_level ) \ : "r" (SH_IRQDIS_MASK) \ - : "r5" ); + : "r5" ); #define sh_enable_interrupts( _level ) \ asm volatile( "ldc %0,sr\n\t" \ @@ -155,7 +155,7 @@ extern "C" { * sections into two or more parts. The parameter _level is not * modified. */ - + #define sh_flash_interrupts( _level ) \ asm volatile( \ "stc sr,r5\n\t" \ @@ -189,18 +189,18 @@ extern "C" { * The following routine swaps the endian format of an unsigned int. * It must be static because it is referenced indirectly. */ - + static inline uint32_t sh_swap_u32( uint32_t value ) { register uint32_t swapped; - - asm volatile ( + + asm volatile ( "swap.b %1,%0; " "swap.w %0,%0; " - "swap.b %0,%0" - : "=r" (swapped) + "swap.b %0,%0" + : "=r" (swapped) : "r" (value) ); return( swapped ); @@ -220,8 +220,8 @@ static inline uint16_t sh_swap_u16( #define CPU_swap_u32( value ) sh_swap_u32( value ) #define CPU_swap_u16( value ) sh_swap_u16( value ) -extern unsigned int sh_set_irq_priority( - unsigned int irq, +extern unsigned int sh_set_irq_priority( + unsigned int irq, unsigned int prio ); #endif /* !ASM */ diff --git a/cpukit/score/cpu/sh/rtems/score/sh_io.h b/cpukit/score/cpu/sh/rtems/score/sh_io.h index e3f91bdcde..2b58aae62a 100644 --- a/cpukit/score/cpu/sh/rtems/score/sh_io.h +++ b/cpukit/score/cpu/sh/rtems/score/sh_io.h @@ -16,7 +16,7 @@ * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * + * * * COPYRIGHT (c) 1998-2001. * On-Line Applications Research Corporation (OAR). @@ -30,7 +30,7 @@ #ifndef _RTEMS_SCORE_SH_IO_H #define _RTEMS_SCORE_SH_IO_H - + #define readb(addr) (*(volatile unsigned char *) (addr)) #define readw(addr) (*(volatile unsigned short *) (addr)) #define readl(addr) (*(volatile unsigned int *) (addr)) |