diff options
Diffstat (limited to 'cpukit/score/cpu/powerpc')
| -rw-r--r-- | cpukit/score/cpu/powerpc/cpu.c | 33 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/include/rtems/asm.h | 10 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h | 29 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/include/rtems/score/cpu.h | 69 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/include/rtems/score/cpuatomic.h | 14 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h | 56 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h | 26 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/include/rtems/score/powerpc.h | 27 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/ppc-context-validate.S | 106 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S | 31 | ||||
| -rw-r--r-- | cpukit/score/cpu/powerpc/ppc-isr-disable-mask.S | 31 |
11 files changed, 331 insertions, 101 deletions
diff --git a/cpukit/score/cpu/powerpc/cpu.c b/cpukit/score/cpu/powerpc/cpu.c index 41f1c202cc..7c90ac28dc 100644 --- a/cpukit/score/cpu/powerpc/cpu.c +++ b/cpukit/score/cpu/powerpc/cpu.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -5,11 +7,28 @@ */ /* - * Copyright (C) 2009, 2017 embedded brains GmbH. + * Copyright (C) 2009, 2017 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ /* @@ -60,8 +79,10 @@ PPC_ASSERT_OFFSET(isr_dispatch_disable, ISR_DISPATCH_DISABLE); #endif #ifdef PPC_MULTILIB_ALTIVEC + PPC_ASSERT_OFFSET(vrsave, VRSAVE); + PPC_ASSERT_OFFSET(vscr, VSCR); RTEMS_STATIC_ASSERT( - PPC_CONTEXT_OFFSET_V20 % 16 == 0, + PPC_CONTEXT_OFFSET_V20 % PPC_DEFAULT_CACHE_LINE_SIZE == 0, ppc_context_altivec ); PPC_ASSERT_OFFSET(v20, V20); @@ -76,7 +97,6 @@ PPC_ASSERT_OFFSET(isr_dispatch_disable, ISR_DISPATCH_DISABLE); PPC_ASSERT_OFFSET(v29, V29); PPC_ASSERT_OFFSET(v30, V30); PPC_ASSERT_OFFSET(v31, V31); - PPC_ASSERT_OFFSET(vrsave, VRSAVE); #endif #ifdef PPC_MULTILIB_FPU @@ -338,4 +358,5 @@ void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) : "r" (source), "r" (error) : "memory" ); + RTEMS_UNREACHABLE(); } diff --git a/cpukit/score/cpu/powerpc/include/rtems/asm.h b/cpukit/score/cpu/powerpc/include/rtems/asm.h index 27af64e724..94f54245b4 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/asm.h +++ b/cpukit/score/cpu/powerpc/include/rtems/asm.h @@ -75,23 +75,21 @@ #define __PROC_LABEL_PREFIX__ __USER_LABEL_PREFIX__ #endif -#include <rtems/concat.h> - /* Use the right prefix for global labels. */ -#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x) +#define SYM(x) RTEMS_XCONCAT (__USER_LABEL_PREFIX__, x) /* Use the right prefix for procedure labels. */ -#define PROC(x) CONCAT1 (__PROC_LABEL_PREFIX__, x) +#define PROC(x) RTEMS_XCONCAT (__PROC_LABEL_PREFIX__, x) /* Use the right prefix for registers. */ -#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x) +#define REG(x) RTEMS_XCONCAT (__REGISTER_PREFIX__, x) /* Use the right prefix for floating point registers. */ -#define FREG(x) CONCAT1 (__FLOAT_REGISTER_PREFIX__, x) +#define FREG(x) RTEMS_XCONCAT (__FLOAT_REGISTER_PREFIX__, x) /* * define macros for all of the registers on this CPU diff --git a/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h b/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h index 5dad87016d..271dcc36af 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h +++ b/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -16,9 +18,26 @@ * Surrey Satellite Technology Limited * * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef _RTEMS_POWERPC_REGISTERS_H @@ -522,8 +541,8 @@ lidate */ #define FSL_EIS_MAS0 624 #define FSL_EIS_MAS0_TLBSEL (1 << (63 - 35)) -#define FSL_EIS_MAS0_ESEL(n) ((0xf & (n)) << (63 - 47)) -#define FSL_EIS_MAS0_ESEL_GET(m) (((m) >> (63 - 47)) & 0xf) +#define FSL_EIS_MAS0_ESEL(n) ((0xfff & (n)) << (63 - 47)) +#define FSL_EIS_MAS0_ESEL_GET(m) (((m) >> (63 - 47)) & 0xfff) #define FSL_EIS_MAS0_NV (1 << (63 - 63)) #define FSL_EIS_MAS1 625 diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h index 9cb47bcaa6..6f2fe491e9 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpu.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -27,11 +29,28 @@ * * Copyright (c) 2001 Surrey Satellite Technology Limited (SSTL). * - * Copyright (c) 2010, 2017 embedded brains GmbH. + * Copyright (C) 2010, 2020 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef _RTEMS_SCORE_CPU_H @@ -227,6 +246,13 @@ typedef struct { uint32_t isr_dispatch_disable; uint32_t reserved_for_alignment; #if defined(PPC_MULTILIB_ALTIVEC) + #if !defined(__powerpc64__) + uint32_t reserved_for_alignment_2[4]; + #endif + uint32_t vrsave; + uint32_t reserved_for_alignment_3[2]; + /* This field must take stvewx/lvewx requirements into account */ + uint32_t vscr; uint8_t v20[16]; uint8_t v21[16]; uint8_t v22[16]; @@ -239,7 +265,6 @@ typedef struct { uint8_t v29[16]; uint8_t v30[16]; uint8_t v31[16]; - uint32_t vrsave; #elif defined(__ALTIVEC__) /* * 12 non-volatile vector registers, cache-aligned area for vscr/vrsave @@ -354,8 +379,16 @@ static inline ppc_context *ppc_get_context( const Context_Control *context ) #define PPC_CONTEXT_OFFSET_ISR_DISPATCH_DISABLE PPC_CONTEXT_GPR_OFFSET( 32 ) #ifdef PPC_MULTILIB_ALTIVEC + #ifdef __powerpc64__ + #define PPC_CONTEXT_OFFSET_VRSAVE \ + ( PPC_CONTEXT_OFFSET_ISR_DISPATCH_DISABLE + 8 ) + #else + #define PPC_CONTEXT_OFFSET_VRSAVE \ + ( PPC_CONTEXT_OFFSET_ISR_DISPATCH_DISABLE + 24 ) + #endif + #define PPC_CONTEXT_OFFSET_VSCR ( PPC_CONTEXT_OFFSET_VRSAVE + 12 ) #define PPC_CONTEXT_OFFSET_V( v ) \ - ( ( ( v ) - 20 ) * 16 + PPC_CONTEXT_OFFSET_ISR_DISPATCH_DISABLE + 8) + ( ( ( v ) - 20 ) * 16 + PPC_CONTEXT_OFFSET_VRSAVE + 16) #define PPC_CONTEXT_OFFSET_V20 PPC_CONTEXT_OFFSET_V( 20 ) #define PPC_CONTEXT_OFFSET_V21 PPC_CONTEXT_OFFSET_V( 21 ) #define PPC_CONTEXT_OFFSET_V22 PPC_CONTEXT_OFFSET_V( 22 ) @@ -368,9 +401,8 @@ static inline ppc_context *ppc_get_context( const Context_Control *context ) #define PPC_CONTEXT_OFFSET_V29 PPC_CONTEXT_OFFSET_V( 29 ) #define PPC_CONTEXT_OFFSET_V30 PPC_CONTEXT_OFFSET_V( 30 ) #define PPC_CONTEXT_OFFSET_V31 PPC_CONTEXT_OFFSET_V( 31 ) - #define PPC_CONTEXT_OFFSET_VRSAVE PPC_CONTEXT_OFFSET_V( 32 ) #define PPC_CONTEXT_OFFSET_F( f ) \ - ( ( ( f ) - 14 ) * 8 + PPC_CONTEXT_OFFSET_VRSAVE + 8 ) + ( ( ( f ) - 14 ) * 8 + PPC_CONTEXT_OFFSET_V( 32 ) ) #else #define PPC_CONTEXT_OFFSET_F( f ) \ ( ( ( f ) - 14 ) * 8 + PPC_CONTEXT_OFFSET_ISR_DISPATCH_DISABLE + 8 ) @@ -400,7 +432,7 @@ static inline ppc_context *ppc_get_context( const Context_Control *context ) #if defined(PPC_MULTILIB_FPU) #define PPC_CONTEXT_VOLATILE_SIZE PPC_CONTEXT_OFFSET_F( 32 ) #elif defined(PPC_MULTILIB_ALTIVEC) - #define PPC_CONTEXT_VOLATILE_SIZE (PPC_CONTEXT_OFFSET_VRSAVE + 4) + #define PPC_CONTEXT_VOLATILE_SIZE PPC_CONTEXT_OFFSET_V( 33 ) #elif defined(__ALTIVEC__) #define PPC_CONTEXT_VOLATILE_SIZE \ (PPC_CONTEXT_GPR_OFFSET( 32 ) + 8 \ @@ -417,8 +449,8 @@ static inline ppc_context *ppc_get_context( const Context_Control *context ) #endif #ifndef ASM -typedef struct { #if (PPC_HAS_FPU == 1) +typedef struct { /* The ABIs (PowerOpen/SVR4/EABI) only require saving f14-f31 over * procedure calls. However, this would mean that the interrupt * frame had to hold f0-f13, and the fpscr. And as the majority @@ -432,9 +464,8 @@ typedef struct { float f[32]; uint32_t fpscr; #endif -#endif /* (PPC_HAS_FPU == 1) */ } Context_Control_fp; - +#endif /* (PPC_HAS_FPU == 1) */ #endif /* ASM */ /* @@ -530,7 +561,9 @@ typedef struct { * CPUs with a "floating point save context" instruction. */ +#if (PPC_HAS_FPU == 1) #define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp ) +#endif /* * (Optional) # of bytes for libmisc/stackchk to check @@ -576,7 +609,7 @@ typedef struct { #ifndef ASM -RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint32_t level ) +static inline bool _CPU_ISR_Is_enabled( uint32_t level ) { return ( level & MSR_EE ) != 0; } @@ -710,14 +743,6 @@ static inline CPU_Counter_ticks _CPU_Counter_read( void ) return value; } -static inline CPU_Counter_ticks _CPU_Counter_difference( - CPU_Counter_ticks second, - CPU_Counter_ticks first -) -{ - return second - first; -} - #endif /* ASM */ @@ -916,6 +941,7 @@ RTEMS_NO_RETURN void _CPU_Context_switch_no_return( RTEMS_NO_RETURN void _CPU_Context_restore( Context_Control *new_context ); +#if (PPC_HAS_FPU == 1) /* * _CPU_Context_save_fp * @@ -935,6 +961,7 @@ void _CPU_Context_save_fp( void _CPU_Context_restore_fp( Context_Control_fp **fp_context_ptr ); +#endif #ifdef RTEMS_SMP uint32_t _CPU_SMP_Initialize( void ); diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpuatomic.h deleted file mode 100644 index 598ee76b20..0000000000 --- a/cpukit/score/cpu/powerpc/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h index 69eeeb183c..68b7165546 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -10,11 +12,28 @@ * * Copyright (C) 2007 Till Straumann <strauman@slac.stanford.edu> * - * Copyright (c) 2009, 2017 embedded brains GmbH + * Copyright (C) 2009, 2017 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef _RTEMS_SCORE_CPUIMPL_H @@ -132,6 +151,8 @@ #define CPU_PER_CPU_CONTROL_SIZE 0 +#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10 + #ifdef RTEMS_SMP /* Use SPRG0 for the per-CPU control of the current processor */ @@ -254,16 +275,39 @@ void _CPU_Context_volatile_clobber( uintptr_t pattern ); void _CPU_Context_validate( uintptr_t pattern ); -RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void ) +static inline void _CPU_Instruction_illegal( void ) { __asm__ volatile ( ".long 0" ); } -RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void ) +static inline void _CPU_Instruction_no_operation( void ) { __asm__ volatile ( "nop" ); } +static inline void _CPU_Use_thread_local_storage( + const Context_Control *context +) +{ +#ifdef __powerpc64__ + register uintptr_t tp __asm__( "13" ); +#else + register uintptr_t tp __asm__( "2" ); +#endif + + tp = ppc_get_context( context )->tp; + + /* Make sure that the register assignment is not optimized away */ + __asm__ volatile ( "" : : "r" ( tp ) ); +} + +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + return (void *) ppc_get_context( context )->tp; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h b/cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h index 5efbd3bef7..e6f067b495 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h +++ b/cpukit/score/cpu/powerpc/include/rtems/score/paravirt.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -11,12 +13,28 @@ * COPYRIGHT (c) 2018. * On-Line Applications Research Corporation (OAR). * - * The license and distribution terms for this file may in - * the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ - #ifndef RTEMS_PARAVIRT #error "This file should only be included with paravirtualization is enabled." #endif diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/powerpc.h b/cpukit/score/cpu/powerpc/include/rtems/score/powerpc.h index 84e164d70b..542ab154d2 100644 --- a/cpukit/score/cpu/powerpc/include/rtems/score/powerpc.h +++ b/cpukit/score/cpu/powerpc/include/rtems/score/powerpc.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -32,13 +34,26 @@ * COPYRIGHT (c) 1989-1997. * On-Line Applications Research Corporation (OAR). * - * The license and distribution terms for this file may in - * the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * Note: - * This file is included by both C and assembler code ( -DASM ) + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ diff --git a/cpukit/score/cpu/powerpc/ppc-context-validate.S b/cpukit/score/cpu/powerpc/ppc-context-validate.S index b65ccacfb8..721633c642 100644 --- a/cpukit/score/cpu/powerpc/ppc-context-validate.S +++ b/cpukit/score/cpu/powerpc/ppc-context-validate.S @@ -1,15 +1,28 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /* - * Copyright (c) 2013, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2013, 2020 embedded brains GmbH & Co. KG * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifdef HAVE_CONFIG_H @@ -86,6 +99,7 @@ #define VTMP_OFFSET VOFFSET(12) #define VTMP2_OFFSET VOFFSET(13) #define VRSAVE_OFFSET VOFFSET(14) + #define VRSAVE2_OFFSET (VOFFSET(14) + 4) #define VSCR_OFFSET (VOFFSET(14) + 12) #define ALTIVECEND VOFFSET(15) #else @@ -148,6 +162,13 @@ _CPU_Context_validate: #endif #ifdef PPC_MULTILIB_ALTIVEC + mfvrsave r0 + stw r0, VRSAVE_OFFSET(r1) + li r0, 0xffffffff + mtvrsave r0 + mfvscr v0 + li r0, VSCR_OFFSET + stvewx v0, r1, r0 li r0, V20_OFFSET stvx v20, r1, r0 li r0, V21_OFFSET @@ -172,11 +193,6 @@ _CPU_Context_validate: stvx v30, r1, r0 li r0, V31_OFFSET stvx v31, r1, r0 - mfvscr v0 - li r0, VSCR_OFFSET - stvewx v0, r1, r0 - mfvrsave r0 - stw r0, VRSAVE_OFFSET(r1) #endif /* Fill */ @@ -324,9 +340,11 @@ _CPU_Context_validate: FILL_V 29 FILL_V 30 FILL_V 31 +#ifndef __PPC_VRSAVE__ addi r4, r3, 0x700 mtvrsave r4 #endif +#endif /* Check */ check: @@ -503,6 +521,15 @@ check: #ifdef PPC_MULTILIB_ALTIVEC .macro CHECK_V i +#ifdef __PPC_VRSAVE__ + mfvrsave r4 +.if (31 - \i) > 15 + andis. r5, r4, 1 << (31 - \i - 16) +.else + andi. r5, r4, 1 << (31 - \i) +.endif + beq 1f +#endif li r4, VTMP_OFFSET stvx \i, r1, r4 lwz r5, VTMP_OFFSET(r1) @@ -521,9 +548,43 @@ check: addi r4, r3, 0x600 + \i cmpw r5, r4 bne restore +#ifdef __PPC_VRSAVE__ + mfvrsave r4 +.if (31 - \i) > 15 + xoris r4, r4, 1 << (31 - \i - 16) +.else + xori r4, r4, 1 << (31 - \i) +.endif + mtvrsave r4 + b 2f +1: +.if (31 - \i) > 15 + oris r4, r4, 1 << (31 - \i - 16) +.else + ori r4, r4, 1 << (31 - \i) +.endif + mtvrsave r4 + addi r4, r3, 0x300 + \i + stw r4, VTMP_OFFSET(r1) + addi r4, r3, 0x400 + \i + stw r4, VTMP_OFFSET + 4(r1) + addi r4, r3, 0x500 + \i + stw r4, VTMP_OFFSET + 8(r1) + addi r4, r3, 0x600 + \i + stw r4, VTMP_OFFSET + 12(r1) + li r4, VTMP_OFFSET + lvx \i, r1, r4 +2: +#endif .endm /* Check VSCR */ +#ifdef __PPC_VRSAVE__ + mfvrsave r4 + stw r4, VRSAVE2_OFFSET(r1) + oris r4, r4, 0x8000 + mtvrsave r4 +#endif li r4, VTMP_OFFSET stvx v0, r1, r4 mfvscr v0 @@ -535,6 +596,10 @@ check: bne restore li r4, VTMP_OFFSET lvx v0, r1, r4 +#ifdef __PPC_VRSAVE__ + lwz r4, VRSAVE2_OFFSET(r1) + mtvrsave r4 +#endif CHECK_V 0 CHECK_V 1 @@ -569,10 +634,16 @@ check: CHECK_V 30 CHECK_V 31 mfvrsave r5 +#ifdef __PPC_VRSAVE__ + addi r5, r5, 1 + cmplwi r0, r5, 1 + bgt restore +#else addi r4, r3, 0x700 cmpw r5, r4 bne restore #endif +#endif mtcr r29 addi r5, r3, 1 @@ -582,7 +653,7 @@ check: restore: #ifdef PPC_MULTILIB_ALTIVEC - lwz r0, VRSAVE_OFFSET(r1) + li r0, 0xffffffff mtvrsave r0 li r0, V31_OFFSET lvx v31, r1, r0 @@ -608,6 +679,11 @@ restore: lvx v21, r1, r0 li r0, V20_OFFSET lvx v20, r1, r0 + li r0, VSCR_OFFSET + lvewx v0, r1, r0 + mtvscr v0 + lwz r0, VRSAVE_OFFSET(r1) + mtvrsave r0 #endif #ifdef PPC_MULTILIB_FPU diff --git a/cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S b/cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S index ea217b27ce..d235929f7d 100644 --- a/cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S +++ b/cpukit/score/cpu/powerpc/ppc-context-volatile-clobber.S @@ -1,15 +1,28 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /* - * Copyright (c) 2013, 2017 embedded brains GmbH. All rights reserved. + * Copyright (C) 2013, 2017 embedded brains GmbH & Co. KG * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifdef HAVE_CONFIG_H diff --git a/cpukit/score/cpu/powerpc/ppc-isr-disable-mask.S b/cpukit/score/cpu/powerpc/ppc-isr-disable-mask.S index 9f78cf9a63..529b88bf3f 100644 --- a/cpukit/score/cpu/powerpc/ppc-isr-disable-mask.S +++ b/cpukit/score/cpu/powerpc/ppc-isr-disable-mask.S @@ -1,15 +1,28 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /* - * Copyright (c) 2014 embedded brains GmbH. All rights reserved. + * Copyright (c) 2014 embedded brains GmbH & Co. KG * - * embedded brains GmbH - * Dornierstr. 4 - * 82178 Puchheim - * Germany - * <rtems@embedded-brains.de> + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifdef HAVE_CONFIG_H |