diff options
Diffstat (limited to 'cpukit/score/cpu/powerpc/rtems/powerpc/registers.h')
| -rw-r--r-- | cpukit/score/cpu/powerpc/rtems/powerpc/registers.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h index 124acd734a..37260465af 100644 --- a/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h +++ b/cpukit/score/cpu/powerpc/rtems/powerpc/registers.h @@ -311,6 +311,33 @@ lidate */ #define BOOKE_TCR_FPEXT(x) (((x)&0xf)<<13) #define BOOKE_TCR_FPEXT_MASK (0xf<<13) +#define BOOKE_PID 48 + +/* Freescale Book E Implementation Standards (EIS): MMU Control and Status */ + +#define FREESCALE_EIS_MAS0 624 +#define FREESCALE_EIS_MAS1 625 +#define FREESCALE_EIS_MAS2 626 +#define FREESCALE_EIS_MAS3 627 +#define FREESCALE_EIS_MAS4 628 +#define FREESCALE_EIS_MAS5 629 +#define FREESCALE_EIS_MAS6 630 +#define FREESCALE_EIS_MAS7 944 +#define FREESCALE_EIS_MMUCFG 1015 +#define FREESCALE_EIS_MMUCSR0 1012 +#define FREESCALE_EIS_PID0 48 +#define FREESCALE_EIS_PID1 633 +#define FREESCALE_EIS_PID2 634 +#define FREESCALE_EIS_TLB0CFG 688 +#define FREESCALE_EIS_TLB1CFG 689 + +/* Freescale Book E Implementation Standards (EIS): L1 Cache */ + +#define FREESCALE_EIS_L1CFG0 515 +#define FREESCALE_EIS_L1CFG1 516 +#define FREESCALE_EIS_L1CSR0 1010 +#define FREESCALE_EIS_L1CSR1 1011 + /** * @brief Default value for the interrupt disable mask. * |