diff options
Diffstat (limited to 'cpukit/score/cpu/mips')
| -rw-r--r-- | cpukit/score/cpu/mips/cpu.c | 38 | ||||
| -rw-r--r-- | cpukit/score/cpu/mips/cpu_asm.S | 29 | ||||
| -rw-r--r-- | cpukit/score/cpu/mips/headers.am | 9 | ||||
| -rw-r--r-- | cpukit/score/cpu/mips/include/rtems/score/cpu.h | 52 | ||||
| -rw-r--r-- | cpukit/score/cpu/mips/include/rtems/score/cpuatomic.h | 14 | ||||
| -rw-r--r-- | cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h | 58 | ||||
| -rw-r--r-- | cpukit/score/cpu/mips/include/rtems/score/mips.h | 25 |
7 files changed, 154 insertions, 71 deletions
diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c index c8cf960db5..526f7db13f 100644 --- a/cpukit/score/cpu/mips/cpu.c +++ b/cpukit/score/cpu/mips/cpu.c @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -41,15 +43,33 @@ * COPYRIGHT (c) 1989-2012. * On-Line Applications Research Corporation (OAR). * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif +#include <rtems/score/cpuimpl.h> #include <rtems/score/isr.h> #if CPU_HARDWARE_FP @@ -93,6 +113,18 @@ void _CPU_Initialize(void) #endif } +void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ) +{ + ISR_Level level; + + _CPU_ISR_Disable( level ); + (void) level; + + while ( true ) { + /* Do nothing */ + } +} + uint32_t _CPU_ISR_Get_level( void ) { unsigned int sr; diff --git a/cpukit/score/cpu/mips/cpu_asm.S b/cpukit/score/cpu/mips/cpu_asm.S index 5692af22d7..b3aefebbe0 100644 --- a/cpukit/score/cpu/mips/cpu_asm.S +++ b/cpukit/score/cpu/mips/cpu_asm.S @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /* * This file contains the basic algorithms for all assembly code used * in an specific CPU port of RTEMS. These algorithms must be implemented @@ -43,9 +45,26 @@ * COPYRIGHT (c) 1989-2002. * On-Line Applications Research Corporation (OAR). * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifdef HAVE_CONFIG_H @@ -750,7 +769,7 @@ _ISR_Handler_Exception: ** Note, if the exception vector returns, rely on it to have ** adjusted EPC so we will return to some correct address. If ** this is not done, we might get stuck in an infinite loop because - ** we'll return to the instruction where the exception occured and + ** we'll return to the instruction where the exception occurred and ** it could throw again. ** ** It is expected the only code using the exception processing is @@ -776,7 +795,7 @@ _ISR_Handler_Exception: beqz t4,excnodelay NOP - * it did, now see if the branch occured or not * + * it did, now see if the branch occurred or not * li t3,CAUSE_BT AND t4,t1,t3 beqz t4,excnobranch diff --git a/cpukit/score/cpu/mips/headers.am b/cpukit/score/cpu/mips/headers.am deleted file mode 100644 index 3084000f09..0000000000 --- a/cpukit/score/cpu/mips/headers.am +++ /dev/null @@ -1,9 +0,0 @@ -## This file was generated by "./boostrap -H". -include_machine_HEADERS += score/cpu/mips/include/machine/elf_machdep.h -include_rtems_HEADERS += score/cpu/mips/include/rtems/asm.h -include_rtems_mips_HEADERS += score/cpu/mips/include/rtems/mips/idtcpu.h -include_rtems_mips_HEADERS += score/cpu/mips/include/rtems/mips/iregdef.h -include_rtems_score_HEADERS += score/cpu/mips/include/rtems/score/cpu.h -include_rtems_score_HEADERS += score/cpu/mips/include/rtems/score/cpuatomic.h -include_rtems_score_HEADERS += score/cpu/mips/include/rtems/score/cpuimpl.h -include_rtems_score_HEADERS += score/cpu/mips/include/rtems/score/mips.h diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpu.h b/cpukit/score/cpu/mips/include/rtems/score/cpu.h index cdb0e64013..447a384c88 100644 --- a/cpukit/score/cpu/mips/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/mips/include/rtems/score/cpu.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -36,9 +38,26 @@ * COPYRIGHT (c) 1989-2012. * On-Line Applications Research Corporation (OAR). * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef _RTEMS_SCORE_CPU_H @@ -583,7 +602,7 @@ uint32_t mips_interrupt_mask( void ); _xlevel = _scratch2; \ } while(0) -RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint32_t level ) +static inline bool _CPU_ISR_Is_enabled( uint32_t level ) { return ( level & SR_INTERRUPT_ENABLE_BITS ) != 0; } @@ -710,23 +729,6 @@ void _CPU_Context_Initialize( /* end of Context handler macros */ -/* Fatal Error manager macros */ - -/* - * This routine copies _error into a known place -- typically a stack - * location or a register, optionally disables interrupts, and - * halts/stops the CPU. - */ - -#define _CPU_Fatal_halt( _source, _error ) \ - do { \ - unsigned int _level; \ - _CPU_ISR_Disable(_level); \ - (void)_level; \ - loop: goto loop; \ - } while (0) - - extern void mips_break( int error ); #define CPU_USE_GENERIC_BITFIELD_CODE TRUE @@ -833,14 +835,6 @@ uint32_t _CPU_Counter_frequency( void ); CPU_Counter_ticks _CPU_Counter_read( void ); -static inline CPU_Counter_ticks _CPU_Counter_difference( - CPU_Counter_ticks second, - CPU_Counter_ticks first -) -{ - return second - first; -} - /** Type that can store a 32-bit integer or a pointer. */ typedef uintptr_t CPU_Uint32ptr; diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpuatomic.h b/cpukit/score/cpu/mips/include/rtems/score/cpuatomic.h deleted file mode 100644 index 598ee76b20..0000000000 --- a/cpukit/score/cpu/mips/include/rtems/score/cpuatomic.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * COPYRIGHT (c) 2012-2013 Deng Hengyi. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. - */ - -#ifndef _RTEMS_SCORE_ATOMIC_CPU_H -#define _RTEMS_SCORE_ATOMIC_CPU_H - -#include <rtems/score/cpustdatomic.h> - -#endif /* _RTEMS_SCORE_ATOMIC_CPU_H */ diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h index 932784fc8f..98ed1c492f 100644 --- a/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -5,11 +7,28 @@ */ /* - * Copyright (c) 2013 embedded brains GmbH + * Copyright (c) 2013 embedded brains GmbH & Co. KG + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef _RTEMS_SCORE_CPUIMPL_H @@ -29,34 +48,57 @@ #define CPU_PER_CPU_CONTROL_SIZE 0 +#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10 + #ifndef ASM #ifdef __cplusplus extern "C" { #endif -RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern ) +RTEMS_NO_RETURN void _CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error ); + +static inline void _CPU_Context_volatile_clobber( uintptr_t pattern ) { + (void) pattern; + /* TODO */ } -RTEMS_INLINE_ROUTINE void _CPU_Context_validate( uintptr_t pattern ) +static inline void _CPU_Context_validate( uintptr_t pattern ) { + (void) pattern; + while (1) { /* TODO */ } } -RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal( void ) +static inline void _CPU_Instruction_illegal( void ) { __asm__ volatile ( ".word -1" ); } -RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void ) +static inline void _CPU_Instruction_no_operation( void ) { __asm__ volatile ( "nop" ); } +static inline void _CPU_Use_thread_local_storage( + const Context_Control *context +) +{ + (void) context; +} + +static inline void *_CPU_Get_TLS_thread_pointer( + const Context_Control *context +) +{ + (void) context; + return NULL; +} + #ifdef __cplusplus } #endif diff --git a/cpukit/score/cpu/mips/include/rtems/score/mips.h b/cpukit/score/cpu/mips/include/rtems/score/mips.h index d3dccb1c54..db9f119178 100644 --- a/cpukit/score/cpu/mips/include/rtems/score/mips.h +++ b/cpukit/score/cpu/mips/include/rtems/score/mips.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + /** * @file * @@ -15,9 +17,26 @@ * COPYRIGHT (c) 1989-2001. * On-Line Applications Research Corporation (OAR). * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.org/license/LICENSE. + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. */ #ifndef _RTEMS_SCORE_MIPS_H |