diff options
Diffstat (limited to 'cpukit/score/cpu/mips/rtems')
-rw-r--r-- | cpukit/score/cpu/mips/rtems/score/cpu.h | 2 | ||||
-rw-r--r-- | cpukit/score/cpu/mips/rtems/score/mips.h | 16 |
2 files changed, 17 insertions, 1 deletions
diff --git a/cpukit/score/cpu/mips/rtems/score/cpu.h b/cpukit/score/cpu/mips/rtems/score/cpu.h index c0ed92a642..4eda5c35b1 100644 --- a/cpukit/score/cpu/mips/rtems/score/cpu.h +++ b/cpukit/score/cpu/mips/rtems/score/cpu.h @@ -599,7 +599,7 @@ extern unsigned int mips_interrupt_number_of_vectors; #define _CPU_ISR_Disable( _level ) \ do { \ mips_get_sr( _level ); \ - mips_set_sr( (_level) & ~SR_IMASK ); \ + mips_set_sr( (_level) & ~SR_INTERRUPT_ENABLE_BITS ); \ } while(0) /* diff --git a/cpukit/score/cpu/mips/rtems/score/mips.h b/cpukit/score/cpu/mips/rtems/score/mips.h index f95175d362..e85540f892 100644 --- a/cpukit/score/cpu/mips/rtems/score/mips.h +++ b/cpukit/score/cpu/mips/rtems/score/mips.h @@ -23,6 +23,22 @@ extern "C" { #endif /* + * SR bits that enable/disable interrupts + * + * NOTE: XXX what about SR_ERL? + */ + +#if __mips == 3 +#ifdef ASM +#define SR_INTERRUPT_ENABLE_BITS 0x03 +#else +#define SR_INTERRUPT_ENABLE_BITS SR_IE|SR_EXL +#endif +#else +#define SR_INTERRUPT_ENABLE_BITS SR_IEC +#endif + +/* * This file contains the information required to build * RTEMS for a particular member of the "no cpu" * family when executing in protected mode. It does |