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@@ -1,715 +0,0 @@
-2012-03-07 Jennifer Averett <Jennifer.Averett@OARcorp.com>
-
- * rtems/score/cpu.h: In order to handle a issue in the
- compilation of printk all tasks should be defined as
- floating point for the MIPS processor.
-
-2012-02-23 Jennifer Averett <Jennifer.Averett@OARcorp.com>
-
- PR 1993/bsps
- * cpu.c, rtems/score/cpu.h:
- Mips conversion to PIC IRQ model.
-
-2011-12-09 Jennifer Averett
-
- * cpu.c: Correct typo.
-
-2011-09-27 Sebastian Huber <sebastian.huber@embedded-brains.de>
-
- PR 1914/cpukit
- * rtems/score/cpu.h: Select timestamp implementation.
-
-2011-07-24 Joel Sherrill <joel.sherrill@oarcorp.com>
-
- * cpu.c: Remove /*PAGE markers which were interpreted by a long dead
- print script.
-
-2011-05-17 Ralf Corsépius <ralf.corsepius@rtems.org>
-
- * Makefile.am: Reformat.
-
-2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
-
- * cpu.c, rtems/score/mips.h:
- Use "__asm__" instead of "asm" for improved c99-compliance.
-
-2011-01-04 Joel Sherrill <joel.sherrill@oarcorp.com>
-
- * cpu_asm.S: _Thread_Executing was not used.
-
-2010-10-21 Joel Sherrill <joel.sherrill@oarcorp.com>
-
- * rtems/score/cpu.h: Add RTEMS_COMPILER_NO_RETURN_ATTRIBUTE to
- _CPU_Context_restore() because it does not return. Telling GCC this
- avoids generation of dead code.
-
-2010-07-30 Gedare Bloom <giddyup44@yahoo.com>
-
- PR 1599/cpukit
- * cpu_asm.S: Rename _Context_Switch_necessary to
- _Thread_Dispatch_necessary to more properly reflect the intent.
-
-2010-07-29 Gedare Bloom <giddyup44@yahoo.com>
-
- PR 1635/cpukit
- * rtems/score/cpu.h, rtems/score/types.h: Refactoring of priority
- handling, to isolate the bitmap implementation of priorities in the
- supercore so that priority management is a little more modular. This
- change is in anticipation of scheduler implementations that can
- select how they manage tracking priority levels / finding the highest
- priority ready task. Note that most of the changes here are simple
- renaming, to clarify the use of the bitmap-based priority management.
-
-2010-07-16 Sebastian Huber <sebastian.huber@embedded-brains.de>
-
- * rtems/score/cpu.h: Include <rtems/score/types.h> first.
- * rtems/score/types.h: Use <rtems/score/basedefs.h> header file.
-
-2010-07-01 Joel Sherrill <joel.sherrill@oarcorp.com>
-
- * rtems/asm.h, rtems/score/cpu.h: cpu.h defines were not available to
- assembly programs. This resulted in percpu.h (when included from
- assembly) not being able to detect that the MIPS does not have a
- dedicated software managed interrupt stack.
-
-2010-06-28 Joel Sherrill <joel.sherrill@oarcorp.com>
-
- PR 1573/cpukit
- * cpu_asm.S, rtems/score/cpu.h: Add a per cpu data structure which
- contains the information required by RTEMS for each CPU core. This
- encapsulates information such as thread executing, heir, idle and
- dispatch needed.
-
-2010-06-16 Joel Sherrill <joel.sherrill@oarcorp.com>
-
- * cpu_asm.S: Remove trailing tabs.
-
-2010-04-25 Joel Sherrill <joel.sherrilL@OARcorp.com>
-
- * cpu.c, rtems/score/cpu.h: Move _CPU_Context_Initialize() to cpu.c so
- it is easier to make warning free.
-
-2010-04-25 Joel Sherrill <joel.sherrilL@OARcorp.com>
-
- * rtems/score/cpu.h: Remove warning in _CPU_Context_Initialize.
-
-2010-03-27 Joel Sherrill <joel.sherrill@oarcorp.com>
-
- * cpu.c, cpu_asm.S: Add include of config.h
-
-2009-03-12 Joel Sherrill <joel.sherrill@OARcorp.com>
-
- PR 1385/cpukit
- * cpu_asm.S: When the type rtems_boolean was switched to the C99 bool,
- the size changed from 4 bytes to 1 byte. The interrupt dispatching
- code accesses two boolean variables for scheduling purposes and the
- assembly implementations of this code did not get updated.
-
-2009-02-12 Joel Sherrill <joel.sherrill@oarcorp.com>
-
- * cpu.c, rtems/score/cpu.h: Change prototype of IDLE thread to
- consistently return void * and take a uintptr_t argument.
-
-2009-02-11 Joel Sherrill <joel.sherrill@oarcorp.com>
-
- * cpu.c, rtems/score/cpu.h: Eliminate _CPU_Thread_dispatch_pointer and
- passing address of _Thread_Dispatch to _CPU_Initialize. Clean up
- comments.
-
-2008-09-11 Ralf Corsépius <ralf.corsepius@rtems.org>
-
- * rtems/score/types.h: Do not define boolean, single_precision,
- double_precision unless RTEMS_DEPRECATED_TYPES is given.
-
-2008-08-21 Ralf Corsépius <ralf.corsepius@rtems.org>
-
- * rtems/score/types.h: Include stdbool.h.
- Use bool as base-type for boolean.
-
-2008-07-31 Joel Sherrill <joel.sherrill@OARcorp.com>
-
- * cpu.c, rtems/score/cpu.h: Correct prototype of Idle threads.
-
-2008-06-05 Joel Sherrill <joel.sherrill@OARcorp.com>
-
- * rtems/score/cpu.h: Add CPU_SIMPLE_VECTORED_INTERRUPTS porting
- parameter to indicate that the port uses the Simple Vectored
- Interrupt model or the Programmable Interrupt Controller Model. The
- PIC model is implemented primarily in the BSP and it is responsible
- for all memory allocation.
-
-2008-06-04 Joel Sherrill <joel.sherrill@OARcorp.com>
-
- * rtems/score/cpu.h: Use a constant for CPU_STACK_MINIMUM_SIZE so it
- can be used in cpp expressions. Using sizeof() requires actually
- compiling the file.
-
-2007-12-17 Joel Sherrill <joel.sherrill@oarcorp.com>
-
- * rtems/score/cpu.h: Add _CPU_Context_Get_SP() for stack check utility.
-
-2007-12-04 Joel Sherrill <joel.sherrill@OARcorp.com>
-
- * cpu.c, rtems/score/cpu.h: Move interrupt_stack_size field from CPU
- Table to Configuration Table. Eliminate CPU Table from all ports.
- Delete references to CPU Table in all forms.
-
-2007-12-03 Joel Sherrill <joel.sherrill@OARcorp.com>
-
- * rtems/score/cpu.h: Moved most of the remaining CPU Table fields to
- the Configuration Table. This included pretasking_hook,
- predriver_hook, postdriver_hook, idle_task, do_zero_of_workspace,
- extra_mpci_receive_server_stack, stack_allocate_hook, and
- stack_free_hook. As a side-effect of this effort some multiprocessing
- code was made conditional and some style clean up occurred.
-
-2007-11-26 Joel Sherrill <joel.sherrill@oarcorp.com>
-
- * rtems/score/cpu.h: Eliminate the clicks_per_microsecond field in the
- MIPS CPU Table and define another mechanism for drivers to obtain
- this information.
-
-2007-08-04 Ralf Corsépius <ralf.corsepius@rtems.org>
-
- * rtems/score/cpu.h: Use uintptr_t instead of uint32_t.
-
-2007-05-09 Ralf Corsépius <ralf.corsepius@rtems.org>
-
- * rtems/score/cpu.h: Remove CPU_HAS_OWN_HOST_TO_NETWORK_ROUTINES.
-
-2007-04-17 Ralf Corsépius <ralf.corsepius@rtems.org>
-
- * rtems/score/cpu.h:
- Use Context_Control_fp* instead of void* for fp_contexts.
- Eliminate evil casts.
-
-2006-11-17 Ralf Corsépius <ralf.corsepius@rtems.org>
-
- * rtems/score/types.h: Remove unsigned64, signed64.
-
-2006-06-02 Greg Menke <gregory.menke@gsfc.nasa.gov>
-
- * cpu.c: Added __mips==32 to fix build problems on those targets
- caused by the Bruce Robinson.
-
-2006-06-08 Bruce Robinson <brucer@pmccorp.com>
-
- * cpu.c: Add int64 types for __mips==3 cpus, incorporate
- mips_interrupt_mask() into mask computations
- * cpu_asm.S: Add int64 register save/restores for __mips==3 cpus. Adjustment
- of mips1 vs mips3 macros.
- * cpu.h: Add int64 types for __mips==3 cpus.
-
-2006-03-17 Ralf Corsepius <ralf.corsepius@rtems.org>
-
- * cpu.c (_CPU_Initialize): Add fpu initialization.
- * rtems/score/cpu.h: Setup CPU_*_ENDIAN from GCC's__MIPS{EL|EB}__.
- (Partial merger of submission by Bruce Robinson <brucer@pmccorp.com>).
-
-2006-01-16 Joel Sherrill <joel@OARcorp.com>
-
- * rtems/score/cpu.h: Part of a large patch to improve Doxygen output.
- As a side-effect, grammar and spelling errors were corrected, spacing
- errors were address, and some variable names were improved.
-
-2005-11-18 Joel Sherrill <joel@OARcorp.com>
-
- * rtems/score/cpu.h: Eliminate use of unsigned32.
-
-2005-11-08 Ralf Corsepius <ralf.corsepius@rtems.org>
-
- * rtems/score/types.h: Eliminate unsigned16, unsigned32.
-
-2005-10-27 Ralf Corsepius <ralf.corsepius@rtems.org>
-
- * rtems/asm.h: Remove private version of CONCAT macros.
- Include <rtems/concat.h> instead.
-
-2005-04-26 Joel Sherrill <joel@OARcorp.com>
-
- * rtems/asm.h: Eliminate warnings.
-
-2005-02-08 Ralf Corsepius <ralf.corsepius@rtems.org>
-
- * Makefile.am: Split out preinstallation rules.
- * preinstall.am: New (Split out from Makefile.am).
-
-2005-02-04 Ralf Corsepius <ralf.corsepius@rtems.org>
-
- * rtems/mips/idtcpu.h, rtems/mips/iregdef.h, rtems/score/mips.h:
- Header guards cleanup.
-
-2005-02-04 Ralf Corsepius <ralf.corsepius@rtems.org>
-
- PR 754/rtems
- * rtems/asm.h: New (relocated from .).
- * asm.h: Remove (moved to rtems/asm.h).
- * Makefile.am: Reflect changes above.
-
-2005-02-01 Ralf Corsepius <ralf.corsepius@rtems.org>
-
- PR rtems/752
- * rtems/mips/idtcpu.h rtems/mips/iregdef.h: New (relocated from .).
- New header guards.
- * idtcpu.h, iregdef.h: Remove.
- * Makefile.am: Reflect changes above.
-
-2004-01-28 Ralf Corsepius <ralf.corsepiu@rtems.org>
-
- * asm.h, rtems/score/cpu.h, rtems/score/mips.h, rtems/score/types.h:
- New header guards.
-
-2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org>
-
- * rtems/score/types.h: Remove signed8, signed16, signed32,
- unsigned8, unsigned16, unsigned32.
-
-2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org>
-
- * rtems/score/cpu.h: *_swap_u32( uint32_t ).
-
-2005-01-24 Ralf Corsepius <ralf.corsepius@rtems.org>
-
- * rtems/score/types.h: #include <rtems/stdint.h>.
-
-2005-01-07 Joel Sherrill <joel@OARcorp.com>
-
- * rtems/score/cpu.h: Remove warnings.
-
-2005-01-07 Ralf Corsepius <ralf.corsepius@rtems.org>
-
- * Makefile.am: Eliminate CFLAGS_OPTIMIZE_V.
-
-2005-01-03 Greg Menke <gregory.menke@gsfc.nasa.gov>
-
- PR 739
- * iregdef.h: Fixes gcc warning about redundant definition of R_SZ
- when compiling cpu_asm.S. Problem was a #define sneaked in in
- version 1.11, no ill effects would have only affected R4000
- builds.
-
-2005-01-03 Greg Menke <gregory.menke@gsfc.nasa.gov>
-
- PR 737
- * cpu_asm.S: Fixes gcc warning about instructions in branch delay
- slot when compiling cpu_asm.S
-
-2005-01-01 Ralf Corsepius <ralf.corsepius@rtems.org>
-
- * Makefile.am: Remove build-variant support.
-
-2004-12-02 Greg Menke <gregory.menke@gsfc.nasa.gov>
-
- PR 730
- * cpu_asm.S: Collected PR 601 changes for commit to cvshead
- for rtems-4.7.
-
-2004-04-09 Joel Sherrill <joel@OARcorp.com>
-
- PR 605/bsps
- * cpu.c: Do not use C++ style comments.
-
-2004-04-07 Greg Menke <gregory.menke@gsfc.nasa.gov>
- PR 601
- * cpu_asm.S: Added __mips==32 support for R4000 processors running
- 32 bit code. Fixed #define problems that caused fpu code to
- always be included even when no fpu is present.
-
-2004-04-03 Art Ferrer <arturo.b.ferrer@nasa.gov>
-
- PR 598/bsps
- * cpu_asm.S, rtems/score/cpu.h: Add save of floating point
- status/control register on context switches. Missing this register
- was causing intermittent floating point errors.
-
-2003-09-04 Joel Sherrill <joel@OARcorp.com>
-
- * cpu.c, cpu_asm.S, rtems/score/cpu.h, rtems/score/mips.h,
- rtems/score/types.h: URL for license changed.
-
-2003-08-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * configure.ac: Use rtems-bugs@rtems.com as bug report email address.
-
-2003-03-06 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * configure.ac: Remove AC_CONFIG_AUX_DIR.
-
-2002-12-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * configure.ac: Require autoconf-2.57 + automake-1.7.2.
- * Makefile.am: Eliminate C_O_FILES, S_O_FILES, libscorecpu_a_OBJECTS.
-
-2002-11-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * configure.ac: Fix package name.
-
-2002-11-04 Joel Sherrill <joel@OARcorp.com>
-
- * idtcpu.h: Removed warning.
-
-2002-11-01 Joel Sherrill <joel@OARcorp.com>
-
- * idtcpu.h: Removed warnings.
-
-2002-10-28 Joel Sherrill <joel@OARcorp.com>
-
- * idtcpu.h: Removed warning by turning extra token at the end of
- an endif into a comment.
-
-2002-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * configure.ac: Add nostdinc to AM_INIT_AUTOMAKE.
-
-2002-10-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * .cvsignore: Reformat.
- Add autom4te*cache.
- Remove autom4te.cache.
-
-2002-08-14 Greg Menke <gregory.menke@gsfc.nasa.gov>
-
- * cpu_asm.S: Clarified some comments, removed code that forced
- SR_IEP on when returning from an interrupt.
-
-2002-06-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * configure.ac: Add RTEMS_PROG_CCAS
-
-2002-06-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * configure.ac: Use AC_CONFIG_AUX_DIR(../../../..).
- Add AC_PROG_RANLIB.
-
-2002-06-20 Greg Menke <gregory.menke@gsfc.nasa.gov>
- * cpu_asm.S: Added SR_IEO to context restore to fix isr disabled
- deadlock caused by interrupt arriving while dispatching.
-
-2002-06-17 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * Makefile.am: Include $(top_srcdir)/../../../automake/*.am.
- Use ../../../aclocal.
-
-2001-04-03 Joel Sherrill <joel@OARcorp.com>
-
- * Per PR94, all rtems/score/CPUtypes.h are named rtems/score/types.h.
- * rtems/score/mipstypes.h: Removed.
- * rtems/score/types.h: New file via CVS magic.
- * Makefile.am, rtems/score/cpu.h: Account for name change.
-
-2002-03-27 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * configure.ac:
- AC_INIT(package,_RTEMS_VERSION,_RTEMS_BUGS).
- AM_INIT_AUTOMAKE([no-define foreign 1.6]).
- * Makefile.am: Remove AUTOMAKE_OPTIONS.
-
-2002-03-20 Greg Menke <gregory.menke@gsfc.nasa.gov>
-
- * cpu_asm.S: Now compiles on 4600 and 4650.
-
-2002-03-13 Greg Menke <gregory.menke@gsfc.nasa.gov>
-
- * cpu_asm.S: Fixed a sneaky return from int w/ ints disabled bug.
- * rtems/score/cpu.h: Fixed register numbering in comments and made
- interrupt enable/disable more robust.
-
-2002-03-05 Greg Menke <gregory.menke@gsfc.nasa.gov>
- * cpu_asm.S: Added support for the debug exception vector, cleaned
- up the exception processing & exception return stuff. Re-added
- EPC in the task context structure so the gdb stub will know where
- a thread is executing. Should've left it there in the first place...
- * idtcpu.h: Added support for the debug exception vector.
- * cpu.c: Added ___exceptionTaskStack to hold a pointer to the
- stack frame in an interrupt so context switch code can get the
- userspace EPC when scheduling.
- * rtems/score/cpu.h: Re-added EPC to the task context.
-
-2002-02-27 Greg Menke <gregory.menke@gsfc.nasa.gov>
-
- * cpu_asm.S: Fixed exception return address, modified FP context
- switch so FPU is properly enabled and also doesn't screw up the
- exception FP handling.
- * idtcpu.h: Added C0_TAR, the MIPS target address register used for
- returning from exceptions.
- * iregdef.h: Added R_TAR to the stack frame so the target address
- can be saved on a per-exception basis. The new entry is past the
- end of the frame gdb cares about, so doesn't affect gdb or cpu.h
- stuff.
- * rtems/score/cpu.h: added an #ifdef so cpu_asm.S can include it
- to obtain FPU defines without syntax errors generated by the C
- defintions.
- * cpu.c: Improved interrupt level saves & restores.
-
-2002-02-08 Joel Sherrill <joel@OARcorp.com>
-
- * iregdef.h, rtems/score/cpu.h: Reordered register in the
- exception stack frame to better match gdb's expectations.
-
-2001-02-05 Joel Sherrill <joel@OARcorp.com>
-
- * cpu_asm.S: Enhanced to save/restore more registers on
- exceptions.
- * rtems/score/cpu.h (CPU_Interrupt_frame): Enhanced to list every
- register individually and document when it is saved.
- * idtcpu.h: Added constants for the coprocessor 1 registers
- revision and status.
-
-2001-02-05 Joel Sherrill <joel@OARcorp.com>
-
- * rtems/Makefile.am, rtems/score/Makefile.am: Removed again.
-
-2001-02-04 Joel Sherrill <joel@OARcorp.com>
-
- * rtems/score/cpu.h: IDLE task should not be FP. This was a mistake
- in the previous patch that has now been confirmed.
-
-2001-02-01 Greg Menke <gregory.menke@gsfc.nasa.gov>
-
- * cpu.c: Enhancements and fixes for modifying the SR when changing
- the interrupt level.
- * cpu_asm.S: Fixed handling of FP enable bit so it is properly
- managed on a per-task basis, improved handling of interrupt levels,
- and made deferred FP contexts work on the MIPS.
- * rtems/score/cpu.h: Modified to support above changes.
-
-2002-01-28 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * rtems/Makefile.am: Removed.
- * rtems/score/Makefile.am: Removed.
- * configure.ac: Reflect changes above.
- * Makefile.am: Reflect changes above.
-
-2002-02-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * asm.h: Remove #include <rtems/score/targopts.h>.
- Add #include <rtems/score/cpuopts.h>.
- * configure.ac: Remove RTEMS_CHECK_CUSTOM_BSP(RTEMS_BSP).
-
-
-2001-12-20 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * configure.ac: Use RTEMS_ENV_RTEMSCPU.
-
-2001-12-19 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * Makefile.am: Add multilib support.
-
-2001-11-28 Joel Sherrill <joel@OARcorp.com>,
-
- This was tracked as PR91.
- * rtems/score/cpu.h: Added CPU_PROVIDES_ISR_IS_IN_PROGRESS macro which
- is used to specify if the port uses the standard macro for this (FALSE).
- A TRUE setting indicates the port provides its own implementation.
-
-2001-10-12 Joel Sherrill <joel@OARcorp.com>
-
- * cpu_asm.S: _CPU_Context_save_fp in was incorrectly in conditional
- compilation block with (CPU_HARDWARE_FP == FALSE). Reported by
- Wayne Bullaughey <wayne@wmi.com>.
-
-2001-10-11 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * .cvsignore: Add autom4te.cache for autoconf > 2.52.
- * configure.in: Remove.
- * configure.ac: New file, generated from configure.in by autoupdate.
-
-2001-09-23 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * rtems/score/Makefile.am: Use 'PREINSTALL_FILES ='.
- * Makefile.am: Use 'PREINSTALL_FILES ='.
-
-2001-07-03 Joel Sherrill <joel@OARcorp.com>
-
- * cpu.c: Fixed typo.
-
-2000-05-24 Joel Sherrill <joel@OARcorp.com>
-
- * rtems/score/mips.h: Added constants for MIPS exception numbers.
- All exceptions should be given low numbers and thus can be installed
- and processed in a uniform manner. Variances between various MIPS
- ISA levels were not accounted for.
-
-2001-05-24 Greg Menke <gregory.menke@gsfc.nasa.gov>
-
- * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
- * cpu_asm.S: Now works on Mongoose-V. Missed in previous patch.
-
-2001-05-22 Greg Menke <gregory.menke@gsfc.nasa.gov>
-
- * rtems/score/cpu.h: Add the interrupt stack structure and enhance
- the context initialization to account for floating point tasks.
- * rtems/score/mips.h: Added the routines mips_set_cause(),
- mips_get_fcr31(), and mips_set_fcr31().
- * Assisted in design and debug by Joel Sherrill <joel@OARcorp.com>.
-
-2001-05-07 Joel Sherrill <joel@OARcorp.com>
-
- * cpu_asm.S: Merged patches from Gregory Menke
- <Gregory.D.Menke.1@gsfc.nasa.gov> that clean up
- stack usage and include nops in the delay slots.
-
-2001-04-20 Joel Sherrill <joel@OARcorp.com>
-
- * cpu_asm.S: Added code to save and restore SR and EPC to
- properly support nested interrupts. Note that the ISR
- (not RTEMS) enables interrupts allowing the nesting to occur.
-
-2001-03-14 Joel Sherrill <joel@OARcorp.com>
-
- * cpu.c, rtems/score/cpu.h, rtems/score/mipstypes.h:
- Removed unused variable _CPU_Thread_dispatch_pointer
- and cleaned numerous comments.
-
-2001-03-13 Joel Sherrill <joel@OARcorp.com>
-
- * cpu.c, cpu_asm.S, iregdef.h, rtems/score/cpu.h, rtems/score/mips.h:
- Merged MIPS1 and MIPS3 code reducing the number of lines of assembly.
- Also reimplemented some assembly routines in C further reducing
- the amount of assembly and increasing maintainability.
-
-2001-02-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * Makefile.am, rtems/score/Makefile.am:
- Apply include_*HEADERS instead of H_FILES.
-
-2001-01-12 Joel Sherrill <joel@OARcorp.com>
-
- * rtems/score/mips.h (mips_get_sr, mips_set_sr): Corrected
- register constraints from "general" to "register".
-
-2001-01-09 Joel Sherrill <joel@OARcorp.com>
-
- * cpu_asm.S: Use SR_INTERRUPT_ENABLE_BITS instead of SR_XXX constants
- to make it easier to conditionalize the code for various ISA levels.
-
-2001-01-08 Joel Sherrill <joel@OARcorp.com>
-
- * idtcpu.h: Commented out definition of "wait". It was stupid to
- use such a common word as a macro.
- * rtems/score/cpu.h (_CPU_ISR_Disable): Fixed for mips ISA 3.
- * rtems/score/mips.h: Added include of <idtcpu.h>.
- * rtems/score/mips.h (mips_enable_in_interrupt_mask): Corrected.
-
-2001-01-03 Joel Sherrill <joel@OARcorp.com>
-
- * rtems/score/cpu.h: Added _CPU_Initialize_vectors().
- * cpu_asm.S: Eliminated warning for duplicate definition of EXTERN.
-
-2000-12-19 Joel Sherrill <joel@OARcorp.com>
-
- * cpu_asm.S (_ISR_Handler): Return to the address in the EPC register.
- Previous code resulting in the interrupted immediately returning
- to the caller of the routine it was inside.
-
-2000-12-19 Joel Sherrill <joel@OARcorp.com>
-
- * cpu.c (_CPU_Initialize): Do not initialize _ISR_Vector_table() here
- because it has not been allocated yet.
-
-2000-12-13 Joel Sherrill <joel@OARcorp.com>
-
- * cpu.c: Removed duplicate declaration for _ISR_Vector_table.
- * cpu_asm.S: Removed assembly language to vector ISR handler
- on MIPS ISA I. Now call mips_vector_isr_handlers() in libcpu or BSP.
- * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): No
- longer a constant -- get the real value from libcpu.
-
-2000-12-13 Joel Sherrill <joel@OARcorp.com>
-
- * cpu_asm.h: Removed.
- * Makefile.am: Remove cpu_asm.h.
- * rtems/score/mips64orion.h: Renamed mips.h.
- * rtems/score/mips.h: New file, formerly mips64orion.h.
- Header rewritten.
- (mips_get_sr, mips_set_sr, mips_enable_in_interrupt_mask,
- mips_disable_in_interrupt_mask): New macros.
- * rtems/score/Makefile.am: Reflect renaming mips64orion.h.
- * asm.h: Include <mips.h> not <mips64orion.h>. Now includes the
- few defines that were in <cpu_asm.h>.
- * cpu.c (_CPU_ISR_Get_level): Added MIPS ISA I version of this routine.
- MIPS ISA 3 is still in assembly for now.
- (_CPU_Thread_Idle_body): Rewrote in C.
- * cpu_asm.S: Rewrote file header.
- (FRAME,ENDFRAME) now in asm.h.
- (_CPU_ISR_Get_level): Removed ISA I version and rewrote in C.
- (_CPU_ISR_Set_level): Removed ISA I version and rewrote in C.
- (_CPU_Context_switch): MIPS ISA I now manages preserves SR_IEC and
- leaves other bits in SR alone on task switch.
- (mips_enable_interrupts,mips_disable_interrupts,
- mips_enable_global_interrupts,mips_disable_global_interrupts,
- disable_int, enable_int): Removed.
- (mips_get_sr): Rewritten as C macro.
- (_CPU_Thread_Idle_body): Rewritten in C.
- (init_exc_vecs): Rewritten in C as mips_install_isr_entries() and
- placed in libcpu.
- (exc_tlb_code, exc_xtlb_code, exc_cache_code, exc_norm_code): Moved
- to libcpu/mips/shared/interrupts.
- (general): Cleaned up comment blocks and #if 0 areas.
- * idtcpu.h: Made ifdef report an error.
- * iregdef.h: Removed warning.
- * rtems/score/cpu.h (CPU_INTERRUPT_NUMBER_OF_VECTORS): Now a variable
- number defined by libcpu.
- (_CPU_ISR_Disable, _CPU_ISR_Enable): Rewritten to use new routines
- to access SR.
- (_CPU_ISR_Set_level): Rewritten as macro for ISA I.
- (_CPU_Context_Initialize): Honor ISR level in task initialization.
- (_CPU_Fatal_halt): Use new _CPU_ISR_Disable() macro.
-
-2000-12-06 Joel Sherrill <joel@OARcorp.com>
-
- * rtems/score/cpu.h: When mips ISA level is 1, registers in the
- context should be 32 not 64 bits.
-
-2000-11-30 Joel Sherrill <joel@OARcorp.com>
-
- * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
- correct name of _CPU_Context_switch_restore. Added dummy
- version of exc_utlb_code() so applications would link.
-
-2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
-
-2000-11-02 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * Makefile.am: Switch to ACLOCAL_AMFLAGS = -I $(RTEMS_TOPdir)/aclocal.
-
-2000-10-25 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * Makefile.am: ACLOCAL_AMFLAGS= -I $(RTEMS_TOPdir)/macros.
- Switch to GNU canonicalization.
-
-2000-10-24 Alan Cudmore <alanc@linuxstart.com> and
- Joel Sherrill <joel@OARcorp.com>
-
- * This is a major reworking of the mips64orion port to use
- gcc predefines as much as possible and a big push to multilib
- the mips port. The mips64orion port was copied/renamed to mips
- to be more like other GNU tools. Alan did most of the technical
- work of determining how to map old macro names used by the mips64orion
- port to standard compiler macro definitions. Joel did the merge
- with CVS magic to keep individual file history and did the BSP
- modifications. Details follow:
- * Makefile.am: idtmon.h in mips64orion port not present.
- * asm.h: MIPS64ORION replaced with MIPS. Frame setup macros added.
- * cpu.c: Comments added.
- * cpu_asm.S: Conditionals changed. MIPS ISA level 1 support added.
- First attempt at exception/interrupt processing for ISA level 1
- and minus any use of IDT/MON added.
- * idtcpu.h: Conditionals changed to use gcc predefines.
- * iregdef.h: Ditto.
- * cpu_asm.h: No real change. Merger required commit.
- * rtems/Makefile.am: Ditto.
- * rtems/score/Makefile.am: Ditto.
- * rtems/score/cpu.h: Change MIPS64ORION to MIPS.
- * rtems/score/mips64orion.h: Change MIPS64ORION to MIPS. Convert
- from using RTEMS_CPU_MODEL to gcc predefines to figre things out.
-
-2000-09-04 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
- * Makefile.am: Include compile.am.
-
-2000-08-10 Joel Sherrill <joel@OARcorp.com>
-
- * ChangeLog: New file.