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-rw-r--r--cpukit/score/cpu/m32c/cpu.c12
-rw-r--r--cpukit/score/cpu/m32c/cpu_asm.c12
-rw-r--r--cpukit/score/cpu/m32c/include/rtems/score/cpu.h93
3 files changed, 4 insertions, 113 deletions
diff --git a/cpukit/score/cpu/m32c/cpu.c b/cpukit/score/cpu/m32c/cpu.c
index 4592e8ced3..6b4f88634d 100644
--- a/cpukit/score/cpu/m32c/cpu.c
+++ b/cpukit/score/cpu/m32c/cpu.c
@@ -113,18 +113,6 @@ void _CPU_ISR_install_vector(
}
/*
- * _CPU_Install_interrupt_stack
- *
- * NO_CPU Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-
-void _CPU_Install_interrupt_stack( void )
-{
-}
-
-/*
* _CPU_Thread_Idle_body
*
* NOTES:
diff --git a/cpukit/score/cpu/m32c/cpu_asm.c b/cpukit/score/cpu/m32c/cpu_asm.c
index f992c57b3d..16a80b2963 100644
--- a/cpukit/score/cpu/m32c/cpu_asm.c
+++ b/cpukit/score/cpu/m32c/cpu_asm.c
@@ -73,10 +73,8 @@ void _ISR_Handler(void)
* save some or all context on stack
* may need to save some special interrupt information for exit
*
- * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
- * if ( _ISR_Nest_level == 0 )
- * switch to software interrupt stack
- * #endif
+ * if ( _ISR_Nest_level == 0 )
+ * switch to software interrupt stack
*
* _ISR_Nest_level++;
*
@@ -100,10 +98,8 @@ void _ISR_Handler(void)
* return from interrupt (maybe to _ISR_Dispatch)
*
* LABEL "exit interrupt (simple case):
- * #if ( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE )
- * if outermost interrupt
- * restore stack
- * #endif
+ * if outermost interrupt
+ * restore stack
* prepare to get out of interrupt
* return from interrupt
*/
diff --git a/cpukit/score/cpu/m32c/include/rtems/score/cpu.h b/cpukit/score/cpu/m32c/include/rtems/score/cpu.h
index 3f23c21d88..74794fe6fe 100644
--- a/cpukit/score/cpu/m32c/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/m32c/include/rtems/score/cpu.h
@@ -45,35 +45,6 @@ extern "C" {
#define RTEMS_USE_16_BIT_OBJECT
/**
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK FALSE
-
-/**
* Does the CPU follow the simple vectored interrupt model?
*
* If TRUE, then RTEMS allocates the vector table it internally manages.
@@ -87,40 +58,6 @@ extern "C" {
#define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
/**
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE. It is
- * possible that both are FALSE for a particular CPU. Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK TRUE
-
-/**
- * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- *
- * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/**
* Does the RTEMS invoke the user's ISR with the vector number and
* a pointer to the saved interrupt frame (1) or just the vector
* number (0)?
@@ -409,22 +346,6 @@ typedef struct {
/**
* @defgroup CPUInterrupt Processor Dependent Interrupt Management
- *
- * On some CPUs, RTEMS supports a software managed interrupt stack.
- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in @ref _ISR_Handler. These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack. Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use.
- *
- * NOTE: These two variables are required if the macro
- * @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- *
*/
/**@{**/
@@ -836,20 +757,6 @@ void _CPU_ISR_install_vector(
);
/**
- * @ingroup CPUInterrupt
- *
- * This routine installs the hardware interrupt stack pointer.
- *
- * NOTE: It need only be provided if @ref CPU_HAS_HARDWARE_INTERRUPT_STACK
- * is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-void _CPU_Install_interrupt_stack( void );
-
-/**
* This routine is the CPU dependent IDLE thread body.
*
* NOTE: It need only be provided if @ref CPU_PROVIDES_IDLE_THREAD_BODY