diff options
Diffstat (limited to 'cpukit/score/cpu/m32c')
| -rw-r--r-- | cpukit/score/cpu/m32c/context_init.c | 3 | ||||
| -rw-r--r-- | cpukit/score/cpu/m32c/rtems/score/cpu.h | 4 |
2 files changed, 5 insertions, 2 deletions
diff --git a/cpukit/score/cpu/m32c/context_init.c b/cpukit/score/cpu/m32c/context_init.c index d7c1c5dd92..b2edcf8a21 100644 --- a/cpukit/score/cpu/m32c/context_init.c +++ b/cpukit/score/cpu/m32c/context_init.c @@ -50,7 +50,8 @@ void _CPU_Context_Initialize( size_t size, uint32_t new_level, void *entry_point, - bool is_fp + bool is_fp, + void *tls_area ) { void *stackEnd = stack_base; diff --git a/cpukit/score/cpu/m32c/rtems/score/cpu.h b/cpukit/score/cpu/m32c/rtems/score/cpu.h index 5841885c8e..681fb4bcd0 100644 --- a/cpukit/score/cpu/m32c/rtems/score/cpu.h +++ b/cpukit/score/cpu/m32c/rtems/score/cpu.h @@ -809,6 +809,7 @@ uint32_t _CPU_ISR_Get_level( void ); * point thread. This is typically only used on CPUs where the * FPU may be easily disabled by software such as on the SPARC * where the PSR contains an enable FPU bit. + * @param[in] tls_area is the thread-local storage (TLS) area * * Port Specific Information: * @@ -820,7 +821,8 @@ void _CPU_Context_Initialize( size_t size, uint32_t new_level, void *entry_point, - bool is_fp + bool is_fp, + void *tls_area ); /** |