3 files changed, 1 insertions, 109 deletions
diff --git a/cpukit/score/cpu/lm32/cpu.c b/cpukit/score/cpu/lm32/cpu.c
index a9a90c245f..577f5cbb45 100644
--- a/cpukit/score/cpu/lm32/cpu.c
+++ b/cpukit/score/cpu/lm32/cpu.c
@@ -101,18 +101,6 @@ void _CPU_ISR_install_vector(
 }
 
 /*
- *  _CPU_Install_interrupt_stack
- *
- *  LM32 Specific Information:
- *
- *  XXX document implementation including references if appropriate
- */
-
-void _CPU_Install_interrupt_stack( void )
-{
-}
-
-/*
  *  _CPU_Thread_Idle_body
  *
  *  NOTES:
diff --git a/cpukit/score/cpu/lm32/include/rtems/score/cpu.h b/cpukit/score/cpu/lm32/include/rtems/score/cpu.h
index 77f3389f39..d5fd9cea85 100644
--- a/cpukit/score/cpu/lm32/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/lm32/include/rtems/score/cpu.h
@@ -29,35 +29,6 @@ extern "C" {
 /* conditional compilation parameters */
 
 /**
- * Does RTEMS manage a dedicated interrupt stack in software?
- *
- * If TRUE, then a stack is allocated in @ref _ISR_Handler_initialization.
- * If FALSE, nothing is done.
- *
- * If the CPU supports a dedicated interrupt stack in hardware,
- * then it is generally the responsibility of the BSP to allocate it
- * and set it up.
- *
- * If the CPU does not support a dedicated interrupt stack, then
- * the porter has two options: (1) execute interrupts on the
- * stack of the interrupted task, and (2) have RTEMS manage a dedicated
- * interrupt stack.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE.  It is
- * possible that both are FALSE for a particular CPU.  Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_HAS_SOFTWARE_INTERRUPT_STACK TRUE
-
-/**
  * Does the CPU follow the simple vectored interrupt model?
  *
  * If TRUE, then RTEMS allocates the vector table it internally manages.
@@ -71,40 +42,6 @@ extern "C" {
 #define CPU_SIMPLE_VECTORED_INTERRUPTS TRUE
 
 /**
- * Does this CPU have hardware support for a dedicated interrupt stack?
- *
- * If TRUE, then it must be installed during initialization.
- * If FALSE, then no installation is performed.
- *
- * If this is TRUE, @ref CPU_ALLOCATE_INTERRUPT_STACK should also be TRUE.
- *
- * Only one of @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK and
- * @ref CPU_HAS_HARDWARE_INTERRUPT_STACK should be set to TRUE.  It is
- * possible that both are FALSE for a particular CPU.  Although it
- * is unclear what that would imply about the interrupt processing
- * procedure on that CPU.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_HAS_HARDWARE_INTERRUPT_STACK FALSE
-
-/**
- * Does RTEMS allocate a dedicated interrupt stack in the Interrupt Manager?
- *
- * If TRUE, then the memory is allocated during initialization.
- * If FALSE, then the memory is allocated during initialization.
- *
- * This should be TRUE is CPU_HAS_SOFTWARE_INTERRUPT_STACK is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-#define CPU_ALLOCATE_INTERRUPT_STACK TRUE
-
-/**
  * Does the RTEMS invoke the user's ISR with the vector number and
  * a pointer to the saved interrupt frame (1) or just the vector
  * number (0)?
@@ -426,21 +363,6 @@ extern Context_Control_fp _CPU_Null_fp_context;
 
 /**
  * @defgroup CPUInterrupt Processor Dependent Interrupt Management
- *
- * On some CPUs, RTEMS supports a software managed interrupt stack.
- * This stack is allocated by the Interrupt Manager and the switch
- * is performed in @ref _ISR_Handler.  These variables contain pointers
- * to the lowest and highest addresses in the chunk of memory allocated
- * for the interrupt stack.  Since it is unknown whether the stack
- * grows up or down (in general), this give the CPU dependent
- * code the option of picking the version it wants to use.
- *
- * NOTE: These two variables are required if the macro
- *       @ref CPU_HAS_SOFTWARE_INTERRUPT_STACK is defined as TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
  */
 /**@{**/
 
@@ -847,18 +769,6 @@ void _CPU_ISR_install_vector(
   proc_ptr   *old_handler
 );
 
-/**
- * This routine installs the hardware interrupt stack pointer.
- *
- * NOTE:  It need only be provided if @ref CPU_HAS_HARDWARE_INTERRUPT_STACK
- *        is TRUE.
- *
- * Port Specific Information:
- *
- * XXX document implementation including references if appropriate
- */
-void _CPU_Install_interrupt_stack( void );
-
 /** @} */
 
 /**
diff --git a/cpukit/score/cpu/lm32/irq.c b/cpukit/score/cpu/lm32/irq.c
index be84d747b6..5d227cb2e4 100644
--- a/cpukit/score/cpu/lm32/irq.c
+++ b/cpukit/score/cpu/lm32/irq.c
@@ -21,9 +21,7 @@
 #include <rtems/score/percpu.h>
 #include <rtems/score/threaddispatch.h>
 
-#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
-  unsigned long    *_old_stack_ptr;
-#endif
+unsigned long *_old_stack_ptr;
 
 void *_exception_stack_frame;
 
@@ -44,13 +42,11 @@ void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
 
   _Thread_Dispatch_disable();
 
-#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
   if ( _ISR_Nest_level == 0 ) {
     /* Install irq stack */
     _old_stack_ptr = stack_ptr;
     stack_ptr = _CPU_Interrupt_stack_high - 4;
   }
-#endif
 
   _ISR_Nest_level++;
 
@@ -64,10 +60,8 @@ void __ISR_Handler(uint32_t vector, CPU_Interrupt_frame *ifr)
 
   _ISR_Nest_level--;
 
-#if( CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
   if( _ISR_Nest_level == 0)
     stack_ptr = _old_stack_ptr;
-#endif
 
   _Thread_Dispatch_unnest( _Per_CPU_Get() );